Maxim MAX6735AKAD Single-/dual-/triple-voltage î¼p supervisory circuits with independent watchdog output Datasheet

19-0605; Rev 0; 8/06
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
Features
The MAX6730A–MAX6735A single-/dual-/triple-voltage
microprocessor (µP) supervisors feature a watchdog
timer and manual reset capability. The MAX6730A–
MAX6735A offer factory-set reset thresholds for monitoring voltages from +0.9V to +5V and an adjustable
reset input for monitoring voltages down to +0.63V. The
combination of these features significantly improves
system reliability and accuracy when compared to separate ICs or discrete components.
The active-low reset output asserts and remains asserted
for the reset timeout period after all the monitored voltages exceed their respective thresholds. Multiple factoryset reset threshold combinations reduce the number of
external components required. The MAX6730A/
MAX6731A monitor a single fixed voltage, the MAX6732A/
MAX6733A monitor two fixed voltages, and the
MAX6734A/MAX6735A monitor two fixed voltages and one
adjustable voltage. All devices are offered with six minimum reset timeout periods ranging from 1.1ms to 1120ms.
The MAX6730A–MAX6735A feature a watchdog timer
with an independent watchdog output. The watchdog
timer prevents system lockup during code execution
errors. A watchdog startup delay of 54s after reset
asserts allows system initialization during power-up.
The watchdog operates in normal mode with a 1.68s
delay after initialization. The MAX6730A/MAX6732A/
MAX6734A provide an active-low, open-drain watchdog output. The MAX6731A/MAX6733A/MAX6735A
provide an active-low, push-pull watchdog output.
♦ VCC1 (Primary Supply) Reset Threshold Voltages
from +1.575V to +4.63V
Other features include a manual reset input (MAX6730A/
MAX6731A/MAX6734A/MAX6735A) and push-pull reset
output (MAX6731A/MAX6733A/MAX6735A) or opendrain reset output (MAX6730A/MAX6732A/MAX6734A).
The MAX6730A–MAX6733A are offered in a tiny 6-pin
SOT23 package. The MAX6734A/MAX6735A are offered
in an 8-pin, space-saving SOT23 package. All devices
are fully specified over the extended -40°C to +125°C
temperature range.
Applications
Multivoltage Systems
Telecom/Networking Equipment
Computers/Servers
Portable/Battery-Operated Equipment
Industrial Equipment
Printer/Fax
Set-Top Boxes
♦ VCC2 (Secondary Supply) Reset Threshold
Voltages from +0.79V to +3.08V
♦ Adjustable RSTIN Threshold for Monitoring Voltages
Down to +0.63V (MAX6734A/MAX6735A Only)
♦ Six Reset Timeout Options
♦ Watchdog Timer with Independent Watchdog Output
35s (min) Initial Watchdog Startup Period
1.12s (min) Normal Watchdog Timeout Period
♦ Manual Reset Input (MAX6730A/MAX6731A/
MAX6734A/MAX6735A)
♦ Guaranteed Reset Valid down to
VCC1 or VCC2 = +0.8V
♦ Push-Pull RESET or Open-Drain RESET Output
♦ Immune to Short VCC Transients
♦ Low Supply Current: 14µA (typ) at +3.6V
♦ Small 6-Pin and 8-Pin SOT23 Packages
Ordering Information
PART*
PIN-PACKAGE
PKG CODE
MAX6730AUT_D_ -T
6 SOT23-6
U6-1
MAX6731AUT_D_ -T
6 SOT23-6
U6-1
MAX6732AUT_ _D_ -T
6 SOT23-6
U6-1
MAX6733AUT_ _D_ -T
6 SOT23-6
U6-1
MAX6734AKA_ _D_ -T
8 SOT23-8
K8S-3
MAX6735AKA_ _D_ -T
8 SOT23-8
K8S-3
All devices specified over the -40°C to +125°C operating temperature range.
*Note: Insert the threshold level suffixes for VCC1 and VCC2
(Table 1) after “UT” or “KA.” For the MAX6730A/MAX6731A,
insert only the VCC1 threshold suffix after the “UT.” Insert the
reset timeout delay (Table 2) after “D” to complete the part number. For example, the MAX6732AUTLTD3-T provides a VCC1
threshold of +4.625V, a VCC2 threshold of +3.075V, and a
210ms reset timeout period. Sample stock is generally held on
standard versions only (see the Standard Versions table).
Standard versions have an order increment requirement of 2500
pieces. Nonstandard versions have an order increment requirement of 10,000 pieces. Contact factory for availability.
Devices are available in both leaded and lead-free packaging.
Specify lead-free by replacing “T” with “+T” when ordering.
Typical Operating Circuit and Pin Configurations appear at
end of data sheet.
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1
MAX6730A–MAX6735A
General Description
MAX6730A–MAX6735A
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
ABSOLUTE MAXIMUM RATINGS
VCC1, VCC2, RSTIN, MR, WDI to GND .....................-0.3V to +6V
RST, WDO to GND (open drain)...............................-0.3V to +6V
RST, WDO to GND (push-pull) .................-0.3V to (VCC1 + 0.3V)
Input Current/Output Current (all pins) ...............................20mA
Continuous Power Dissipation (TA = +70°C)
6-Pin SOT23-6 (derate 8.7mW/°C above +70°C) ........696mW
8-Pin SOT23-8 (derate 8.9mW/°C above +70°C) ........714mW
Operating Temperature Range .........................-40°C to +125°C
Storage Temperature Range .............................-65°C to +150°C
Junction Temperature ......................................................+150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC1 = VCC2 = +0.8V to +5.5V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
Supply Voltage
SYMBOL
CONDITIONS
VCC1,
VCC2
ICC1
MIN
TYP
0.8
MAX
UNITS
5.5
V
VCC1 < +5.5V, all I/O connections
open, outputs not asserted
15
39
VCC1 < +3.6V, all I/O connections
open, outputs not asserted
10
28
VCC2 < +3.6V, all I/O connections
open, outputs not asserted
4
11
VCC2 < +2.75V, all I/O connections
open, outputs not asserted
3
9
µA
Supply Current
ICC2
VCC1 Reset Threshold
2
VTH1
L (falling)
4.500
4.625
4.750
M (falling)
4.250
4.375
4.500
T (falling)
3.000
3.075
3.150
S (falling)
2.850
2.925
3.000
R (falling)
2.550
2.625
2.700
Z (falling)
2.250
2.313
2.375
Y (falling)
2.125
2.188
2.250
W (falling)
1.620
1.665
1.710
V (falling)
1.530
1.575
1.620
_______________________________________________________________________________________
V
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
MAX6730A–MAX6735A
ELECTRICAL CHARACTERISTICS (continued)
(VCC1 = VCC2 = +0.8V to +5.5V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
VCC2 Reset Threshold
SYMBOL
VTH2
CONDITIONS
MIN
TYP
MAX
T (falling)
3.000
3.075
3.150
S (falling)
2.850
2.925
3.000
R (falling)
2.550
2.625
2.700
Z (falling)
2.250
2.313
2.375
Y (falling)
2.125
2.188
2.250
W (falling)
1.620
1.665
1.710
V (falling)
1.530
1.575
1.620
I (falling)
1.350
1.388
1.425
H (falling)
1.275
1.313
1.350
G (falling)
1.080
1.110
1.140
F (falling)
1.020
1.050
1.080
E (falling)
0.810
0.833
0.855
D (falling)
0.765
0.788
0.810
Reset Threshold Tempco
Reset Threshold Hysteresis
VCC_ to RST Output Delay
Reset Timeout Period
UNITS
V
20
ppm/oC
VHYST
Referenced to VTH typical
0.5
%
tRD
VCC1 = (VTH1 + 100mV) to
(VTH1 - 100mV) or
VCC2 = (VTH2 + 75mV) to
(VTH2 - 75mV)
45
µs
tRP
D1
1.1
1.65
2.2
D2
8.8
13.2
17.6
D3
140
210
280
D5
280
420
560
D6
560
840
1120
D4
1120
1680
2240
626.5
642
ms
ADJUSTABLE RESET COMPARATOR INPUT (MAX6734A/MAX6735A)
RSTIN Input Threshold
VRSTIN
611
RSTIN Input Current
IRSTIN
-100
RSTIN Hysteresis
RSTIN to Reset Output Delay
tRSTIND
VRSTIN to (VRSTIN - 30mV)
+100
mV
nA
3
mV
22
µs
MANUAL RESET INPUT (MAX6730A/MAX6731A/MAX6734A/MAX6735A)
0.3 × VCC1
VIL
MR Input Threshold
VIH
MR Minimum Pulse Width
0.7 × VCC1
1
MR Glitch Rejection
µs
100
MR to Reset Output Delay
MR Pullup Resistance
tMR
ns
200
25
V
50
ns
80
kΩ
_______________________________________________________________________________________
3
MAX6730A–MAX6735A
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
ELECTRICAL CHARACTERISTICS (continued)
(VCC1 = VCC2 = +0.8V to +5.5V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
35
54
72
1.12
1.68
2.24
UNITS
WATCHDOG INPUT
Watchdog Timeout Period
WDI Pulse Width
WDI Input Voltage
WDI Input Current
tWD-L
First watchdog period after reset
timeout period
tWD-S
Normal mode
tWDI
(Note 2)
50
0.7 × VCC1
VIH
IWDI
ns
0.3 × VCC1
VIL
WDI = 0V or VCC1
s
-1
+1
V
µA
RESET/WATCHDOG OUTPUT
RST / WDO Output Low Voltage
(Push-Pull or Open Drain)
RST / WDO Output High Voltage
(Push-Pull Only)
RST / WDO Output Open-Drain
Leakage Current
VOL
VOH
VCC1 or VCC2 ≥ +0.8V,
ISINK = 1µA, output asserted
0.3
VCC1 or VCC2 ≥ +1.0V,
ISINK = 50µA, output asserted
0.3
VCC1 or VCC2 ≥ +1.2V,
ISINK = 100µA, output asserted
0.3
VCC1 or VCC2 ≥ +2.7V,
ISINK = 1.2mA, output asserted
0.3
VCC1 or VCC2 ≥ +4.5V,
ISINK = 3.2mA, output asserted
0.4
VCC1 ≥ +1.8V, ISOURCE = 200µA,
output not asserted
0.8 × VCC1
VCC1 ≥ +2.7V, ISOURCE = 500µA,
output not asserted
0.8 × VCC1
VCC1 ≥ +4.5V, ISOURCE = 800µA,
output not asserted
0.8 × VCC1
Output not asserted
V
0.5
Note 1: Devices tested at TA = +25°C. Overtemperature limits are guaranteed by design and not production tested.
Note 2: Parameter guaranteed by design.
4
_______________________________________________________________________________________
V
µA
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
ICC1
12
10
8
6
TOTAL
14
12
ICC1
10
8
6
4
ICC2
2
0
18
16
14
TOTAL
12
10
ICC1
8
6
4
ICC2
2
MAX6730A-35A toc03
16
20
ICC2
2
0
0
-40 -25 -10 5 20 35 50 65 80 95 110 125
-40 -25 -10 5 20 35 50 65 80 95 110 125
-40 -25 -10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
SUPPLY CURRENT vs. TEMPERATURE
(VCC1 = +1.8V, VCC2 = +1.2V)
MAX6730A-35A toc04
20
18
16
14
12
10
8
NORMALIZED THRESHOLD VOLTAGE
vs. TEMPERATURE
TOTAL
ICC1
6
4
2
ICC2
0
1.008
MAX6730A-35A toc05
4
18
NORMALIZED THRESHOLD VOLTAGE
14
SUPPLY CURRENT (µA)
SUPPLY CURRENT (µA)
16
20
SUPPLY CURRENT vs. TEMPERATURE
(VCC1 = +2.5V, VCC2 = +1.8V)
MAX6730A-35A toc02
TOTAL
SUPPLY CURRENT (µA)
18
MAX6730A-35A toc01
20
SUPPLY CURRENT vs. TEMPERATURE
(VCC1 = +3.3V, VCC2 = +2.5V)
SUPPLY CURRENT (µA)
SUPPLY CURRENT vs. TEMPERATURE
(VCC1 = +5V, VCC2 = +3.3V)
1.007
1.006
1.005
1.004
1.003
1.002
1.001
1.000
0.999
0.998
-40 -25 -10 5 20 35 50 65 80 95 110 125
-40 -25 -10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)
TEMPERATURE (°C)
_______________________________________________________________________________________
5
MAX6730A–MAX6735A
Typical Operating Characteristics
(VCC1 = +5V, VCC2 = +3.3V, TA = +25°C, unless otherwise noted.)
Typical Operating Characteristics (continued)
(VCC1 = +5V, VCC2 = +3.3V, TA = +25°C, unless otherwise noted.)
NORMALIZED TIMEOUT PERIOD
vs. TEMPERATURE
MAXIMUM VCC_ TRANSIENT DURATION
vs. RESET THRESHOLD OVERDRIVE
1.012
1.008
1.004
1.000
0.996
0.992
0.988
0.984
MAX6730A-35A toc07
1.016
MR TO RESET OUTPUT DELAY
MAX6730A-35A toc08
10,000
MAXIMUM VCC_ TRANSIENT DURATION (µs)
MAX6730A-35A toc06
1.020
RST ASSERTS
ABOVE THIS LINE
1000
MR
2V/div
100
RST
2V/div
10
0.980
-40 -25 -10 5 20 35 50 65 80 95 110 125
1
10
100
1000
RSTIN TO RESET OUTPUT DELAY
vs. TEMPERATURE
75mV OVERDRIVE
18
17
16
15
14
13
12
24
RSTIN RESET OUTPUT DELAY (µs)
VCC_ TO RESET OUTPUT DELAY (µs)
19
MAX6730A-35A toc09
VCC_ TO RESET OUTPUT DELAY
vs. TEMPERATURE
20
40ns/div
RESET THRESHOLD OVERDRIVE (mV)
TEMPERATURE (°C)
MAX6730A-35A toc10
NORMALIZED TIMEOUT PERIOD
MAX6730A–MAX6735A
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
22
20
18
16
14
11
12
10
6
-40 -25 -10 5 20 35 50 65 80 95 110 125
-40 -25 -10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)
TEMPERATURE (°C)
_______________________________________________________________________________________
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
PIN
MAX6730A
MAX6731A
MAX6732A
MAX6733A
MAX6734A
MAX6735A
NAME
FUNCTION
1
1
1
RST
Active-Low Reset Output. The MAX6730A/MAX6732A/MAX6734A provide an
open-drain output. The MAX6731A/MAX6733A/MAX6735A provide a push-pull
output. RST asserts low when any of the following conditions occur: VCC1 or
VCC2 drops below its preset threshold, RSTIN drops below its reset threshold,
or MR is driven low. Open-drain versions require an external pullup resistor.
2
2
2
GND
Ground
WDO
Active-Low Watchdog Output. The MAX6730A/MAX6732A/MAX6734A provide
an open-drain WDO output. The MAX6731A/MAX6733A/MAX6735A provide a
push-pull WDO output. WDO asserts low when no low-to-high or high-to-low
transition occurs on WDI within the watchdog timeout period (tWD) or if an
undervoltage-lockout condition exists for VCC1, VCC2, or RSTIN. WDO
deasserts without a timeout period when VCC1, VCC2, and RSTIN exceed their
reset thresholds, or when the manual reset input is deasserted. Open-drain
versions require an external pullup resistor.
3
4
3
—
4
5
MR
Active-Low Manual Reset Input. Drive MR low to force a reset. RST remains
asserted as long as MR is low and for the reset timeout period after MR releases
high. MR has a 50kΩ pullup resistor to VCC1; leave MR open or connect to
VCC1 if unused.
5
5
3
WDI
Watchdog Input. If WDI remains high or low for longer than the watchdog
timeout period, the internal watchdog timer expires and the watchdog output
asserts low. The internal watchdog timer clears whenever RST asserts or a
rising or falling edge on WDI is detected. The watchdog has an initial watchdog
timeout period (35s min) after each reset event and a short timeout period
(1.12s min) after the first valid WDI transition. Floating WDI does not disable the
watchdog timer function.
6
6
8
VCC1
Primary Supply-Voltage Input. VCC1 provides power to the device when it is
greater than VCC2. VCC1 is the input to the primary reset threshold monitor.
—
4
6
VCC2
Secondary Supply-Voltage Input. VCC2 provides power to the device when it is
greater than VCC1. VCC2 is the input to the secondary reset threshold monitor.
RSTIN
Undervoltage Reset Comparator Input. RSTIN provides a high-impedance
comparator input for the adjustable reset monitor. RST asserts low if the voltage
at RSTIN drops below the 626mV internal reference voltage. Connect a resistive
voltage-divider to RSTIN to monitor voltages higher than 626mV. Connect
RSTIN to VCC1 or VCC2 if unused.
—
—
7
_______________________________________________________________________________________
7
MAX6730A–MAX6735A
Pin Description
MAX6730A–MAX6735A
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
Table 1. Reset Voltage Threshold Suffix Guide**
PART NUMBER
SUFFIX
LT
MS
MR
TZ
SY
RY
TW
SV
RV
TI
SH
RH
TG
SF
RF
TE
SD
RD
ZW
YV
ZI
YH
ZG
YF
ZE
YD
WI
VH
WG
VF
WE
VD
VCC1 NOMINAL
VOLTAGE
THRESHOLD(V)
4.625
4.375
4.375
3.075
2.925
2.625
3.075
2.925
2.625
3.075
2.925
2.625
3.075
2.925
2.625
3.075
2.925
2.625
2.313
2.188
2.313
2.188
2.313
2.188
2.313
2.188
1.665
1.575
1.665
1.575
1.665
1.575
VCC2 NOMINAL
VOLTAGE
THRESHOLD (V)
3.075
2.925
2.625
2.313
2.188
2.188
1.665
1.575
1.575
1.388
1.313
1.313
1.110
1.050
1.050
0.833
0.788
0.788
1.665
1.575
1.388
1.313
1.110
1.050
0.833
0.788
1.388
1.313
1.110
1.050
0.833
0.788
**Standard versions are shown in bold and are available in a
D3 timeout option only. Standard versions require 2500-piece
order increments and are typically held in sample stock. There
is a 10,000-piece order increment on nonstandard versions.
Other threshold voltages may be available; contact factory
for availability.
8
Table 2. Reset Timeout Period Suffix Guide
TIMEOUT
PERIOD SUFFIX
ACTIVE TIMEOUT PERIOD
MIN (ms)
MAX (ms)
D1
1.1
2.2
D2
8.8
17.6
D3
140
280
D5
280
560
D6
560
1120
D4
1120
2240
Detailed Description
Supply Voltages
The MAX6730A–MAX6735A microprocessor (µP) supervisors maintain system integrity by alerting the µP to fault
conditions. The MAX6730A–MAX6735A monitor one to
three supply voltages in µP-based systems and assert
an active-low reset output when any monitored supply
voltage drops below its preset threshold. The output
state remains valid for VCC1 or VCC2 greater than +0.8V.
Threshold Levels
The two-letter code in the Reset Voltage Threshold
Suffix Guide (Table 1) indicates the threshold level
combinations for VCC1 and VCC2.
Reset Output
The MAX6730A–MAX6735A feature an active-low reset
output (RST). RST asserts when the voltage at either
VCC1 or VCC2 falls below the voltage threshold level,
VRSTIN drops below its threshold, or MR is driven low
(Figure 1). RST remains low for the reset timeout period
(Table 2) after VCC1, VCC2, and RSTIN increase above
their respective thresholds and after MR releases high.
Whenever VCC1, VCC2, or RSTIN go below the reset
threshold before the end of the reset timeout period, the
internal timer restarts. The MAX6730A/MAX6732A/
MAX6734A provide an open-drain RST output, and the
MAX6731A/MAX6733A/MAX6735A provide a push-pull
RST output.
_______________________________________________________________________________________
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
RST
VCC
(MIN)
MAX6730A–MAX6735A
VCC1,
VCC2
RSTIN
VTH
tRP
tRP
WDO
MR
Figure 1. RST, WDO, and MR Timing Diagram
Manual Reset Input
Many µP-based products require manual reset capability, allowing the operator, a test technician, or external
logic circuitry to initiate a reset. A logic-low on MR
asserts the reset output, clears the watchdog timer,
and deasserts the watchdog output. Reset remains
asserted while MR is low and for the reset timeout period (tRP) after MR returns high. An internal 50kΩ pullup
resistor allows MR to be left open if unused. Drive MR
with CMOS-logic levels or with open-drain/collector outputs. Connect a normally open momentary switch from
MR to GND to create a manual reset function; external
debounce circuitry is not required. Connect a 0.1µF
capacitor from MR to GND to provide additional noise
immunity when driving MR over long cables or if the
device is used in a noisy environment.
Adjustable Input Voltage (RSTIN)
VEXT_TH
R1
MAX6734A
MAX6735A
RSTIN
R2
GND
Figure 2. Monitoring a Third Voltage
The MAX6734A/MAX6735A provide an additional highimpedance comparator input with a 626mV threshold to
monitor a third supply voltage. To monitor a voltage
higher than 626mV, connect a resistive divider to the
circuit as shown in Figure 2 to establish an externally
controlled threshold voltage, VEXT_TH.
VEXT_TH = 626mV ×
(R1 + R2)
R2
_______________________________________________________________________________________
9
MAX6730A–MAX6735A
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
The RSTIN comparator derives power from VCC1, and
the input voltage must remain less than or equal to
VCC1. Low leakage current at RSTIN allows the use of
large-valued resistors, resulting in reduced power consumption of the system.
Watchdog
The watchdog feature monitors µP activity through
the watchdog input (WDI). A rising or falling edge on
WDI within the watchdog timeout period (t WD) indicates normal µP operation. WDO asserts low if WDI
remains high or low for longer than the watchdog
timeout period. Floating WDI does not disable the
watchdog timer.
The MAX6730A–MAX6735A include a dual-mode
watchdog timer to monitor µP activity. The flexible timeout architecture provides a long-period initial watchdog
mode, allowing complicated systems to complete
lengthy boots, and a short-period normal watchdog
mode, allowing the supervisor to provide quick alerts
when processor activity fails. After each reset event
(VCC power-up, brownout, or manual reset), there is a
long initial watchdog period of 35s (min). The long
watchdog period mode provides an extended time for
the system to power up and fully initialize all µP and
system components before assuming responsibility for
routine watchdog updates.
VCC1,
VCC2
RSTIN
RST
VCC
(MIN)
The usual watchdog timeout period (1.12s min) begins
after the initial watchdog timeout period (tWD-L) expires
or after the first transition on WDI (Figure 3). During normal operating mode, the supervisor asserts the WDO
output if the µP does not update the WDI with a valid
transition (high to low or low to high) within the standard
timeout period (tWD-S) (1.12s min).
Connect MR to WDO to force a system reset in the
event that no rising or falling edge is detected at WDI
within the watchdog timeout period. WDO asserts low
when no edge is detected by WDI, the RST output
asserts low, the watchdog counter immediately clears,
and WDO returns high. The watchdog counter restarts,
using the long watchdog period, when the reset timeout
period ends (Figure 4).
Ensuring a Valid Reset
Output Down to VCC = 0V
The MAX6730A–MAX6735A guarantee proper operation down to VCC = +0.8V. In applications that require
valid reset levels down to VCC = 0V, use a 100kΩ pulldown resistor from RST to GND. The resistor value
used is not critical, but it must be large enough not to
load the reset output when V CC is above the reset
threshold. For most applications, 100kΩ is adequate.
Note that this configuration does not work for the opendrain outputs of MAX6730A/MAX6732A/MAX6734A.
VTH
tRP
WDO
WDI
<tWD-L
<tWD-S
<tWD-S
>tWD-S
<tWD-S
tWD-S
Figure 3. Watchdog Input/Output Timing Diagram (MR and WDO Not Connected)
10
______________________________________________________________________________________
<tWD-S
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
RST
VCC
(MIN)
MAX6730A–MAX6735A
VCC1,
VCC2
RSTIN
VTH
tRP
tRP
WDO
WDI
<tWD-L
<tWD-S
>tWD-S
<tWD-L
MR
tMR
Figure 4. Watchdog Input/Output Timing Diagram (MR and WDO Connected)
Applications Information
Interfacing to µPs with Bidirectional
Reset Pins
Microprocessors with bidirectional reset pins can interface directly with the open-drain RST output options.
However, conditions might occur in which the push-pull
output versions experience logic contention with the
bidirectional reset pin of the µP. Connect a 10kΩ resistor between RST and the µP’s reset I/O port to prevent
logic contention (Figure 5).
VCC2 VCC1
RESET TO
OTHER
SYSTEM
COMPONENTS
VCC1
MAX6731A
MAX6733A RST
MAX6735A
µP
10kΩ
RESET
VCC2
Falling VCC Transients
The MAX6730A–MAX6735A µP supervisors are relatively immune to short-duration falling VCC _ transients
(glitches). Small glitches on VCC_ are ignored by the
MAX6730A–MAX6735A, preventing undesirable reset
pulses to the µP. The Typical Operating Characteristics
show Maximum V CC_ Transient Duration vs. Reset
GND
GND
Figure 5. Interfacing to µPs with Bidirectional Reset I/O
______________________________________________________________________________________
11
MAX6730A–MAX6735A
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
Threshold Overdrive graph, for which reset pulses are
not generated. The graph was produced using falling
VCC_ pulses, starting above VTH and ending below the
reset threshold by the magnitude indicated (reset
threshold overdrive). The graph shows the maximum
pulse width that a falling VCC transient typically might
have without causing a reset pulse to be issued. As the
amplitude of the transient increases (i.e., goes further
below the reset threshold), the maximum allowable
pulse width decreases. A 0.1µF bypass capacitor
mounted close to VCC_ provides additional transient
immunity.
Functional Diagram
VCC1
MR
VCC1
MAX6730A–
MAX6735A
VCC1
VCC2
RESET
TIMEOUT
PERIOD
RESET
OUTPUT
DRIVER
WATCHDOG
TIMER
RSTIN
RST
WDO
WDI
VCC1
REF
VREF / 2
START
SET WDI
HIGH
PROGRAM
CODE
SUBROUTINE OR
PROGRAM LOOP
SET WDI LOW
HANG IN
SUBROUTINE
RETURN
Figure 6. Watchdog Flow Diagram
12
VCC2
VCC1
GND
SUBROUTINE
COMPLETED
VCC1
VREF
Watchdog Software Considerations
Setting and resetting the watchdog input at different
points in the program rather than “pulsing” the watchdog input high-low-high or low-high-low helps the
watchdog timer closely monitor software execution.
This technique avoids a “stuck” loop, in which the
watchdog timer continues to be reset within the loop,
preventing the watchdog from timing out. Figure 6
shows an example flow diagram in which the I/O driving the watchdog input is set high at the beginning of
the program, set low at the beginning of every subroutine or loop, and then set high again when the program
returns to the beginning. If the program “hangs” in any
subroutine, the I/O continually asserts low (or high),
and the watchdog timer expires, issuing a reset or
interrupt.
MR
PULLUP
______________________________________________________________________________________
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
PART
TOP MARK
PART
TOP MARK
MAX6730AUTLD3-T
+ACIX
MAX6733AUTZGD3-T
+ACIV
MAX6730AUTSD3-T
+ACJA
MAX6733AUTYDD3-T
+ACIT
MAX6730AUTRD3-T
+ACIY
MAX6733AUTVHD3-T
+ACIR
MAX6730AUTZD3-T
+ACJF
MAX6733AUTWGD3-T
+ACIS
MAX6730AUTVD3-T
+ACJC
MAX6733AUTVDD3-T
+ACIQ
MAX6731AUTLD3-T
+ACJG
MAX6734AKALTD3-T
+AENS
MAX6731AUTTD3-T
+ACJJ
MAX6734AKASYD3-T
+AENZ
MAX6731AUTSD3-T
+ACJI
MAX6734AKASVD3-T
+AENY
MAX6731AUTRD3-T
+ACJH
MAX6734AKARVD3-T
+AENU
MAX6731AUTZD3-T
+ACJL
MAX6734AKASHD3-T
+AENX
MAX6731AUTVD3-T
+ACJK
MAX6734AKATGD3-T
+AEOA
MAX6732AUTLTD3-T
+ACHU
MAX6734AKASDD3-T
+AENV
MAX6732AUTSYD3-T
+ACHZ
MAX6734AKAZWD3-T
+AEOI
MAX6732AUTSVD3-T
+ACHY
MAX6734AKAYHD3-T
+AEOG
MAX6732AUTRVD3-T
+ACHV
MAX6734AKAZGD3-T
+AEOH
MAX6732AUTSHD3-T
+ACHX
MAX6734AKAYDD3-T
+AEOF
MAX6732AUTTGD3-T
+ACIA
MAX6734AKAVHD3-T
+AEOD
MAX6732AUTSDD3-T
+ACHW
MAX6734AKAWGD3-T
+AEOE
MAX6732AUTZWD3-T
+ACIH
MAX6734AKAVDD3-T
+AEOC
MAX6732AUTYHD3-T
+ACIF
MAX6735AKALTD3-T
+AEOJ
MAX6732AUTZGD3-T
+ACIG
MAX6735AKASYD3-T
+AEOO
MAX6732AUTYDD3-T
+ACIE
MAX6735AKASVD3-T
+AEON
MAX6732AUTVHD3-T
+ACIC
MAX6735AKARVD3-T
+AEOK
MAX6732AUTWGD3-T
+ACID
MAX6735AKASHD3-T
+AEOM
MAX6732AUTVDD3-T
+ACIB
MAX6735AKATGD3-T
+AEOP
MAX6733AUTLTD3-T
+ACII
MAX6735AKASDD3-T
+AEOL
MAX6733AUTSYD3-T
+ACIN
MAX6735AKAZWD3-T
+AEOX
MAX6733AUTSVD3-T
+ACIM
MAX6735AKAZID3-T
+AEOW
MAX6733AUTRVD3-T
+ACIJ
MAX6735AKAYHD3-T
+AEOU
MAX6733AUTSHD3-T
+ACIL
MAX6735AKAZGD3-T
+AEOV
MAX6733AUTTGD3-T
+ACIO
MAX6735AKAYDD3-T
+AEOT
MAX6733AUTSDD3-T
+ACIK
MAX6735AKAVHD3-T
+AEOR
MAX6733AUTZWD3-T
+ACIW
MAX6735AKAWGD3-T
+AEOS
MAX6733AUTYHD3-T
+ACIU
MAX6735AKAVDD3-T
+AEOQ
Note: Sample stock is generally held on standard versions only. Standard versions have an order increment requirement of 2500
pieces. Nonstandard versions have an order increment requirement of 10,000 pieces. Contact factory for availability of nonstandard
versions.
______________________________________________________________________________________
13
MAX6730A–MAX6735A
Standard Versions
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
MAX6730A–MAX6735A
Pin Configurations
TOP VIEW
RST 1
MAX6730A
MAX6731A
GND 2
WDO 3
6
VCC1
RST 1
5
WDI
GND 2
4
MR
WDO 3
SOT23-6
MAX6732A
MAX6733A
+1.8V
5
WDI
4
VCC2
RST
1
GND
2
WDI
3
MAX6734A
MAX6735A
WDO 4
8
VCC1
7
RSTIN
6
VCC2
5
MR
SOT23-8
___________________Chip Information
TRANSISTOR COUNT: 1073
PROCESS: BiCMOS
+3.3V
VCC2
VCC1
RSTIN
RST
MAX6734A
WDI
MAX6735A
PUSHBUTTON
SWITCH
VCC1
SOT23-6
Typical Operating Circuit
+0.9V
VCORE
6
WDO
VCC
(I/O)
VDD
(MEMORY)
RESET
I/O
µP
NMI
MR
GND
GND
Selector Guide
14
PART NUMBER
VOLTAGE
MONITORS
RST OUTPUT
MANUAL RESET
WATCHDOG
INPUT
WATCHDOG
OUTPUT
MAX6730A
1
Open Drain
√
√
Open Drain
MAX6731A
1
Push-Pull
√
√
Push-Pull
MAX6732A
2
Open Drain
—
√
Open Drain
MAX6733A
2
Push-Pull
—
√
Push-Pull
MAX6734A
3
Open Drain
√
√
Open Drain
MAX6735A
3
Push-Pull
√
√
Push-Pull
______________________________________________________________________________________
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
6LSOT.EPS
PACKAGE OUTLINE, SOT 6L BODY
21-0058
G
1
______________________________________________________________________________________
1
15
MAX6730A–MAX6735A
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
SEE DETAIL "A"
SYMBOL
e
b
C
L
CL
E
CL
E1
PIN 1
I.D. DOT
(SEE NOTE 6)
MIN
MAX
A
0.90
1.45
A1
0.00
0.15
A2
0.90
1.30
b
0.22
0.38
C
0.08
0.22
D
2.80
3.00
E
2.60
3.00
E1
1.50
1.75
L
0.30
L2
0.60
0.25 BSC.
e
0.65 BSC.
SOT23, 8L .EPS
MAX6730A–MAX6735A
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
1.95 REF.
e1
0
0°
8°
e1
D
C
CL
L2
A
A2
GAUGE PLANE
A1
SEATING PLANE C
0
L
NOTE:
1. ALL DIMENSIONS ARE IN MILLIMETERS.
2. FOOT LENGTH MEASURED FROM LEAD TIP TO UPPER RADIUS OF
HEEL OF THE LEAD PARALLEL TO SEATING PLANE C.
3. PACKAGE OUTLINE EXCLUSIVE OF MOLD FLASH & METAL BURR.
4. PACKAGE OUTLINE INCLUSIVE OF SOLDER PLATING.
DETAIL "A"
5. COPLANARITY 4 MILS. MAX.
6. PIN 1 I.D. DOT IS 0.3 MM Ø MIN. LOCATED ABOVE PIN 1.
PROPRIETARY INFORMATION
7. SOLDER THICKNESS MEASURED AT FLAT SECTION OF LEAD
BETWEEN 0.08mm AND 0.15mm FROM LEAD TIP.
8. MEETS JEDEC MO178 VARIATION BA.
TITLE:
PACKAGE OUTLINE, SOT-23, 8L BODY
APPROVAL
DOCUMENT CONTROL NO.
REV.
21-0078
E
1
1
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
16 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2006 Maxim Integrated Products
Heaney
is a registered trademark of Maxim Integrated Products, Inc.