19-3564; Rev 0; 1/05 KIT ATION EVALU E L B A AVAIL µPMIC for Microprocessors or DSPs in Portable Equipment Features The MAX8620Y micro-power-management integrated circuit (µPMIC) powers low-voltage microprocessors or DSPs in portable devices. The µPMIC includes a highefficiency step-down DC-DC converter, two lowdropout linear regulators (LDOs), a microprocessor reset output, and power-on/off control logic. This device maintains high efficiency at light loads with a low 115µA supply current, and its miniature TDFN package makes it ideal for portable devices. The MAX8620Y’s step-down DC-DC converter utilizes a proprietary 4MHz hysteretic-PWM control scheme that allows for ultra-small external components. Internal synchronous rectification improves efficiency and eliminates the external Schottky diode that is required in conventional step-down converters. The output voltage is adjustable from 0.6V to 3.3V, with guaranteed output current up to 500mA. The MAX8620Y’s two LDOs offer low 45µVRMS output noise and a low dropout of only 200mV at 200mA. Each LDO delivers at least 300mA of continuous output current. The output voltages are pin selectable from 1.8V to 3.3V for flexibility. A microprocessor reset output (RESET) monitors OUT1 and warns the system of impending power loss allowing safe shutdown. RESET asserts during power-up, power-down, shutdown, and fault conditions where VOUT1 is below its regulation voltage. ♦ Three Regulators and a Reset in One Package ♦ High-Efficiency Step-Down Converter Up to 4MHz Fixed Switching Frequency 500mA Guaranteed Output Current 0.6V to 3.3V Adjustable Output Voltage ±2% Initial Accuracy Fast Voltage-Positioning Transient Response Internal Synchronous Rectifier ♦ Two 300mA LDO Regulators 200mV Dropout at 200mA Load Low 45µVRMS Output Noise 3% Accuracy over Line, Load, and Temperature Overcurrent Protection Nine Pin-Selectable Output-Voltage Settings ♦ 30ms (min) RESET Output Flag ♦ 2.7V to 5.5V Input ♦ 115µA (typ) Supply Current at No Load ♦ Thermal-Overload Protection ♦ Tiny 3mm x 3mm x 0.8mm TDFN Package Ordering Information PART TEMP RANGE PINPACKAGE TOP MARK MAX8620YETD -40°C to +85°C 14 TDFN-EP (T1433-2) AAB Applications Typical Operating Circuit Cellular Handsets Smart Phones/PDA Phones PDAs Wireless LAN VIN IN2 OUT1 1.80V, 2.60V, 2.80V, 2.85V, 3.00V, OR 3.30V* 300mA OUT2 1.80V, 2.50V, 2.60V, 2.85V, OR 3.00V* 300mA IN1 Microprocessor and DSP Solutions including MSM™, XScale™, ARM™, and OMAP™ MAX8620Y VLOGIC BP 100kΩ EN2 RESET HF_PWR RESET LX OUT3 0.6V TO 3.3V 500mA PWR_ON Pin Configuration appears at end of data sheet. MSM is a trademark of QUALCOMM, Inc. XScale is a trademark of Intel Corp. ARM is a trademark of ARM Limited. OMAP is a trademark of Texas Instruments, Inc. FB SEL1 SEL2 GND *USE SEL1 AND SEL2 TO SET VOUT1 AND VOUT2 ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX8620Y General Description MAX8620Y µPMIC for Microprocessors or DSPs in Portable Equipment ABSOLUTE MAXIMUM RATINGS IN1, IN2, PWR_ON, RESET, EN2, SEL1, SEL2, HF_PWR, FB, BP to GND ..................................-0.3V to +6.0V OUT1, OUT2 to GND .................................-0.3V to (VIN1 + 0.3V) LX Current ......................................................................1.5ARMS Continuous Power Dissipation (TA = +70°C) 14-Pin TDFN (derate 18.2mW/°C above +70°C) .......1454mW Operating Temperature Range ...........................-40°C to +85°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VIN1 = VIN2 = +3.7V, CIN = 10µF, CBP = 0.01µF, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER Supply Voltage Range Shutdown Supply Current Supply Current SYMBOL CONDITIONS VIN1 ISHDN IIN1 + IIN2 MIN TYP 2.7 MAX UNITS 5.5 V µA VIN1 = VIN2 = 4.2V, PWR_ON = HF_PWR = GND 5.5 10 All outputs enabled, no load 115 140 VOUT1 = VOUT3 = 1.8V, IOUT1 = IOUT3 = 500µA, OUT2 disabled 430 µA UNDERVOLTAGE LOCKOUT UVLO Threshold VUVLO VIN1 = VIN2 rising 2.70 2.85 3.05 V VIN1 = VIN2 falling 2.35 Temperature rising +160 °C 15 °C THERMAL PROTECTION Thermal-Shutdown Threshold Thermal-Shutdown Hysteresis REFERENCE (BP) Reference Bypass Output Voltage VBP 0 ≤ IBP ≤ 1µA 1.231 1.250 1.269 V 0.4 V LOGIC AND CONTROL INPUTS (PWR_ON, HF_PWR, EN2) PWR_ON, HF_PWR, EN2 Input Low Voltage VIL VIN1 = VIN2 = 2.7V to 4.2V (Note 2) PWR_ON, HF_PWR, EN2 Input High Voltage VIH VIN1 = VIN2 = 2.7V to 4.2V (Note 2) Input Bias Current IINB VPWR_ON = VHF_PWR = VEN2 = 0V or 5.5V -1 HF_PWR Timer tHF From the rising edge of HF_PWR until the one-shot timer expires (Figure 4) 1.05 1.44 V 1.31 +1 µA 1.46 s LINEAR REGULATORS (OUT1, OUT2) ILOAD = 1mA, 3.7V ≤ VIN ≤ 5.5V 0°C to +85°C -1.3 -40°C to +85°C -1.5 OUT1, OUT2 Output-Voltage Accuracy VOUT1, VOUT2 OUT1, OUT2 Output Current IOUT_ OUT1, OUT2 Output Current Limit ILIM_ VOUT_ = 0V OUT1, OUT2 Dropout Voltage VDO ILOAD = 200mA, TA = +85°C (Note 3) 1mA ≤ ILOAD ≤ 300mA +1.8 -1.2 ILOAD = 150mA 2 +1.8 % 0 300 310 mA 550 940 mA 200 380 mV _______________________________________________________________________________________ µPMIC for Microprocessors or DSPs in Portable Equipment (VIN1 = VIN2 = +3.7V, CIN = 10µF, CBP = 0.01µF, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL OUT1, OUT2 Power-Supply Rejection Ratio Output Noise Voltage CONDITIONS MIN TYP f = 10Hz to 10kHz, COUT_ = 4.7µF, ILOAD_ = 30mA 60 f = 100Hz to 100kHz, COUT_ = 4.7µF, ILOAD_ = 30mA 45 f = 100Hz to 100kHz, COUT_ = 4.7µF, ILOAD_ = 30mA, CBP open 100 MAX UNITS dB µVRMS STEP-DOWN CONVERTER (OUT3) Output Voltage Range VOUT3 FB Threshold Voltage VTH 0.6 3.3 V VFB falling 0.6 V FB Threshold Line Regulation VIN1 = VIN2 = 2.7V to 5.5V (Note 2) 0.08 %/V FB Threshold Voltage Accuracy (Falling) (% of VTH) IOUT3 = 0mA FB Threshold Voltage Hysteresis (% of VTH) FB Bias Current On-Resistance Rectifier-Off Current Threshold Minimum On- and Off-Times -2 +2 TA = -40°C to +85°C -3 +3 VHYS IFB Current Limit TA = +25°C 2 OUT3 disabled 10 VFB = 0.5V 10 % % µA ILIM3P pFET switch 675 950 1200 ILIM3N nFET rectifier 875 1000 1200 RONP pFET switch, ILX = -200mA 0.65 1.5 RONN nFET rectifier, ILX = +200mA 0.35 0.8 ILXOFF 30 60 tON 107 tOFF 95 mA Ω mA ns OPEN-DRAIN, ACTIVE-LOW RESET OUTPUT (RESET) RESET Output-Voltage Low ISINK = 500µA 0.3 V RESET Output Leakage Current VRESET = 5.5V 100 nA RESET Threshold Voltage Percent of the OUT1 regulation voltage (Note 4) 84 87 90 % Figure 4 30 60 RESET Timeout Period VOL VTHR tRP ms LDO OUTPUT-VOLTAGE SELECT INPUTS (SEL1, SEL2) SEL_ Input Low Threshold 1 SEL_ Input High Threshold SEL_ Input Bias Current VIN_ - 0.2V VIN1 = VIN2 = 4.2V, VSEL1 = 0V or VIN1, VSEL2 = 0V or VIN1 V V ±0.1 µA Note 1: Specifications are 100% production tested at TA = +25°C. Maximum and minimum limits over temperature are guaranteed by design and characterization. Note 2: After startup. Note 3: Guaranteed by design. Note 4: RESET asserts low when VOUT1 drops below the specified percent of the OUT1 regulation voltage. _______________________________________________________________________________________ 3 MAX8620Y ELECTRICAL CHARACTERISTICS (continued) Typical Operating Characteristics (VIN1 = VIN2 = 3.7V, PWR_ON = IN1, L = 2.2µH (LQH31CN2R2M53), CFF = 150pF, VOUT1 = VOUT2 = 2.6V, VOUT3 = 1.867V (R1 = 150kΩ, R2 = 75kΩ), CIN = 10µF, CBP = 0.01µF, COUT1 = COUT2 = 4.7µF, COUT3 = 2.2µF, RESET pulled up with 100kΩ to OUT1, TA = +25°C, unless otherwise noted.) INPUT QUIESCENT CURRENT EFFICIENCY vs. LOAD CURRENT vs. INPUT VOLTAGE L = 2.2µH 70 60 L = 1.0µH 50 40 30 160 140 120 100 80 60 20 40 10 20 0 0 0.1 1 10 100 2.0 1000 2.5 3.0 3.5 4.0 4.5 5.0 5.5 INPUT VOLTAGE (V) LOAD CURRENT (mA) SWITCHING FREQUENCY vs. LOAD CURRENT EFFICIENCY vs. OUTPUT VOLTAGE 100 MAX8620Y toc03 10 L = 1.0µH 95 MAX8620Y toc04 EFFICIENCY (%) 80 180 MAX8620Y toc02 L = 4.7µH 90 QUIESCENT CURRENT (µA) MAX8620Y toc01 100 L = 4.7µH 90 1 L = 4.7µH EFFICIENCY (%) SWITCHING FREQUENCY (MHz) MAX8620Y µPMIC for Microprocessors or DSPs in Portable Equipment L = 2.2µH 85 L = 1.0µH 80 75 L = 2.2µH 70 65 60 0.1 0 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 50 100 150 200 250 300 350 400 450 500 LOAD CURRENT (mA) OUTPUT VOLTAGE (V) LIGHT-LOAD SWITCHING WAVEFORMS HEAVY-LOAD SWITCHING WAVEFORMS MAX8620Y toc05 MAX8620Y toc06 VLX VLX 2V/div VOUT AC-COUPLED 20mV/div 2V/div VOUT AC-COUPLED IL 20mV/div 200mA/div IL 100mA/div 200ns/div 4 200ns/div _______________________________________________________________________________________ µPMIC for Microprocessors or DSPs in Portable Equipment LOAD TRANSIENT (50mA TO 300mA) POWER-UP WAVEFORMS MAX8620Y toc07 MAX8620Y toc08 2V/div VOUT3 AC-COUPLED 50mV/div 1V/div VIN 200mA/div 1V/div VOUT3 IL 300mA 200mA/div 50mA ILOAD 1V/div VOUT1 VOUT2 2µs/div 40µs/div PWR_ON STARTUP/SHUTDOWN WAVEFORMS RESET WAVEFORMS MAX8620Y toc09 VPWR_ON MAX8620Y toc10 2V/div 2V/div 1V/div VPWR_ON 1V/div VOUT3 VRESET 1V/div 1V/div VOUT1 VOUT1 VOUT2 1V/div 100µs/div 10ms/div OUT2 SHUTDOWN WAVEFORMS HF_PWR STARTUP WAVEFORMS MAX8620Y toc11 MAX8620Y toc12 2V/div VHF_PWR 1V/div VEN2 1V/div VOUT1 1V/div 1V/div VOUT2 VRESET 200µs/div 10ms/div _______________________________________________________________________________________ 5 MAX8620Y Typical Operating Characteristics (continued) (VIN1 = VIN2 = 3.7V, PWR_ON = IN1, L = 2.2µH (LQH31CN2R2M53), CFF = 150pF, VOUT1 = VOUT2 = 2.6V, VOUT3 = 1.867V (R1 = 150kΩ, R2 = 75kΩ), CIN = 10µF, CBP = 0.01µF, COUT1 = COUT2 = 4.7µF, COUT3 = 2.2µF, RESET pulled up with 100kΩ to OUT1, TA = +25°C, unless otherwise noted.) Typical Operating Characteristics (continued) (VIN1 = VIN2 = 3.7V, PWR_ON = IN1, L = 2.2µH (LQH31CN2R2M53), CFF = 150pF, VOUT1 = VOUT2 = 2.6V, VOUT3 = 1.867V (R1 = 150kΩ, R2 = 75kΩ), CIN = 10µF, CBP = 0.01µF, COUT1 = COUT2 = 4.7µF, COUT3 = 2.2µF, RESET pulled up with 100kΩ to OUT1, TA = +25°C, unless otherwise noted.) OUT1/OUT2 VOLTAGE vs. INPUT VOLTAGE ILOAD = 0mA 2.65 2.60 2.55 ILOAD = 300mA 2.50 350 DROPOUT VOLTAGE (mV) 2.70 2.45 2.40 300 250 200 150 100 VOUT_ = 3V 50 2.35 2.30 0 3.0 3.5 4.0 4.5 5.0 5.5 0 50 100 150 200 250 300 INPUT VOLTAGE (V) LOAD CURRENT (mA) OUT1/OUT2 LOAD REGULATION vs. LOAD CURRENT OUT1/OUT2 POWER-SUPPLY RIPPLE REJECTION vs. FREQUENCY -0.5 -0.7 -0.9 -1.1 -1.3 MAX8620Y toc16 -0.3 80 POWER-SUPPLY RIPPLE REJECTION (dB) MAX8620Y toc15 -0.1 70 60 50 40 30 20 10 0 -1.5 0 50 100 150 200 LOAD CURRENT (mA) 6 MAX8620Y toc14 2.75 OUTPUT VOLTAGE (V) DROPOUT VOLTAGE vs. LOAD CURRENT 400 MAX8620Y toc13 2.80 LOAD REGULATION (%) MAX8620Y µPMIC for Microprocessors or DSPs in Portable Equipment 250 300 0.1 1 10 100 FREQUENCY (kHz) _______________________________________________________________________________________ 1000 µPMIC for Microprocessors or DSPs in Portable Equipment PIN NAME FUNCTION 1 SEL1 LDO Output-Voltage Select Input 1. SEL1 and SEL2 set the OUT1 and OUT2 voltages to one of nine combinations (Table 1). 2 SEL2 LDO Output-Voltage Select Input 2. SEL1 and SEL2 set the OUT1 and OUT2 voltages to one of nine combinations (Table 1). 3 EN2 OUT2 Enable Input. Drive EN2 low to enable OUT2. Drive EN2 high to disable OUT2. If the MAX8620Y is placed into shutdown (PWR_ON = HF_PWR = low), OUT2 does not power regardless of the status of EN2 (Table 2, Figure 4). Open-Drain, Active-Low Reset Output. RESET asserts low when VOUT1 drops below 87% (typ) of regulation. RESET remains asserted for tRP after VOUT1 rises above 87% (typ) of regulation. RESET also asserts when OUT1 is disabled (Figure 4). RESET deasserts if OUT1 is enabled and VOUT1 is above 87% of regulation after tRP. 4 RESET 5 BP 6 HF_PWR Hands-Free Enable Input. Drive HF_PWR high or apply a pulse to enable the MAX8620Y. Power is enabled for 1.31s (typ) following a rising edge at HF_PWR (Table 2, Figure 4). 7 PWR_ON Power-Enable Input. Drive PWR_ON high to enable the MAX8620Y (Table 2, Figure 4). Drive PWR_ON low to enter shutdown mode. In shutdown, the LX node is high impedance and both LDOs are disabled (depending on the state of HF_PWR). 8 FB Step-Down Converter Output-Voltage Feedback Input. VFB regulates to 0.6V (typ). Connect FB to the center of an external resistor-divider between LX and GND to set VOUT3 between 0.6V and 3.3V (see the Setting the Step-Down Output Voltage (OUT3) section). 9 GND Reference Bypass Capacitor Node. Bypass BP with a 0.01µF capacitor to GND. BP is high impedance when the MAX8620Y is disabled (PWR_ON = HF_PWR = low). Ground. Connect GND to the exposed pad. 10 LX Inductor Connection. LX is internally connected to the drain of the internal p-channel power MOSFET and the drain of the n-channel synchronous rectifier. LX is high impedance when OUT3 is disabled. 11 IN2 Power Input 2. Connect IN2 to IN1 as close to the device as possible. 12 IN1 Power Input 1. Connect IN1 to IN2 as close to the device as possible. Bypass IN1 to GND with a 10µF ceramic capacitor, as close to the device as possible. 13 OUT1 300mA LDO Output 1. Bypass OUT1 to GND with a 4.7µF ceramic capacitor for 300mA applications, or a 2.2µF ceramic capacitor for 150mA applications. OUT1 is high impedance when disabled. 14 OUT2 300mA LDO Output 2. Bypass OUT2 to GND with a 4.7µF ceramic capacitor for 300mA applications, or a 2.2µF ceramic capacitor for 150mA applications. OUT2 is high impedance when disabled. EP EP Exposed Pad. Connect EP to GND. _______________________________________________________________________________________ 7 MAX8620Y Pin Description MAX8620Y µPMIC for Microprocessors or DSPs in Portable Equipment fixed frequency up to 4MHz, allowing for ultra-small external components. The step-down converter output current is guaranteed up to 500mA. When the step-down converter output voltage falls below the regulation threshold, the error comparator begins a switching cycle by turning the high-side pFET switch on. This switch remains on until the minimum ontime (tON) expires and the output voltage is in regulation or the current-limit threshold (ILIM3P) is exceeded. Once off, the high-side switch remains off until the minimum off-time (t OFF) expires and the output voltage again falls below the regulation threshold. During this off period, the low-side synchronous rectifier turns on and remains on until either the high-side switch turns on or the inductor current reduces to the rectifier-off current threshold (ILXOFF = 30mA (typ)). The internal synchronous rectifier eliminates the need for an external Schottky diode. Detailed Description The MAX8620Y µPMIC is designed to power low-corevoltage microprocessors or DSPs in portable devices. The µPMIC contains a fixed-frequency, high-efficiency step-down converter; two low-dropout regulators (LDOs); a 30ms (min) reset timer; and power-on/off control logic (Figure 1). Step-Down DC-DC Control Scheme The MAX8620Y step-down converter is optimized for high-efficiency voltage conversion over a wide load range while maintaining excellent transient response, minimizing external component size, and minimizing output voltage ripple. The DC-DC converter (OUT3) also features an optimized on-resistance internal MOSFET switch and synchronous rectifier to maximize efficiency. The MAX8620Y utilizes a proprietary hysteretic-PWM control scheme that switches with nearly VIN IN1 CIN IN2 pFET MAX8620Y STEP-DOWN CONVERTER CONTROL L LX OUT3 nFET R1 COUT3 CFF PWR_ON CONTROL LOGIC 0.6V OUT1 UVLO LDO1 CONTROL HF_PWR ONESHOT TIMER RESET SEL1 SEL2 R2 FB ENABLE OUTPUTVOLTAGE SELECT OUT1 COUT1 RESET RESET OUT2 LDO2 CONTROL RPU OUT2 COUT2 IN1 EN2 BP EN2 REFERENCE CBP GND GND Figure 1. Functional Diagram 8 _______________________________________________________________________________________ µPMIC for Microprocessors or DSPs in Portable Equipment compares the reference voltage to a feedback voltage and amplifies the difference. If the feedback voltage is lower than the reference voltage, the pass-transistor gate is pulled lower, allowing more current to pass to the outputs and increasing the output voltage. If the feedback voltage is too high, the pass-transistor gate is pulled up, allowing less current to pass to the output. Table 1. MAX8620Y Output-Voltage Selection Two low-dropout, low-quiescent-current, high-accuracy linear regulators supply loads up to 300mA each. The LDO output voltages are set using SEL1 and SEL2 (see Table 1). As shown in Figure 3, the LDOs include an internal reference, error amplifiers, p-channel pass transistors, internal-programmable voltage-dividers, and an OUT1 power-good comparator. Each error amplifier IN2 SEL1 SEL2 OUT1 OUT2 IN1 IN1 3.00V 2.50V IN1 OPEN 2.85V 2.85V IN1 GND 3.00V 3.00V OPEN IN1 3.30V 2.50V OPEN OPEN 2.80V 2.60V OPEN GND 3.30V 1.80V GND IN1 2.85V 2.60V GND OPEN 2.60V 2.60V GND GND 1.80V 2.60V 2.6V 300mA OUT1 COUT1 4.7µF CIN 10µF Li+ CELL 100kΩ IN1 RESET IN RESET L 2.2µH MAX8620Y LX BP R1 150kΩ CBP 0.01µF CFF 150pF OUT3, 500mA DSP OR µP R2 75kΩ SEL1 OUT2 POWER-ON KEY HF_PWR EN2 CORE COUT3 2.2µF FB SEL2 VBATT I/O 2.6V 300mA ANALOG COUT2 4.7µF ON/OFF PWR_ON 1MΩ GND Figure 2. Typical MAX8620Y DSP or µP Application _______________________________________________________________________________________ 9 MAX8620Y Voltage-Positioning Load Regulation As seen in Figure 2, the MAX8620Y uses a unique stepdown converter feedback network. By taking feedback from the LX node through R1, the usual phase lag due to the output capacitor is removed, making the loop exceedingly stable and allowing the use of a very small ceramic output capacitor. This configuration causes the output voltage to shift by the inductor series resistance multiplied by the load current. This output-voltage shift is known as voltage-positioning load regulation. Voltage-positioning load regulation greatly reduces overshoot during load transients, which effectively halves the peak-to-peak output-voltage excursions compared to traditional step-down converters. See the Load-Transient Response graph in the Typical Operating Characteristics section. MAX8620Y µPMIC for Microprocessors or DSPs in Portable Equipment IN1 MAX8620Y MOS DRIVER WITH ILIMIT P PWR_ON ERRORAMP 2 HF_PWR OUT2 ON/OFF LOGIC P OUT1 MOS DRIVER WITH ILIMIT ERRORAMP 1 EN2 LDO THERMAL SENSOR RESET 1.25V REF 87% REGULATION BP POK TIMER GND Figure 3. Linear-Regulator Functional Diagram LDO Output-Voltage Selection (SEL1, SEL2) As shown in Table 1, the LDO output voltages, OUT1 and OUT2, are set according to the logic states of SEL1 and SEL2. SEL1 and SEL2 are trilevel inputs: IN1, open, and GND. The input voltage, VIN1, must be a dropout voltage (VDO) greater than the selected OUT1 and OUT2 voltages. Power-Enable Input (PWR_ON) Drive PWR_ON low to place the MAX8620Y in powerdown mode and reduce supply current to 5.5µA (typ). Connect PWR_ON to IN1 = IN2 or logic-high to enable the MAX8620Y. EN2 enables and disables OUT2 when 10 PWR_ON is high (Table 2). OUT1, OUT2, and OUT3 are all disabled when PWR_ON is low. HF_PWR can temporarily bring the MAX8620 out of power-down mode when PWR_ON is low (see the HF_PWR section). In power-down, the control circuitry, internal-switching pchannel MOSFET, and the internal synchronous rectifier (n-channel MOSFET) turn off, and LX becomes high impedance. In addition, both LDOs are disabled. OUT2 Enable (EN2) Drive EN2 low to enable OUT2. Drive EN2 high to disable OUT2. If the MAX8620Y is placed into powerdown using PWR_ON (PWR_ON = low), OUT2 does not power regardless of the status of EN2 (Table 2). ______________________________________________________________________________________ µPMIC for Microprocessors or DSPs in Portable Equipment MAX8620Y Table 2. MAX8620Y Power Modes PWR_ON 1 1 0 0 0 HF_PWR* X X 1 1 0 EN2 1 0 1 0 X OUT1 AND OUT3 Enabled Enabled Enabled Enabled Disabled OUT2 Disabled Enabled Disabled Enabled Disabled *A rising edge at HF_PWR initiates a 1.31s one-shot timer. The status of HF_PWR shown in Table 2 indicates whether the one-shot period has expired as follows: 1 = During tHP 0 = tHP has expired Hands-Free Enable Input (HF_PWR) Power-Supply Sequencing A rising edge at HF_PWR generates an internal oneshot pulse that enables the MAX8620Y for 1.31s (tHF). If HF_PWR remains high after tHF expires, the MAX8620Y reenters shutdown. During tHF, OUT3 and OUT1 are enabled so the microprocessor (µP) can initialize and assert a logic-high at PWR_ON. OUT2 enables during tHF if EN2 is low. Once PWR_ON is high, the status of HF_PWR is ignored. If PWR_ON remains low after tHF expires, the MAX8620Y reenters shutdown. The step-down converter output (OUT3) always powers up first and powers down last (Figure 4). OUT1 powers approximately 70µs after OUT3, and OUT2 powers approximately 50µs after VOUT1 reaches 87% (typ) of its regulation voltage. When PWR_ON goes low, OUT1 turns off, then OUT2 turns off, then OUT3 turns off 50µs after PWR_ON goes low. 50µs HF_PWR tHF PWR_ON OUT3 tSU1 VTHR OUT1 tSU2 OUT2 RESET tRP EN2 Figure 4. MAX8620Y Power-Supply Sequencing ______________________________________________________________________________________ 11 MAX8620Y µPMIC for Microprocessors or DSPs in Portable Equipment Reset Output (RESET) RESET is an open-drain, active-low output that indicates the status of OUT1. RESET is typically pulled up through a 100kΩ resistor to the system logic voltage. RESET asserts at power-up. The reset timer begins once V OUT1 reaches 87% of regulation. RESET deasserts 60ms after VOUT1 rises above 87% (typ) of regulation (see the Typical Operating Characteristics). RESET also asserts when OUT1 is disabled. Reference Bypass Capacitor Node (BP) An optional 0.01µF bypass capacitor at BP creates a lowpass filter for LDO noise reduction. OUT1 and OUT2 exhibit 45µVRMS of output-voltage noise with CBP = 0.01µF and COUT1 = COUT2 = 4.7µF. Undervoltage Lockout VIN1 = VIN2 must exceed the 2.85V typical undervoltage-lockout threshold (VUVLO) before the MAX8620Y enables OUT3 to begin power-supply sequencing (see the Power-Supply Sequencing section). The UVLO threshold hysteresis is typically 0.5V. event of fault conditions. For continuous operation, do not exceed the absolute-maximum junction-temperature rating of TJ = +150°C. Applications Information Power-On Closed-Loop System When the MAX8620Y is used in conjunction with a microcontroller, HF_PWR and PWR_ON can implement a short-key power-on closed-loop system (Figure 5). The MAX8620Y detects a rising edge at HF_PWR and generates an internal 1.31s (typ) one-shot pulse that begins power sequencing and temporarily enables OUT1, OUT2, and OUT3 (depending on the state of EN2). The 1.31s of power provides time for the processor to initialize and assert a logic-high at PWR_ON. Once PWR_ON is driven high, OUT3, OUT1, and OUT2 (depending on the state of EN2) remain enabled. If the microcontroller does not drive PWR_ON high during tHF, the MAX8620Y disables OUT1, OUT2, and OUT3, and reenters shutdown. Current Limiting The MAX8620Y 300mA LDOs limit their output current to ILIM_ = 550mA (typ). If the LDO output current exceeds ILIM_, the corresponding LDO output voltage drops. The step-down converter limits ILIM3P to 675mA (min). Thermal-Overload Protection Thermal-overload protection limits total power dissipation in the MAX8620Y. Independent thermal-protection circuits monitor the step-down converter and the linearregulator circuits. When the MAX8620Y junction temperature exceeds T J = +160°C, the thermal-overload protection circuit disables the corresponding circuitry, allowing the IC to cool. The thermal-overload protection circuitry enables the MAX8620Y after the junction temperature cools by 15°C, resulting in a pulsed output during continuous thermal-overload conditions. Thermaloverload protection safeguards the MAX8620Y in the 12 POWER-ON KEY MAX8620Y VCORE VI/O VANA µP HF_PWR PWR_ON 1MΩ POWER-HOLD SIGNAL Figure 5. Short-Key Power-On Closed-Loop System ______________________________________________________________________________________ PWR HOLD µPMIC for Microprocessors or DSPs in Portable Equipment POWER-ON KEY MAX8620Y VCORE VI/O VANA µP PWR_ON PWR HOLD 1MΩ current, IFB, is typically 10nA. Select R2 so the resistordivider bias current dominates IFB by a factor of 10. A wide range of resistor values is acceptable, but a good starting point is to choose R2 = 100kΩ. R1 is given by: ⎛V ⎞ R1 = R2 ⎜ OUT3 − 1⎟ ⎝ VFB ⎠ where VFB = 0.6V. VOUT3 can be set between 0.6V and 3.3V, but the stepdown converter dropout voltage and inductor voltage drop impact how close VOUT3 can be to VIN2. Total dropout voltage is a function of the pFET on-resistance, the DCR of the inductor, and the load as follows: VOUT3(DO) = IOUT3 × (RONP + DCRINDUCTOR ) For example, with 300mA load: POWER-HOLD SIGNAL VOUT3(DO) = 300mA × (0.65Ω + 50mΩ) = 210mV Figure 6. Long-Key Power-On Closed Loop As a result, V IN1 = V IN2 must exceed the desired VOUT3 by 210mV to maintain regulation. Inductor Selection MAX8620Y AC ADAPTER HF_PWR HANDS-FREE KIT VCORE VI/O VANA PWR_ON POWER-ON KEY µP PWR HOLD 1MΩ POWER-HOLD SIGNAL Figure 7. Multiple Power-On Inputs Setting the Step-Down Output Voltage (OUT3) Select a step-down converter output voltage between 0.6V and 3.3V by connecting a resistor voltage-divider between LX, FB, and GND (see Figure 2). The FB bias The MAX8620Y step-down converter operates with inductors between 1µH and 4.7µH. Low inductance values are physically smaller but require faster switching, which results in some efficiency loss. See the Typical Operating Characteristics section for efficiency and switching frequency versus inductor value plots. The inductor’s DC current rating needs to be only 100mA greater than the application’s maximum load current because the MAX8620Y step-down converter features zero-current overshoot during startup and load transients. For output voltages above 2.0V, when light-load efficiency is important, the minimum recommended inductor is 2.2µH. For optimum voltage-positioning load transients, choose an inductor with DC series resistance in the 50mΩ to 150mΩ range (Table 3). For higher efficiency at heavy loads (above 200mA) or minimal load regulation (but some transient overshoot), the resistance should be kept below 100mΩ. For light-load applications up to 200mA, much higher resistance is acceptable with very little impact on performance. ______________________________________________________________________________________ 13 MAX8620Y If a long-key press is preferred, see Figure 6. PWR_ON must remain high until a microprocessor asserts a logichigh signal when using this circuit. If a system includes multiple power-on sources, use a diode OR configuration, as shown in Figure 7. MAX8620Y µPMIC for Microprocessors or DSPs in Portable Equipment Table 3. Suggested Inductors MANUFACTURER SERIES INDUCTANCE (µH) ESR (Ω) CURRENT RATING (mA) DIMENSIONS (mm) LB2012 1.0 2.2 0.15 0.23 300 240 2.0 x 1.25 x 1.25 = 3.1mm3 LB2016 1.0 1.5 2.2 3.3 0.09 0.11 0.13 0.20 455 350 315 280 2.0 x 1.6 x 1.8 = 5.8mm3 LB2518 1.0 1.5 2.2 3.3 0.06 0.07 0.09 0.11 500 400 340 270 2.5 x 1.8 x 2.0 = 9mm3 LBC2518 1.0 1.5 2.2 3.3 4.7 0.08 0.11 0.13 0.16 0.20 775 660 600 500 430 2.5 x 1.8 x 2.0 = 9mm3 CB2012 2.2 4.7 0.23 0.40 410 300 2.0 x 1.25 x 1.25 = 3.1mm3 CB2016 2.2 4.7 0.13 0.25 510 340 2.0 x 1.6 x 1.8 = 5.8mm3 CB2518 2.2 4.7 0.09 0.13 510 340 2.5 x 1.8 x 2.0 = 9mm3 LQH32C_53 1.0 2.2 4.7 0.06 0.10 0.15 1000 790 650 3.2 x 2.5 x 1.7 = 14mm3 LQM43FN 2.2 4.7 0.10 0.17 400 300 4.5 x 3.2 x 0.9 = 13mm3 D310F 1.5 2.2 3.3 0.13 0.17 0.19 1230 1080 1010 3.6 x 3.6 x 1.0 = 13mm3 D312C 1.5 2.2 2.7 3.3 0.10 0.12 0.15 0.17 1290 1140 980 900 3.6 x 3.6 x 1.2 = 16mm3 CDRH2D11 1.5 2.2 3.3 4.7 0.05 0.08 0.10 0.14 900 780 600 500 3.2 x 3.2 x 1.2 = 12mm3 Taiyo Yuden Murata TOKO Sumida 14 ______________________________________________________________________________________ µPMIC for Microprocessors or DSPs in Portable Equipment Step-Down Converter Output Capacitor The output capacitor, COUT3, is required to keep the output voltage ripple small and to ensure regulation loop stability. COUT3 must have low impedance at the switching frequency. Ceramic capacitors with X5R or X7R dielectric are highly recommended due to their small size, low ESR, and small temperature coefficients. Due to the unique feedback network, the output capacitance can be very low. For most applications, a 2.2µF capacitor is sufficient. For optimum load-transient performance and very low output ripple, the output capacitor value in µFs should be equal to or larger than the inductor value in µHs. Input Capacitor The input capacitor, CIN, reduces the current peaks drawn from the battery or input power source and reduces switching noise in the IC. The impedance of CIN at the switching frequency should be kept very low. Ceramic capacitors with X5R or X7R dielectrics are highly recommended due to their small size, low ESR, and small temperature coefficients. Use a 10µF ceramic capacitor or equivalent amount of multiple capacitors in parallel between IN1 and GND. Connect C IN as close as possible to the MAX8620Y to minimize the impact of PC board trace inductance. Feed-Forward Capacitor The feed-forward capacitor, CFF, sets the feedback loop response, controls the switching frequency, and is critical in obtaining the best efficiency possible. Choose a small ceramic C0G (NPO) or X7R capacitor with a value given by: CFF = L × 10S R1 where R1 is the resistor between LX and FB (Figure 2). Select the closest standard value to CFF as possible. LDO Output Capacitors For applications that require greater than 150mA of output current, connect a 4.7µF ceramic capacitor between the LDO output and GND. For applications that require less than 150mA of output current, connect a 2.2µF ceramic capacitor between the LDO output and GND. The LDO output capacitor’s (COUT_) equiva- lent series resistance (ESR) affects stability and output noise. Use output capacitors with an ESR of 0.1Ω or less to ensure stability and optimum transient response. Surface-mount ceramic capacitors have very low ESR and are commonly available in values up to 10µF. Connect COUT as close as possible to the MAX8620Y to minimize the impact of PC board trace inductance. Power Dissipation and Thermal Considerations The MAX8620Y total power dissipation, PD, is estimated using the following equations: PD = PLOSS(OUT1) + PLOSS(OUT2) + PLOSS(OUT3) PLOSS(OUT1) = I(OUT1) (VIN − VOUT1) PLOSS(OUT2) = I(OUT2) (VIN − VOUT2 ) ⎛ PLOSS(OUT3) = PIN(OUT3) ⎜1 ⎝ − η ⎞ ⎟ 100 ⎠ − I(OUT 3) 2 × RDC(INDUCTOR) ` where PIN(OUT3) is the input power for OUT3, η is the step-down converter efficiency, and RDC(INDUCTOR) is the inductor’s DC resistance. The die junction temperature can be calculated as follows: TJ = TA + PD × θ JA where θJA = 55°C/W at +70°C. TJ should not exceed +150°C in normal operating conditions. PC Board Layout and Routing High switching frequencies and relatively large peak currents make the PC board layout a very important aspect of design. Good design minimizes excessive EMI on the feedback paths and voltage gradients in the ground plane, both of which can result in instability or regulation errors. Connect CIN close to IN1 and GND. Connect the inductor and output capacitors (COUT3) as close to the IC as possible and keep the traces short, direct, and wide. The traces between COUT3, CFF, and FB are sensitive to inductor magnetic-field interference. Route these traces between ground planes or keep the traces away from the inductor. ______________________________________________________________________________________ 15 MAX8620Y Capacitor Selection IN1 IN2 LX GND FB TOP VIEW OUT1 Pin Configuration OUT2 Connect GND to the ground plane. The external feedback network should be very close to the FB pin, within 0.2in (5mm). Keep noisy traces, such as the LX node, as short as possible. Connect GND to the exposed paddle directly under the IC. Figure 8 and the MAX8620Y evaluation kit illustrate examples of PC board layout and routing schemes. 14 13 12 11 10 9 8 C6 R1 L1 C4 OUT3 4 5 6 7 BP HF_PWR PWR_ON GND 3 RESET U1 2 EN2 1 C1 SEL2 IN SEL1 SEL1 SEL2 EN2 RESET HF_PWR OUT1 C3 C2 OUT2 MAX8620Y R2 C5 MAX8620Y µPMIC for Microprocessors or DSPs in Portable Equipment 3mm x 3mm x 0.8mm TDFN PWR_ON Chip Information Figure 8. Recommended PC Board Layout 16 TRANSISTOR COUNT: 4481 PROCESS: BiCMOS ______________________________________________________________________________________ µPMIC for Microprocessors or DSPs in Portable Equipment 6, 8, &10L, DFN THIN.EPS D2 D A2 PIN 1 ID N 0.35x0.35 b PIN 1 INDEX AREA E [(N/2)-1] x e REF. E2 DETAIL A e k A1 CL CL A L L e e PACKAGE OUTLINE, 6,8,10 & 14L, TDFN, EXPOSED PAD, 3x3x0.80 mm -DRAWING NOT TO SCALE- 21-0137 G 1 2 ______________________________________________________________________________________ 17 MAX8620Y Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) MAX8620Y µPMIC for Microprocessors or DSPs in Portable Equipment Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) COMMON DIMENSIONS MIN. MAX. D 0.70 2.90 0.80 3.10 E A1 2.90 0.00 3.10 0.05 L k 0.20 0.40 0.25 MIN. A2 0.20 REF. SYMBOL A PACKAGE VARIATIONS PKG. CODE N D2 E2 e JEDEC SPEC b [(N/2)-1] x e DOWNBONDS ALLOWED T633-1 6 1.50±0.10 2.30±0.10 0.95 BSC MO229 / WEEA 0.40±0.05 1.90 REF NO T633-2 6 1.50±0.10 2.30±0.10 0.95 BSC MO229 / WEEA 0.40±0.05 1.90 REF NO T833-1 8 1.50±0.10 2.30±0.10 0.65 BSC MO229 / WEEC 0.30±0.05 1.95 REF NO T833-2 8 1.50±0.10 2.30±0.10 0.65 BSC MO229 / WEEC 0.30±0.05 1.95 REF NO T833-3 8 1.50±0.10 2.30±0.10 0.65 BSC MO229 / WEEC 0.30±0.05 1.95 REF YES T1033-1 10 1.50±0.10 2.30±0.10 0.50 BSC MO229 / WEED-3 0.25±0.05 2.00 REF NO T1433-1 14 1.70±0.10 2.30±0.10 0.40 BSC ---- 0.20±0.05 2.40 REF YES T1433-2 14 1.70±0.10 2.30±0.10 0.40 BSC ---- 0.20±0.05 2.40 REF NO PACKAGE OUTLINE, 6,8,10 & 14L, TDFN, EXPOSED PAD, 3x3x0.80 mm -DRAWING NOT TO SCALE- 21-0137 G 2 2 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 18 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2005 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc.