MIC24052 12V, 6A High-Efficiency Buck Regulator with HyperLight Load® Features General Description • HyperLight Load® Efficiency: up to 80% at 10 mA • Hyper Speed Control® Architecture Enables: - High Delta V Operation (VIN = 19V and VOUT = 0.8V) - Small Output Capacitance • 4.5V to 19V Input Voltage Range • 6A Output Current Capability • Up to 95% Efficiency • Adjustable Output from 0.8V to 5.5V • ±1% Feedback Accuracy • Any Capacitor Stable - Zero-to-High ESR • 600 kHz Switching Frequency • Power Good (PG) Output • Foldback Current-Limit and “Hiccup Mode” Short-Circuit Protection • Supports Safe Start-Up into a Pre-Biased Load • –40°C to +125°C Junction Temperature Range • Available in a 28-pin 5 mm x 6 mm QFN Package The MIC24052 is a constant-frequency, synchronous DC/DC buck regulator featuring a unique adaptive on-time control architecture. The MIC24052 operates over an input supply range of 4.5V to 19V. It has an internal linear regulator which provides a regulated 5V to power the internal control circuitry. The MIC24052 operates at a constant 600 kHz switching frequency in continuous-conduction mode and can be used to provide up to 6A of output current. The output voltage is adjustable down to 0.8V. Microchip’s HyperLight Load® architecture provides the same high-efficiency and ultra-fast transient response as the Hyper Speed Control® architecture under medium to heavy loads, but also maintains high efficiency under light load conditions by transitioning to variable-frequency, discontinuous-mode operation. The MIC24052 offers a full suite of protection features to ensure protection of the IC during fault conditions. These include undervoltage lockout to ensure proper operation under power-sag conditions, thermal shutdown, internal soft-start to reduce the inrush current, foldback current limit and “hiccup mode” short-circuit protection. The MIC24052 includes a power good (PG) output to allow simple sequencing. Applications • Servers and Workstations • Routers, Switches, and Telecom Equipment • Base Stations The 6A Hyper Speed Control part, MIC24051, is also available on Microchip’s web site. Typical Application Schematic MIC24052 28-PIN QFN MIC24052 2.2μF 10k 4.7μF x2 10k EN 2016 Microchip Technology Inc. BST 0.1μF 2.2μH PG PG VIN 4.5V TO 19V VDD PVDD SGND VIN PVIN PGND EN SW CS VOUT 1.8V/6A 0.1μF 4.7nF 19.6k 2.49k 100μF FB 2.00k DS20005659A-page 1 MIC24052 Package Type VDD VIN EN PG FB SGND MIC24052 28-PIN QFN (JL) (TOP VIEW) 28 27 26 25 24 23 PVDD PGND NC 1 3 20 SW PGND PGND PGND PGND 4 19 5 18 22 PGND 2 6 SW 21 PVIN 17 15 13 14 PVIN PVIN PVIN PVIN PVIN PVIN 9 10 11 12 PVIN 16 8 SW SW SW SW 7 CS PGND BST Block Diagram D1 MIC24052 VDD VIN LDO PVDD 2.2μF FIXED TON ESTIMATE VDD VIN UVLO PVIN MODIFIED TOFF 10k 0.1μF CBST HSD CONTROL LOGIC TIMER SOFT-START EN VIN 4.5V to 19V 4.7μF x2 BST SW CL and ZC DETECTION 2.2μH CS 0.1μF SOFT START THERMAL SHUTDOWN PVDD LSD INTERNAL RIPPLE INJECTION VDD VOUT 1.8V/6A R1 2.49k 4.7nF 100μF 19.6k SGND PGND COMPENSATION 10k gm EA COMP PG FB R2 2.00k 8% VREF 0.8V 92% DS20005659A-page 2 2016 Microchip Technology Inc. MIC24052 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings † PVIN to PGND ............................................................................................................................................ –0.3V to +29V VIN to PGND ............................................................................................................................................... –0.3V to PVIN PVDD, VDD to PGND .................................................................................................................................... –0.3V to +6V VSW, VCS to PGND ....................................................................................................................... –0.3V to (PVIN + 0.3V) VBST to VSW ................................................................................................................................................. –0.3V to +6V VBST to PGND............................................................................................................................................ –0.3V to +35V VFB, VPG to PGND ......................................................................................................................... –0.3V to (VDD + 0.3V) VEN to PGND ...................................................................................................................................–0.3V to (VIN + 0.3V) PGND to SGND ........................................................................................................................................ –0.3V to +0.3V ESD Rating (Note 1) .................................................................................................................................. ESD Sensitive Operating Ratings ‡ Supply Voltage (PVIN, VIN)......................................................................................................................... +4.5V to +19V PVDD, VDD Supply Voltage (PVDD, VDD)................................................................................................... +4.5V to +5.5V Enable Input (VEN) ..............................................................................................................................................0V to VIN † Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended periods may affect device reliability. ‡ Notice: The device is not guaranteed to function outside its operating ratings. Note 1: Devices are ESD sensitive. Handling precautions recommended. Human body model, 1.5 kΩ in series with 100 pF. 2016 Microchip Technology Inc. DS20005659A-page 3 MIC24052 TABLE 1-1: ELECTRICAL CHARACTERISTICS Electrical Characteristics: PVIN = VIN = VEN = 12V, VBST – VSW = 5V; TA = 25°C, unless noted. Bold values indicate –40°C ≤ TJ ≤ +125°C. (Note 1). Parameters Sym. Min. Typ. Max. Units Conditions VIN, PVIN 4.5 — 19 V — Quiescent Supply Current — — 450 750 µA VFB = 1.5V (non-switching) Shutdown Supply Current — — 5 10 µA VEN = 0V VDD Output Voltage — 4.8 5 5.4 V VIN = 7V to 19V, IDD = 40 mA VDD UVLO Threshold — 3.7 4.2 4.5 V VDD Rising VDD UVLO Hysteresis — — 400 — mV — Dropout Voltage (VIN – VDD) — — 380 600 mV IDD = 25 mA VOUT 0.8 — 5.5 V — 0.792 0.8 0.808 0.788 0.8 0.812 Power Supply Input Input Voltage Range VDD Supply Voltage DC/DC Controller Output Voltage Adjust Range Reference V 0°C ≤ TJ ≤ 85°C (±1.0%) Feedback Reference Voltage — Load Regulation — — 0.25 — % IOUT = 1A to 6A (Continuous Mode) Line Regulation — — 0.25 — % VIN = 4.5V to 19V FB Bias Current — — 50 500 nA VFB = 0.8V EN Logic Level High — 1.8 — — V — EN Logic Level Low — — — 0.6 V — EN Bias Current — — 6 30 µA VEN = 12V Switching Frequency (Note 2) — 450 600 750 kHz VOUT = 2.5V Maximum Duty Cycle (Note 3) — — 82 — % VFB = 0V Minimum Duty Cycle — — 0 — % VFB = 1.0V Minimum Off-Time — — 300 — ns — — — 3 — ms — Peak Inductor Current-Limit Threshold — 7.5 11 17 A VFB = 0.8V, TJ = 25°C Peak Inductor Current-Limit Threshold — 6.6 11 17 A VFB = 0.8V, TJ = 125°C Short-Circuit Current — — 8 — A VFB = 0V –40°C ≤ TJ ≤ 125°C (±1.5%) Enable Control Oscillator Soft-Start Soft-Start Time Short-Circuit Protection Note 1: 2: 3: Specification for packaged product only. Measured in test mode. The maximum duty-cycle is limited by the fixed mandatory off-time (tOFF) of typically 300 ns. DS20005659A-page 4 2016 Microchip Technology Inc. MIC24052 TABLE 1-1: ELECTRICAL CHARACTERISTICS (CONTINUED) Electrical Characteristics: PVIN = VIN = VEN = 12V, VBST – VSW = 5V; TA = 25°C, unless noted. Bold values indicate –40°C ≤ TJ ≤ +125°C. (Note 1). Parameters Sym. Min. Typ. Max. Units Conditions Top-MOSFET RDS(ON) — — 42 — mΩ ISW = 3A Bottom-MOSFET RDS(ON) — — 12.5 — mΩ ISW = 3A SW Leakage Current — — — 60 µA VEN = 0V VIN Leakage Current — — — 25 µA VEN = 0V Power Good Threshold Voltage — 85 92 95 %VOUT Sweep VFB from Low to High Power Good Hysteresis — — 5.5 — %VOUT Sweep VFB from High to Low Power Good Delay Time — — 100 — µs Sweep VFB from Low to High Power Good Low Voltage — — 70 200 mV Sweep VFB < 0.9 x VNOM, IPG = 1 mA Overtemperature Shutdown — — 160 — °C TJ Rising Overtemperature Shutdown Hysteresis — — 15 — °C — Internal FETs Power Good (PG) Thermal Protection Note 1: 2: 3: Specification for packaged product only. Measured in test mode. The maximum duty-cycle is limited by the fixed mandatory off-time (tOFF) of typically 300 ns. 2016 Microchip Technology Inc. DS20005659A-page 5 MIC24052 TEMPERATURE SPECIFICATIONS Parameters Sym. Min. Typ. Max. Units Conditions TJ –40 — +125 °C Note 1 Temperature Ranges Junction Operating Temperature Range Maximum Junction Temperature — — — +150 °C — Storage Temperature TS –65 — +150 °C — Lead Temperature — — — +260 °C Soldering, 10s Thermal Resistance, 5x6 QFN-28 JA — 28 — °C/W Note 2 Thermal Resistance, 5x6 QFN-28 JC — 2.5 — °C/W — Package Thermal Resistances Note 1: 2: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction temperature and the thermal resistance from junction to air (i.e., TA, TJ, JA). Exceeding the maximum allowable power dissipation will cause the device operating junction temperature to exceed the maximum +125°C rating. Sustained junction temperatures above +125°C can impact the device reliability. PD(MAX) = (TJ(MAX) – TA)/JA, where JA depends upon the printed circuit layout. A 5 square inch 4 layer, 0.62”, FR-4 PCB with 2 oz. finish copper weight per layer is used for the JA. DS20005659A-page 6 2016 Microchip Technology Inc. MIC24052 2.0 Note: TYPICAL PERFORMANCE CURVES The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. FIGURE 2-1: VIN Operating Supply Current vs. Input Voltage. FIGURE 2-4: Voltage. Feedback Voltage vs. Input FIGURE 2-2: Input Voltage. VIN Shutdown Current vs. FIGURE 2-5: Voltage. Total Regulation vs. Input FIGURE 2-3: Input Voltage. VDD Output Voltage vs. FIGURE 2-6: Input Voltage. Output Current Limit vs. 2016 Microchip Technology Inc. DS20005659A-page 7 MIC24052 FIGURE 2-7: Input Voltage. Switching Frequency vs. FIGURE 2-10: VIN Operating Supply Current vs. Temperature. FIGURE 2-8: Input Voltage. Enable Input Current vs. FIGURE 2-11: Temperature. VIN Shutdown Current vs. FIGURE 2-9: vs. Input Voltage. PG Threshold/VREF Ratio FIGURE 2-12: Temperature. VDD UVLO Threshold vs. DS20005659A-page 8 2016 Microchip Technology Inc. MIC24052 FIGURE 2-13: Temperature. Feedback Voltage vs. FIGURE 2-16: Temperature. Switching Frequency vs. FIGURE 2-14: Temperature. Load Regulation vs. FIGURE 2-17: VDD vs. Temperature. FIGURE 2-15: Temperature. Line Regulation vs. FIGURE 2-18: Temperature. Output Current Limit vs. 2016 Microchip Technology Inc. DS20005659A-page 9 MIC24052 FIGURE 2-19: Output Current. Feedback Voltage vs. FIGURE 2-22: Output Current. FIGURE 2-20: Current. Output Voltage vs. Output FIGURE 2-23: Output Voltage (VIN = 5V) vs. Output Current. FIGURE 2-21: Current. Line Regulation vs. Output FIGURE 2-24: Output Current. DS20005659A-page 10 Switching Frequency vs. Efficiency (VIN = 5V) vs. 2016 Microchip Technology Inc. MIC24052 FIGURE 2-25: IC Power Dissipation (VIN = 5V) vs. Output Current. FIGURE 2-28: IC Power Dissipation (VIN = 12V) vs. Output Current. FIGURE 2-26: Die Temperature (VIN = 5V) vs. Output Current (Note 1). FIGURE 2-29: Die Temperature (VIN = 12V) vs. Output Current (Note 1). FIGURE 2-27: Output Current. FIGURE 2-30: Thermal Derating vs. Ambient Temperature (Note 1). Efficiency (VIN = 12V) vs. 2016 Microchip Technology Inc. DS20005659A-page 11 MIC24052 VIN (10V/div) VIN = 12V, VOUT = 1.8V IOUT = 6A VSW (10V/div) VOUT (2V/div) IL (5A/div) Time (2ms/div) FIGURE 2-31: Thermal Derating vs. Ambient Temperature (Note 1). FIGURE 2-34: VIN Soft Turn-On. VIN (10V/div) VIN = 12V VOUT = 1.8V IOUT = 6A VSW (10V/div) VOUT (2V/div) IL (5A/div) Time (1ms/div) FIGURE 2-32: Thermal Derating vs. Ambient Temperature (Note 1). FIGURE 2-35: VIN Soft Turn-Off. VEN (5V/div) VOUT (1V/div) VIN = 12V VOUT = 1.8V IOUT = 6A IL (5A/div) Time (2ms/div) FIGURE 2-33: Thermal Derating vs. Ambient Temperature (Note 1). FIGURE 2-36: Rise Time. Enable Turn-On Delay and Note 1: The temperature measurement was taken at the hottest point on the MIC24052 case mounted on a 5 square inch 4 layer, 0.62”, FR-4 PCB with 2oz finish copper weight per layer, see Thermal Measurement section. Actual results will depend upon the size of the PCB, ambient temperature and proximity to other heat emitting components. DS20005659A-page 12 2016 Microchip Technology Inc. MIC24052 VEN (2V/div) VIN = 12V VOUT = 1.8V IOUT = 6A VEN (1V/div) VOUT (1V/div) VOUT (1V/div) VIN = 12V VOUT = 1.8V IOUT = 1A IL (5A/div) Time (400μs/div) FIGURE 2-37: Fall Time. Enable Turn-Off Delay and Time (10ms/div) FIGURE 2-40: Enable Thresholds. VIN (10V/div) VOUT (1V/div) VSW (10V/div) VDD (2V/div) VIN = 12V VOUT = 1.8V IOUT = 1A VPREBIAS = 1V VOUT (1V/div) Time (20ms/div) Time (2ms/div) FIGURE 2-38: VIN Start-Up with Pre-Biased Output. VEN (2V/div) VIN = 2V TO 6V VOUT = 1.8V IOUT = 1A FIGURE 2-41: VIN (10V/div) VIN = 12V VOUT = 1.8V IOUT = 6A VDD UVLO Thresholds. VIN = 12V VOUT = 1.8V IOUT = TO SHORT VOUT (200mV/div) VOUT (1V/div) IL (5A/div) IL (5A/div) Time (1ms/div) Time (10ms/div) FIGURE 2-39: Enable Turn-On/Turn-Off. 2016 Microchip Technology Inc. FIGURE 2-42: Power-Up Into Short Circuit. DS20005659A-page 13 MIC24052 VIN = 12V VOUT = 1.8V IOUT = TO SHORT VEN (2V/div) VOUT (200mV/div) VOUT (1V/div) VIN = 12V VOUT = 1.8V IL (5A/div) IOUT (5A/div) Time (400μs/div) FIGURE 2-43: Enable Into Short Circuit. Time (40ms/div) FIGURE 2-46: Threshold. Output Current-Limit VIN = 12V VOUT = 1.8V IOUT = TO SHORT VOUT (1V/div) VIN = 12V VOUT = 1.8V IOUT = 1A VOUT (1V/div) IL (5A/div) VSW (10V/div) Time (200μs/div) FIGURE 2-44: Short Circuit. VIN = 12V VOUT = 1.8V IOUT = 6A VOUT (1V/div) Time (2ms/div) FIGURE 2-47: Output Recovery from Thermal Shutdown. VOUT (20mV/div) (AC-COUPLED) VIN = 12V VOUT = 1.8V IOUT = 6A VSW (10V/div) IL (5A/div) IL (5A/div) Time (400ns/div) Time (2ms/div) FIGURE 2-45: Circuit. DS20005659A-page 14 Output Recovery from Short FIGURE 2-48: = 6A). Switching Waveforms (IOUT 2016 Microchip Technology Inc. MIC24052 VOUT (50mV/div) (AC-COUPLED) VIN = 12V VOUT = 1.8V IOUT = 0A VSW (10V/div) IL (2A/div) Time (2ms/div) FIGURE 2-49: = 0A). Switching Waveforms (IOUT VOUT (200mV/div) (AC-COUPLED) IOUT (2A/div) VIN = 12V VOUT = 1.8V IOUT = 1A TO 6A Time (40μs/div) FIGURE 2-50: Transient Response. 2016 Microchip Technology Inc. DS20005659A-page 15 MIC24052 3.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table 3-1. TABLE 3-1: PIN FUNCTION TABLE Pin Number Pin Name Description 1 PVDD 5V Internal Linear Regulator output. PVDD supply is the power MOSFET gate drive supply voltage and created by internal LDO from VIN. When VIN < +5.5V, PVDD should be tied to PVIN pins. A 2.2 µF ceramic capacitor from the PVDD pin to PGND (Pin 2) must be place next to the IC. 2, 5, 6, 7, 8, 21 PGND Power Ground. PGND is the ground path for the MIC24052 buck converter power stage. The PGND pins connect to the low-side N-Channel internal MOSFET gate drive supply ground, the sources of the MOSFETs, the negative terminals of input capacitors, and the negative terminals of output capacitors. The loop for the power ground should be as small as possible and separate from the signal ground (SGND) loop. 3 NC No connect. 4, 9, 10, 11, 12 SW Switch Node output. Internal connection for the high-side MOSFET source and low-side MOSFET drain. Due to the high-speed switching on this pin, the SW pin should be routed away from sensitive nodes. 13,14,15, 16,17,18,19 PVIN High-Side N-internal MOSFET Drain Connection input. The PVIN operating voltage range is from 4.5V to 19V. Input capacitors between the PVIN pins and the Power Ground (PGND) are required to keep the connection short. 20 BST Boost output. Bootstrapped voltage to the high-side N-channel MOSFET driver. A Schottky diode is connected between the PVDD pin and the BST pin. A boost capacitor of 0.1 μF is connected between the BST pin and the SW pin. Adding a small resistor at the BST pin can slow down the turn-on time of high-side N-Channel MOSFETs. 22 CS Current Sense input. The CS pin senses current by monitoring the voltage across the low-side MOSFET during the OFF-time. The current sensing is necessary for short-circuit protection and zero crossing detection. In order to sense the current accurately, connect the low-side MOSFET drain to SW using a Kelvin connection. The CS pin is also the high-side MOSFET’s output driver return. 23 SGND Signal Ground. SGND must be connected directly to the ground planes. Do not route the SGND pin to the PGND Pad on the top layer (see PCB Layout Recommendations for details). 24 FB Feedback input. Input to the transconductance amplifier of the control loop. The FB pin is regulated to 0.8V. A resistor divider connecting the feedback to the output is used to adjust the desired output voltage. 25 PG Power Good output. Open drain output. The PG pin is externally tied with a resistor to VDD. A high output is asserted when VOUT > 92% of nominal. 26 EN Enable input. A logic level control of the output. The EN pin is CMOS-compatible. Logic high = enable, logic low = shutdown. In the off state, supply current of the device is greatly reduced (typically 5 µA). The EN pin should not be left floating. 27 VIN Power Supply Voltage input. Requires bypass capacitor to SGND. 28 VDD 5V Internal Linear Regulator output. VDD supply is the supply bus for the IC control circuit. VDD is created by internal LDO from VIN. When VIN < +5.5V, VDD should be tied to PVIN pins. A 1 µF ceramic capacitor from the VDD pin to SGND pins must be place next to the IC. DS20005659A-page 16 2016 Microchip Technology Inc. MIC24052 4.0 FUNCTIONAL DESCRIPTION The MIC24052 is an adaptive, ON-time, synchronous step-down, DC/DC regulator with an internal 5V linear regulator and a power good (PG) output. It is designed to operate over a wide input voltage range from 4.5V to 19V and provides a regulated output voltage at up to 6A of output current. An adaptive ON-time control scheme is employed in to obtain a constant switching frequency and to simplify the control compensation. Overcurrent protection is implemented without the use of an external sense resistor. The device includes an internal soft-start function that reduces the power supply input surge current at start-up by controlling the output voltage rise time. 4.1 Theory of Operation The MIC24052 is able to operate in either continuous mode or discontinuous mode. The operating mode is determined by the output of the zero cross comparator (ZC) as shown in the Block Diagram. 4.2 Continuous Mode In continuous mode, the output voltage is sensed by the MIC24052 feedback pin FB via the voltage divider R1 and R2, and compared to a 0.8V reference voltage VREF at the error comparator through a low gain transconductance (gm) amplifier. If the feedback voltage decreases and the output of the gm amplifier is below 0.8V, then the error comparator will trigger the control logic and generate an ON-time period. The ON-time period length is predetermined by the “FIXED tON ESTIMATION” circuitry: EQUATION 4-1: V OUT t ON ESTIMATED = --------------------------------V IN 600kHz Where: VOUT VIN Output voltage Power stage input voltage The maximum duty cycle is obtained from the 300 ns tOFF(min): EQUATION 4-2: t S – t OFF MIN D MAX = ---------------------------------- = 1 – 300ns --------------tS tS Where: tS 1/600 kHz = 1.66 µs It is not recommended to use MIC24052 with an OFF-time close to tOFF(min) during steady-state operation. Also, as VOUT increases, the internal ripple injection will increase and reduce the line regulation performance. Therefore, the maximum output voltage of the MIC24052 should be limited to 5.5V and the maximum external ripple injection should be limited to 200 mV. Please refer to Setting Output Voltage in the Application Information section for more details. The actual ON-time and resulting switching frequency will vary with the part-to-part variation in the rise and fall times of the internal MOSFETs, the output load current, and variations in the VDD voltage. Also, the minimum tON results in a lower switching frequency in high VIN to VOUT applications, such as 18V to 1.0V. The minimum tON measured on the MIC24052 evaluation board is about 100 ns. During load transients, the switching frequency is changed due to the varying OFF-time. To illustrate the control loop operation, we will analyze both the steady-state and load transient scenarios. Figure 4-1 shows the MIC24052 control loop timing during steady-state operation. During steady-state, the gm amplifier senses the feedback voltage ripple, which is proportional to the output voltage ripple and the inductor current ripple, to trigger the ON-time period. The ON-time is predetermined by the tON estimator. The termination of the OFF-time is controlled by the feedback voltage. At the valley of the feedback voltage ripple, which occurs when VFB falls below VREF, the OFF period ends and the next ON-time period is triggered through the control logic circuitry. At the end of the ON-time period, the internal high-side driver turns off the high-side MOSFET and the low-side driver turns on the low-side MOSFET. The OFF-time period length depends upon the feedback voltage in most cases. When the feedback voltage decreases and the output of the gm amplifier is below 0.8V, the ON-time period is triggered and the OFF-time period ends. If the OFF-time period determined by the feedback voltage is less than the minimum OFF-time tOFF(min), which is about 300 ns, the MIC24052 control logic will apply the tOFF(min) instead. tOFF(min) is required to maintain enough energy in the boost capacitor (CBST) to drive the high-side MOSFET. 2016 Microchip Technology Inc. DS20005659A-page 17 MIC24052 sensed by the gm amplifier and the error comparator. The recommended feedback voltage ripple is 20 mV~100 mV. If a low-ESR output capacitor is selected, then the feedback voltage ripple may be too small to be sensed by the gm amplifier and the error comparator. Also, the output voltage ripple and the feedback voltage ripple are not necessarily in phase with the inductor current ripple if the ESR of the output capacitor is very low. In these cases, ripple injection is required to ensure proper operation. Please refer to Ripple Injection in the Application Information section for more details about the ripple injection technique. 4.3 FIGURE 4-1: Timing. MIC24052 Control Loop Figure 4-2 shows the operation of the MIC24052 during a load transient. The output voltage drops due to the sudden load increase, which causes the VFB to be less than VREF. This will cause the error comparator to trigger an ON-time period. At the end of the ON-time period, a minimum OFF-time tOFF(min) is generated to charge CBST because the feedback voltage is still below VREF. Then, the next ON-time period is triggered due to the low feedback voltage. Therefore, the switching frequency changes during the load transient, but returns to the nominal fixed frequency once the output has stabilized at the new load current level. With the varying duty cycle and switching frequency, the output recovery time is fast and the output voltage deviation is small in the MIC24052 converter. Discontinuous Mode In continuous mode, the inductor current is always greater than zero; however, at light loads the MIC24052 is able to force the inductor current to operate in discontinuous mode. Discontinuous mode is where the inductor current falls to zero, as indicated by trace (IL) shown in Figure 4-3. During this period, the efficiency is optimized by shutting down all the non-essential circuits and minimizing the supply current. The MIC24052 wakes up and turns on the high-side MOSFET when the feedback voltage VFB drops below 0.8V. The MIC24052 has a zero crossing comparator that monitors the inductor current by sensing the voltage drop across the low-side MOSFET during its ON-time. If the VFB > 0.8V and the inductor current goes slightly negative, then the MIC24052 automatically powers down most of the IC circuitry and goes into a low-power mode. Once the MIC24052 goes into discontinuous mode, both LSD and HSD are low, which turns off the high-side and low-side MOSFETs. The load current is supplied by the output capacitors and VOUT drops. If the drop of VOUT causes VFB to go below VREF, then all the circuits will wake up into normal continuous mode. First, the bias currents of most circuits reduced during the discontinuous mode are restored, then a tON pulse is triggered before the drivers are turned on to avoid any possible glitches. Finally, the high-side driver is turned on. Figure 4-3 shows the control loop timing in discontinuous mode. FIGURE 4-2: Response. MIC24052 Load Transient Unlike true current-mode control, the MIC24052 uses the output voltage ripple to trigger an ON-time period. The output voltage ripple is proportional to the inductor current ripple if the ESR of the output capacitor is large enough. The MIC24052 control loop has the advantage of eliminating the need for slope compensation. In order to meet the stability requirements, the MIC24052 feedback voltage ripple should be in phase with the inductor current ripple and large enough to be DS20005659A-page 18 2016 Microchip Technology Inc. MIC24052 IL IL CROSSES 0 AND VFB > 0.8. DISCONTINUOUS MODE STARTS. VFB < 0.8 WAKE UP FROM DISCONTINUOUS MODE 0 In each switching cycle of the MIC24052 converter, the inductor current is sensed by monitoring the low-side MOSFET in the OFF period. If the peak inductor current is greater than 11A, then the MIC24052 turns off the high-side MOSFET and a soft-start sequence is triggered. This mode of operation is called “hiccup mode” and its purpose is to protect the downstream load in case of a hard short. The load current-limit threshold has a fold-back characteristic related to the feedback voltage as shown in Figure 4-4. VFB VREF ZC VHSD VLSD space and power losses taken by a discrete current sense resistor. The low-side MOSFET is used because it displays much lower parasitic oscillations during switching than the high-side MOSFET. ESTIMATED ON-TIME FIGURE 4-3: MIC24052 Control Loop Timing (Discontinuous Mode). During discontinuous mode, the zero crossing comparator and the current-limit comparator are turned off. The bias current of most circuits are reduced. As a result, the total power supply current during discontinuous mode is only about 450 µA, allowing the MIC24052 to achieve high efficiency in light load applications. 4.4 VDD Regulator The MIC24052 provides a 5V regulated output for input voltage VIN ranging from 5.5V to 19V. When VIN < 5.5V, VDD should be tied to PVIN pins to bypass the internal linear regulator. FIGURE 4-4: MIC24052 Current-Limit Foldback Characteristic. 4.5 4.7 Soft-Start Power Good (PG) Soft-start reduces the power supply input surge current at startup by controlling the output voltage rise time. The input surge appears while the output capacitor is charged up. A slower output rise time will draw a lower input surge current. The power good (PG) pin is an open drain output that indicates logic high when the output is nominally 92% of its steady state voltage. A pull-up resistor of more than 10 kΩ should be connected from PG to VDD. The MIC24052 implements an internal digital soft-start by making the 0.8V reference voltage VREF ramp from 0 to 100% in about 3 ms with 9.7 mV steps. Therefore, the output voltage is controlled to increase slowly by a stair-case VFB ramp. Once the soft-start cycle ends, the related circuitry is disabled to reduce current consumption. VDD must be powered up at the same time or after VIN to make the soft-start function correctly. 4.8 4.6 Current Limit The MIC24052 uses the RDS(ON) of the internal low-side power MOSFET to sense overcurrent conditions. This method will avoid adding cost, board 2016 Microchip Technology Inc. MOSFET Gate Drive The Block Diagram shows a bootstrap circuit, consisting of D1 (a Schottky diode is recommended) and CBST. This circuit supplies energy to the high-side drive circuit. Capacitor CBST is charged, while the low-side MOSFET is on, and the voltage on the SW pin is approximately 0V. When the high-side MOSFET driver is turned on, energy from CBST is used to turn the MOSFET on. As the high-side MOSFET turns on, the voltage on the SW pin increases to approximately VIN. Diode D1 is reverse-biased and CBST floats high while continuing to keep the high-side MOSFET on. The bias current of the high-side driver is less than 10 mA so a 0.1 μF to 1 μF is sufficient to hold the gate DS20005659A-page 19 MIC24052 voltage with minimal droop for the power stroke (high-side switching) cycle, i.e. ∆BST = 10 mA x 1.67 μs/0.1 μF = 167 mV. When the low-side MOSFET is turned back on, CBST is recharged through D1. A small resistor RG, which is in series with CBST, can be used to slow down the turn-on time of the high-side N-channel MOSFET. The drive voltage is derived from the VDD supply voltage. The nominal low-side gate drive voltage is VDD and the nominal high-side gate drive voltage is approximately VDD – VDIODE, where VDIODE is the voltage drop across D1. An approximate 30 ns delay between the high-side and low-side driver transitions is used to prevent current from simultaneously flowing unimpeded through both MOSFETs. DS20005659A-page 20 2016 Microchip Technology Inc. MIC24052 5.0 APPLICATION INFORMATION 5.1 Inductor Selection Values for inductance, peak, and RMS currents are required to select the output inductor. The input and output voltages and the inductance value determine the peak-to-peak inductor ripple current. Generally, higher inductance values are used with higher input voltages. Larger peak-to-peak ripple currents will increase the power dissipation in the inductor and MOSFETs. Larger output ripple currents will also require more output capacitance to smooth out the larger ripple current. Smaller peak-to-peak ripple currents require a larger inductance value and therefore a larger and more expensive inductor. A good compromise between size, loss and cost is to set the inductor ripple current to be equal to 20% of the maximum output current. The inductance value is calculated in Equation 5-1. The RMS inductor current is used to calculate the I2R losses in the inductor. EQUATION 5-4: 2 I L RMS = 2 I L PP I OUT MAX + -------------------12 fSW Switching frequency, 600 kHz Maximizing efficiency requires the proper selection of core material and minimizing the winding resistance. The high-frequency operation of the MIC24052 requires the use of ferrite materials for all but the most cost sensitive applications. Lower cost iron powder cores may be used but the increase in core loss will reduce the efficiency of the power supply. This is especially noticeable at low output power. The winding resistance decreases efficiency at the higher output current levels. The winding resistance must be minimized although this usually comes at the expense of a larger inductor. The power dissipated in the inductor is equal to the sum of the core and copper losses. At higher output loads, the core losses are usually insignificant and can be ignored. At lower output currents, the core losses can be a significant contributor. Core loss information is usually available from the magnetics vendor. Copper loss in the inductor is calculated by Equation 5-5: 20% Ratio of AC ripple current to DC output current EQUATION 5-5: EQUATION 5-1: V OUT V IN MAX – V OUT L = ---------------------------------------------------------------------------------------V IN MAX f SW 20% I OUT MAX Where: VIN(MAX) Maximum power stage input voltage The peak-to-peak inductor current ripple is: 2 P INDUCTOR CU = I L RMS R WINDING EQUATION 5-2: V OUT V IN MAX – V OUT I L PP = ------------------------------------------------------------------V IN MAX f SW L The peak inductor current is equal to the average output current plus one half of the peak-to-peak inductor current ripple. EQUATION 5-3: The resistance of the copper wire, RWINDING, increases with the temperature. The value of the winding resistance used should be at the operating temperature. EQUATION 5-6: R WINDING HT = R WINDING 20C 1 + 0.0042 T H – T 20C Where: I L PK = I OUT MAX + 0.5 I L PP TH T20C Temperature of wire under full load Ambient temperature RWINDING(20C) Room temperature winding resistance (usually specified by the manufacturer) 2016 Microchip Technology Inc. DS20005659A-page 21 MIC24052 5.2 Output Capacitor Selection The type of the output capacitor is usually determined by its equivalent series resistance (ESR). Voltage and RMS current capability are two other important factors for selecting the output capacitor. Recommended capacitor types are ceramic, low-ESR aluminum electrolytic, OS-CON and POSCAP. The output capacitor’s ESR is usually the main cause of the output ripple. The output capacitor ESR also affects the control loop from a stability point of view. The maximum value of ESR is calculated: EQUATION 5-9: I L PP I COUT RMS = ----------------12 The power dissipated in the output capacitor is: EQUATION 5-10: EQUATION 5-7: 2 P DISS COUT = I COUT RMS ESR COUT V OUT PP ESR COUT --------------------------I L PP Where: 5.3 ∆VOUT(PP) ∆IL(PP) Peak-to-peak output voltage ripple Peak-to-peak inductor current ripple The total output ripple is a combination of the ESR and output capacitance. The total ripple is calculated in Equation 5-8: EQUATION 5-8: V OUT PP = 2 I L PP ------------------------------------- + I L PP ESR COUT 2 C OUT f SW 8 Where: COUT fSW Output capacitance value Input Capacitor Selection The input capacitor for the power stage input VIN should be selected for ripple current rating and voltage rating. Tantalum input capacitors may fail when subjected to high inrush currents, caused by turning the input supply on. A tantalum input capacitor’s voltage rating should be at least two times the maximum input voltage to maximize reliability. Aluminum electrolytic, OS-CON, and multilayer polymer film capacitors can handle the higher inrush currents without voltage de-rating. The input voltage ripple will primarily depend on the input capacitor’s ESR. The peak input current is equal to the peak inductor current, so: EQUATION 5-11: V IN = I L PK ESR CIN Switching frequency As described in the Theory of Operation section, the MIC24052 requires at least 20 mV peak-to-peak ripple at the FB pin to make the gm amplifier and the error comparator behave properly. Also, the output voltage ripple should be in phase with the inductor current. Therefore, the output voltage ripple caused by the output capacitors value should be much smaller than the ripple caused by the output capacitor ESR. If low-ESR capacitors, such as ceramic capacitors, are selected as the output capacitors, a ripple injection method should be applied to provide the enough feedback voltage ripple. Please refer to the Ripple Injection section for more details. The input capacitor must be rated for the input current ripple. The RMS value of input capacitor current is determined at the maximum output current. Assuming the peak-to-peak inductor current ripple is low: EQUATION 5-12: I CIN RMS I OUT MAX D 1 – D The voltage rating of the capacitor should be twice the output voltage for a tantalum and 20% greater for aluminum electrolytic or OS-CON. The output capacitor RMS current is calculated in Equation 5-9: DS20005659A-page 22 2016 Microchip Technology Inc. MIC24052 The power dissipated in the input capacitor is: 2. Inadequate ripple at the feedback voltage due to the small ESR of the output capacitors. EQUATION 5-13: L SW 2 P DISS CIN = I CIN RMS ESR CIN COUT R1 MIC24052 FB Cff ESR R2 5.4 FIGURE 5-2: Ripple Injection The VFB ripple required for proper operation of the MIC24052 gm amplifier and error comparator is 20 mV to 100 mV. However, the output voltage ripple is generally designed as 1% to 2% of the output voltage. For a low output voltage, such as a 1V, the output voltage ripple is only 10 mV to 20 mV, and the feedback voltage ripple is less than 20 mV. If the feedback voltage ripple is so small that the gm amplifier and error comparator can’t sense it, then the MIC24052 will lose control and the output voltage is not regulated. In order to have some amount of VFB ripple, a ripple injection method is applied for low output voltage ripple applications. The applications are divided into three situations according to the amount of the feedback voltage ripple: 1. Inadequate Ripple at FB. The output voltage ripple is fed into the FB pin through a feed-forward capacitor Cff in this situation, as shown in Figure 5-2. The typical Cff value is between 1 nF and 100 nF. With the feed-forward capacitor, the feedback voltage ripple is very close to the output voltage ripple: EQUATION 5-15: V FB PP ESR I L PP 3. Virtually no ripple at the FB pin voltage due to the very low ESR of the output capacitors. Enough ripple at the feedback voltage due to the large ESR of the output capacitors. L SW Cinj SW MIC24052 FB L R2 Cff R2 ESR ESR FIGURE 5-3: FIGURE 5-1: COUT R1 COUT R1 MIC24052 FB Rinj Enough Ripple at FB. As shown in Figure 5-1, the converter is stable without any ripple injection. The feedback voltage ripple is: Invisible Ripple at FB. In this situation, the output voltage ripple is less than 20 mV. Therefore, additional ripple is injected into the FB pin from the switching node SW via a resistor RINJ and a capacitor CINJ, as shown in Figure 5-3. The injected ripple is: EQUATION 5-14: EQUATION 5-16: R2 V FB PP = -------------------- ESR COUT I L PP R1 + R2 Where: ∆IL(PP) Peak-to-peak value of the inductor current ripple 1 V FB PP = V IN K DIV D 1 – D ----------------f SW Where: VIN D fSW τ 2016 Microchip Technology Inc. Power stage input voltage Duty cycle Switching frequency (R1//R2//RINJ) × Cff DS20005659A-page 23 MIC24052 5.5 EQUATION 5-17: R1//R2 K DIV = ---------------------------------R INJ + R1//R2 Setting Output Voltage The MIC24052 requires two resistors to set the output voltage as shown in Figure 5-4. The output voltage is determined by Equation 5-21: EQUATION 5-21: In Equation 5-16 and Equation 5-17, it is assumed that the time constant associated with Cff must be much greater than the switching period: V OUT = V FB 1 + R1 ------- R2 EQUATION 5-18: 1 - = T ------------------ « 1 f SW If the voltage divider resistors R1 and R2 are in the kΩ range, a Cff of 1 nF to 100 nF can easily satisfy the large time constant requirements. Also, a 100 nF injection capacitor CINJ is used in order to be considered as short for a wide range of the frequencies. VFB equals 0.8V. A typical value of R1 can be between 3 kΩ and 10 kΩ. If R1 is too large, it may allow noise to be introduced into the voltage feedback loop. If R1 is too small, it will decrease the efficiency of the power supply, especially at light loads. Once R1 is selected, R2 can be calculated using: EQUATION 5-22: V FB R1 R2 = ----------------------------V OUT – V FB The process of sizing the ripple injection resistor and capacitors is: 1. 2. Select Cff to feed all output ripples into the feedback pin and make sure the large time constant assumption is satisfied. Typical choice of Cff is 1 nF to 100 nF if R1 and R2 are in kΩ range. Select RINJ according to the expected feedback voltage ripple using Equation 5-19. EQUATION 5-19: f SW V FB PP K DIV = ----------------------- ---------------------------V IN D 1 – D Then the value of RINJ is obtained as: EQUATION 5-20: 1 - – 1 R INJ = R1//R2 ----------K DIV 3. FIGURE 5-4: Configuration. Voltage Divider In addition to the external ripple injection added at the FB pin, internal ripple injection is added at the inverting input of the comparator inside the MIC24052, as shown in Figure 5-5. The inverting input voltage VINJ is clamped to 1.2V. As VOUT is increased, the swing of VINJ will be clamped. The clamped VINJ reduces the line regulation because it is reflected as a DC error on the FB terminal. Therefore, the maximum output voltage of the MIC24052 should be limited to 5.5V to avoid this problem. Select CINJ as 100 nF, which could be considered as short for a wide range of the frequencies. DS20005659A-page 24 2016 Microchip Technology Inc. MIC24052 FIGURE 5-5: 5.6 Internal Ripple Injection. Thermal Measurements Measuring the IC’s case temperature is recommended to ensure it is within its operating limits. Although this might seem like a very elementary task, it is easy to get erroneous results. The most common mistake is to use the standard thermal couple that comes with a thermal meter. This thermal couple wire gauge is large, typically 22 gauge, and behaves like a heatsink, resulting in a lower case measurement. Two methods of temperature measurement are using a smaller thermal couple wire or an infrared thermometer. If a thermal couple wire is used, it must be constructed of 36 gauge wire or higher then (smaller wire size) to minimize the wire heat-sinking effect. In addition, the thermal couple tip must be covered in either thermal grease or thermal glue to make sure that the thermal couple junction is making good contact with the case of the IC. Omega brand thermal couple (5SC-TT-K-36-36) is adequate for most applications. Wherever possible, an infrared thermometer is recommended. The measurement spot size of most infrared thermometers is too large for an accurate reading on a small form factor ICs. However, an IR thermometer from Optris has a 1 mm spot size, which makes it a good choice for measuring the hottest point on the case. An optional stand makes it easy to hold the beam on the IC for long periods of time. 2016 Microchip Technology Inc. DS20005659A-page 25 MIC24052 6.0 PCB LAYOUT RECOMMENDATIONS To minimize EMI and output noise, follow these layout recommendations. PCB layout is critical to achieve reliable, stable and efficient performance. A ground plane is required to control EMI and minimize the inductance in power, signal and return paths. The following guidelines should be followed to insure proper operation of the MIC24052 regulator. 6.1 IC • A 2.2 µF ceramic capacitor, which is connected to the PVDD pin, must be located right at the IC. The PVDD pin is very noise sensitive and placement of the capacitor is very critical. Use wide traces to connect to the PVDD and PGND pins. • A 1 µF ceramic capacitor must be placed right between VDD and the signal ground SGND. The SGND must be connected directly to the ground planes. Do not route the SGND pin to the PGND Pad on the top layer. • Place the IC close to the point-of-load (POL). • Use fat traces to route the input and output power lines. • Signal and power grounds should be kept separate and connected at only one location. 6.2 Input Capacitor • Place the input capacitors on the same side of the board and as close to the IC as possible. • Keep both the PVIN pin and PGND connections short. • Place several vias to the ground plane close to the input capacitor ground terminal. • Use either X7R or X5R dielectric input capacitors. Do not use Y5V or Z5U type capacitors. • Do not replace the ceramic input capacitor with any other type of capacitor. Any type of capacitor can be placed in parallel with the input capacitor. • If a Tantalum input capacitor is placed in parallel with the input capacitor, it must be recommended for switching regulator applications and the operating voltage must be derated by 50%. • In “Hot-Plug” applications, a Tantalum or Electrolytic bypass capacitor must be used to limit the over-voltage spike seen on the input supply with power is suddenly applied. 6.3 to the inductor. • Keep the switch node (SW) away from the feedback (FB) pin. • The CS pin should be connected directly to the SW pin to accurate sense the voltage across the low-side MOSFET. • To minimize noise, place a ground plane underneath the inductor. • The inductor can be placed on the opposite side of the PCB with respect to the IC. It does not matter whether the IC or inductor is on the top or bottom as long as there is enough air flow to keep the power components within their temperature limits. The input and output capacitors must be placed on the same side of the board as the IC. 6.4 Output Capacitor • Use a wide trace to connect the output capacitor ground terminal to the input capacitor ground terminal. • Phase margin will change as the output capacitor value and ESR changes. Contact the factory if the output capacitor is different from what is shown in the user guide. • The feedback trace should be separate from the power trace and connected as close as possible to the output capacitor. Sensing a long high-current load trace can degrade the DC load regulation. 6.5 Optional RC Snubber • Place the RC snubber on either side of the board and as close to the SW pin as possible. Inductor • Keep the inductor connection to the switch node (SW) short. • Do not route any digital lines underneath or close DS20005659A-page 26 2016 Microchip Technology Inc. MIC24052 7.0 PACKAGING INFORMATION 7.1 Package Marking Information 28-Pin QFN* XXX XXXXXXXX WNNN Legend: XX...X Y YY WW NNN e3 * Example MIC 24052YJL 6420 Product code or customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code Pb-free JEDEC® designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. ●, ▲, ▼ Pin one index is identified by a dot, delta up, or delta down (triangle mark). Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. Package may or may not include the corporate logo. Underbar (_) and/or Overbar (⎯) symbol may not be to scale. 2016 Microchip Technology Inc. DS20005659A-page 27 MIC24052 28-Pin 5 mm x 6 mm QFN Package Outline and Recommended Land Pattern Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging. DS20005659A-page 28 2016 Microchip Technology Inc. MIC24052 APPENDIX A: REVISION HISTORY Revision A (November 2016) • Converted Micrel document MIC24052 to Microchip data sheet DS20005659A. • Minor text changes throughout. • Vertical axis description updated in Figure 2-9. • Output voltage values corrected in Figure 2-20. • Labeling of Figure 2-41 corrected VIN to VDD. • Corrected VOUT value in Figure 2-43 to 200 mV/ div. • Corrected VOUT value in Figure 2-44 to 1V/div. • Corrected a naming error in Equation 5-6. • Corrected a formatting error in Equation 5-17. 2016 Microchip Technology Inc. DS20005659A-page 29 MIC24052 NOTES: DS20005659A-page 30 2016 Microchip Technology Inc. MIC24052 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office. PART NO. Device XX X – Examples: X.X a) MIC24052YJL-TR: Temperature Package Media Type Device: MIC24052: 12V, 6A High-Efficiency Buck Regulator with HyperLight Load Temperature: Y = –40°C to +125°C (Industrial) Package: JL = 28-Lead 5 mm x 6 mm QFN Media Type: TR = 1,000/Reel 2016 Microchip Technology Inc. Note 1: 12V, 6A High-Efficiency Buck Regulator with HyperLight Load, –40°C to +125°C Temperature Range, 28-Lead QFN, 1,000/Reel Tape and Reel identifier only appears in the catalog part number description. This identifier is used for ordering purposes and is not printed on the device package. Check with your Microchip Sales Office for package availability with the Tape and Reel option. DS20005659A-page 31 MIC24052 NOTES: DS20005659A-page 32 2016 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. 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