Fairchild ML6426CS4 High bandwidth triple video filters with buffered outputs for rgb or yuv Datasheet

www.fairchildsemi.com
ML6426
High Bandwidth Triple Video Filters with Buffered
Outputs for RGB or YUV
Features
General Description
• 5V ±10% operation
• RGB/YUV filters for ATSC Digital Television VESA
Standard
• 2:1 Mux Inputs for multiple RGB/YUV inputs
• Triple Reconstruction Filter options for 6.7, 12, 24, 30,
and 36MHz to handle various line rates
• Multiple ML6426 outputs can be paralleled to drive RGB/
YUV outputs at different frequencies for various line rates
by means of Disable/Enable pin.
• 6dB drivers and sync tip clamps for DC restore
• DC restore with minimal tilt
• 0.4% differential gain on all channels
0.4º differential phase on all channels
0.8% total harmonic distortion on all channels
• 2kV ESD protection
The ML6426 are a family of triple video filters with buffered
outputs. There are several versions of the ML6426, each with
different passband cut-off frequencies of 6.7MHz, 12MHz,
24MHz, 30MHz, and 36MHz. Each channel contains a 4thorder Butterworth lowpass reconstruction video filter. The
filter is optimized for minimum overshoot and flat group
delay and guaranteed differential gain and phase at the outputs of the integrated cable drivers.
All input signals from DACs are AC coupled into the
ML6426. All channels have DC restore circuitry to clamp the
DC input levels during video H-sync, using an output feedback clamp. An external H-sync signal is required for this
purpose.
All outputs must be AC coupled into their loads. Each output
can drive 2VP-P into a 150Ω load. All channels have a gain of
2 (6dB) at 1VP-P input levels.
Block Diagram
2
5
6
7
8
9
12
4
VCCO
VCC
RINA/YINA
RINB/YINB
MUX
TRANSCONDUCTANCE
ERROR AMP
GINA/UINA
GIN/UINB
–
TRANSCONDUCTANCE
ERROR AMP
+
–
A/B MUX
+
–
4th-ORDER
FILTER B
×2
4th-ORDER
FILTER C
×2
ROUT/YOUT
GOUT/UOUT
13
11
0.5V
MUX
TRANSCONDUCTANCE
ERROR AMP
×2
0.5V
MUX
BINA/VINA
BINB/VINB
+
4th-ORDER
FILTER A
BOUT/VOUT
10
0.5V
1
SYNCIN
16
ML6426-1
DISABLE
GNDO
GND
15
14
3
ML6426-2
ML6426-3
ML6426-4
ML6426-5
ML6426-15
Filter A
6.7MHz
12MHz
24MHz
30MHz
36MHz
15MHz
Filter B
6.7MHz
12MHz
24MHz
30MHz
36MHz
15MHz
Filter C
6.7MHz
12MHz
24MHz
30MHz
36MHz
15MHz
REV. 3A August 2004
ML6426
DATA SHEET
Pin Configuration
ML6426
16-Pin Narrow SOIC (S16N)
A/B MUX
1
16
SYNC IN
RINA/YINA
2
15
DISABLE
GND
3
14
GNDO
VCC
4
13
ROUT/YOUT
RINB/YINB
5
12
VCCO
GINA/UINA
6
11
GOUT/UOUT
GINB/UINB
7
10
BOUT/VOUT
BINA/VINA
8
9
BINB/VINB
TOP VIEW
Pin Description
PIN
2
NAME
FUNCTION
1
A/B MUX
Logic input pin to select between Bank <A> and Bank <B> video inputs. This pin is
internally pulled high.
2
RINA/YINA
Unfiltered analog R- or Y-channel input for Bank <A>. Sync must be provided at
SYNC IN pin.
3
GND
Analog ground
4
VCC
Analog 5V supply
5
RINB/YINB
Unfiltered analog R- or Y-channel input for Bank <B>. Sync must be provided at
SYNC IN pin.
6
GINA/UINA
Unfiltered analog G- or U-channel input for Bank <A>. Sync must be provided at
SYNC IN pin.
7
GINB/UINB
Unfiltered analog G- or U-channel input for Bank <B>. Sync must be provided at
SYNC IN pin.
8
BINA/VINA
Unfiltered analog B- or V-channel input for Bank <A>. Sync must be provided at
SYNC IN pin.
9
BINB/VINB
Unfiltered analog B- or V-channel input for Bank <B>. Sync must be provided at
SYNC IN pin.
10
BOUT
Analog B or V-channel output
11
GOUT
Analog G or U-channel output
12
VCCO
5V power supply for output buffers
13
ROUT
Analog R or Y-channel output
14
GNDO
Analog ground
15
DISABLE
Disable/Enable pin. Turns the chip off when logic high. Internally pulled low.
16
SYNC IN
Input for an external H-sync logic signal for filter channels. CMOS level input.
Active High.
REV. 3A August 2004
DATA SHEET
ML6426
Absolute Maximum Ratings
Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum
ratings are stress ratings only and functional device operation is not implied.
Parameter
Min.
Max.
Unit
VCC
–0.3
7
V
Junction Temperature
150
°C
>2000
V
GND – 0.3
VCC + 0.3
V
–65
150
°C
Lead Temperature (Soldering, 10 sec)
260
°C
Thermal Resistance (θJA)
100
°C/W
Max.
Unit
0
70
°C
4.5
5.5
V
ESD
Analog and Digital I/O
Storage Temperature Range
Operating Conditions
Parameter
Min.
Temperature Range
VCC Range
Electrical Characteristics
Unless otherwise specified, VCC = 5V±10%, TA = Operating Temperature Range (Note 1)
Symbol
Parameter
Conditions
Min Typ Max
Units
General
ICC
Supply Current
No Load (VCC = 5.5V)
52
80
mA
AV
Low Frequency Gain (R, G, B)
VIN = 100mVP-P at 100KHz
5.34
6.0
6.65
dB
VOUT
Output Level during Sync (R, G, B,)
Output Capability
DURING SYNC
0.7
0.9
1.2
V
tCLAMP
Clamp Response Time
Settled to Within 10mV,
CIN = 0.1µF
VI
RL = 150Ω, AC-coupled@1MHz
2
VP-P
10
ms
Input Signal Dynamic Range (R, G, B,) AC Coupled
1.4
VP-P
OS
Peak Overshoot (R, G, B,)
2VP-P Output Pulse
4.3
%
CL
Output Load Capacitance (R, G, B,)
All Outputs
Output Load Drive Capability, per Pin
(YUV or RGB Outputs)
One Load is 150Ω
2
loads
dG
Differential Gain (R, G, B,)
All Outputs at fC/2
0.4
%
dφ
Differential Phase (R, G, B,)
All Outputs at fC/2
0.4
°
THD
Output Distortion (R, G, B,)
VOUT = 2VP-P at 1 MHz
0.8
%
PSRR
PSRR (R, G, B,)
0.5VP-P (100kHz) at VCC
35
dB
ISC
Output Short Circuit Current (R, G, B,)
Note 2
120
mA
VIH
Input Voltage Logic High
DISABLE, SYNC IN
VIL
Input Voltage Logic Low
DISABLE, SYNC IN
TMUX
Input Mux
Data Valid
Time
A/B Mux
Pin Valid
High or Low
REV. 3A August 2004
35
2.5
pF
V
1.0
2
V
µs
3
ML6426
DATA SHEET
Electrical Characteristics (continued)
Unless otherwise specified, VCC = 5V±10%, TA = Operating Temperature Range (Note 1)
Symbol
Parameter
Conditions
Min Typ Max
Units
4.8
MHz
6.7MHz Filter: ML6426-1
f1dB
–1dB Bandwidth Flatness (R, G, B,)
25°C
4.0
fc
–3dB Bandwidth Flatness (R, G, B,)
25°C
6.0
f0.8fc
0.8 x fC Attenuation
fSB
StopBand Rejection
(All Channels ≥ 4 fC)
fIN ≥ 4 fC, Note 3
NOISE
Output Noise (R, G, B,)
XTALK
6.7
MHz
1.5
dB
–42
dB
Fullband
1.0
mVRMS
Crosstalk
Input of 0.5VP-P at 1 MHz
Between any two Channels
–55
dB
XTALK
A/B MUX Crosstalk
Input of 0.5VP-P at 3.58/4.43MHz
–54
dB
TPD
Group Delay (R, G, B,)
100kHz
70
ns
∆TPD
Group Delay Deviation from Flatness
(R, G, B,)
to 3.58MHz
4.0
ns
to 4.43MHz
8.0
ns
9
ns
–38
to 10MHz
12MHz Filter: ML6426-2
f1dB
–1dB Bandwidth Flatness (R, G, B,)
25°C
7.8
9.2
MHz
fc
–3dB Bandwidth Flatness (R, G, B,)
25°C
10.8
12
MHz
f0.8fc
0.8 x fC Attenuation
fSB
StopBand Rejection
(All Channels ≥ 4 fC)
fIN ≥ 4 fC, Note 3
1.2
dB
–40
dB
NOISE
Output Noise (R, G, B,)
Fullband
1
mVRMS
XTALK
Crosstalk
Input of 0.5VP-P at 1 MHz
Between any two Channels
–55
dB
XTALK
A/B MUX Crosstalk
Input of 0.5VP-P at 3.58/4.43MHz
–54
dB
TPD
Group Delay (R, G, B,)
100kHz
40
ns
∆TPD
Group Delay Deviation from Flatness
(R, G, B,)
to 3.58MHz
1
ns
to 4.43MHz
1
ns
to 10MHz
7
ns
24MHz Filter: ML6426-3
4
f1dB
–1dB Bandwidth Flatness (R, G, B,)
25°C
13.6
16
MHz
fc
–3dB Bandwidth Flatness (R, G, B,)
25°C
21.6
24
MHz
f0.8fc
0.8 x fC Attenuation
1.7
dB
fSB
StopBand Rejection
(All Channels ≥ 4 fC)
fIN ≥ 4 fC, Note 3
–40
dB
NOISE
Output Noise (R, G, B,)
Fullband
1.0
mVRMS
XTALK
Crosstalk
Input of 0.5VP-P at 1 MHz
Between any two Channels
–55
dB
XTALK
A/B MUX Crosstalk
Input of 0.5VP-P at 3.58/4.43MHz
-54
dB
TPD
Group Delay (R, G, B,)
100kHz
22
ns
∆TPD
Group Delay Deviation from Flatness
(R, G, B,)
to 3.58MHz
1
ns
to 4.43MHz
1
ns
to 10MHz
2
ns
REV. 3A August 2004
DATA SHEET
ML6426
Electrical Characteristics (continued)
Unless otherwise specified, VCC = 5V±10%, TA = Operating Temperature Range (Note 1)
Symbol
Parameter
Conditions
Min Typ Max
Units
18
MHz
30MHz Filter: ML6426-4
f1dB
–1dB Bandwidth Flatness (R, G, B,)
25°C
15.3
fc
–3dB Bandwidth Flatness (R, G, B,)
25°C
27
f0.8fc
0.8 x fC Attenuation
fSB
StopBand Rejection
(All Channels ≥ 4 fC)
NOISE
30
MHz
1.7
dB
fIN ≥ 4 fC, Note 3
-40
dB
Output Noise (R, G, B,)
Fullband
1.0
mVRMS
XTALK
Crosstalk
Input of 0.5VP-P at 1 MHz
Between any two Channels
-55
dB
XTALK
A/B MUX Crosstalk
Input of 0.5VP-P at 3.58/4.43MHz
-54
dB
TPD
Group Delay (R, G, B,)
100kHz
18
ns
∆TPD
Group Delay Deviation from Flatness
(R, G, B,)
to 10MHz
0.5
ns
to 27MHz
2
ns
36MHz Filter: ML6426-5
f1dB
–1dB Bandwidth Flatness (R, G, B,)
25°C
17
20
MHz
fc
–3dB Bandwidth Flatness (R, G, B,)
25°C
32.4
36
MHz
f0.8fc
0.8 x fC Attenuation
2
dB
fSB
StopBand Rejection
(All Channels ≥ 4 fC)
fIN ≥ 4 fC, Note 3
–40
dB
NOISE
Output Noise (R, G, B,)
Fullband
1.0
mVRMS
XTALK
Crosstalk
Input of 0.5VP-P at 1 MHz
Between any two Channels
–55
dB
XTALK
A/B MUX Crosstalk
Input of 0.5VP-P at 3.58/4.43MHz
–54
dB
TPD
Group Delay (R, G, B,)
100kHz
17
ns
∆TPD
Group Delay Deviation from Flatness
(R, G, B,)
to 10MHz
0.5
ns
to 30MHz
4
ns
15MHz Filter: ML6426-15
f1dB
–1dB Bandwidth Flatness (R, G, B,)
25°C
10.8 12.2
MHz
fc
–3dB Bandwidth Flatness (R, G, B,)
25°C
13.8
15
MHz
f0.8fc
0.8 x fC Attenuation
1.2
dB
fSB
StopBand Rejection (All Channels ≥ 4 fC) fIN ≥ 4 fC, Note 3
–40
dB
NOISE
Output Noise (R, G, B,)
Fullband
1.0
mVRMS
XTALK
Crosstalk
Input of 0.5VP-P at 1 MHz
Between any two Channels
–55
dB
XTALK
A/B MUX Crosstalk
Input of 0.5VP-P at 3.58/4.43MHz
–54
dB
TPD
Group Delay (R, G, B,)
100kHz
40
ns
∆TPD
Group Delay Deviation from Flatness
(R, G, B,)
to 3.58MHz
1
ns
to 4.43MHz
1
ns
to 10MHz
9
ns
Notes
1. Limits are guaranteed by 100% testing, sampling, or correlation with worst case test conditions.
2. Sustained short circuit protection limited to 10 seconds.
3. 38dB is based on tester noise limits.
REV. 3A August 2004
5
ML6426
DATA SHEET
Functional Description
conventional RC time constant. In most applications, the
ML6426's input coupling capacitors are only 0.1µF.
An external CMOS compatible HSYNC pulse is required
which is Active High on the SYNC IN Pin. See Figure 2.
The ML6426 is a triple monolithic continuous time video
filter designed for reconstructing video signals from an
YUV/RGB video D/A source. The ML6426 is intended for
use in AC coupled input and output applications.
During sync, the feedback clamp sources/sinks current to
restore the DC level. The net result is that the average input
current is zero. Any change in the input coupling capacitors'
value will linearly affect the clamp response times.
The filters approximate a 4th-order Butterworth characteristic with an optimization toward low overshoot and flat group
delay. All outputs are capable of driving 2VP-P into AC
coupled 150Ω video loads, with up to 35pF of load capacitance. All outputs are capable of driving a 75Ω load at 1VP-P.
Each channel is essentially tilt-free. Each input is clamped
by a feedback amp which responds to the output during sync.
All channels are clamped during sync to establish the appropriate output voltage swing range (DC restore). Thus the
input coupling capacitors do not behave according to the
The ML6426 is robust and stable under all stated load and
input conditions. Bypassing both VCC pins directly to
ground ensures this performance.
5V
0.1µF
RIN
2
5
0.1µF
GIN
6
7
0.1µF
BIN
8
9
5V
12
4
VCCO
VCC
RINA/YINA
RINB/YINB
MUX
TRANSCONDUCTANCE
ERROR AMP
GINA/UINA
GINB/UINB
–
TRANSCONDUCTANCE
ERROR AMP
+
–
TRANSCONDUCTANCE
ERROR AMP
+
–
4th-ORDER
FILTER B
×2
4th-ORDER
FILTER C
×2
ROUT/YOUT
GOUT/UOUT
BOUT/VOUT
220µF 75Ω
R
220µF 75Ω
G
220µF 75Ω
B
13
11
0.5V
MUX
A/B MUX
×2
0.5V
MUX
BINA/VINA
BINB/VINB
+
4th-ORDER
FILTER A
10
0.5V
1
SYNCIN
SYNC IN
ACTIVE HIGH
16
DISABLE
GNDO
GND
15
14
3
Figure 1. Typical Application Schematic
VIH = 2.5V
VIL = 1.0V
50% x VSYNC IN
PWMIN = 2µS
Figure 2. SYNC IN Pulse Width
6
REV. 3A August 2004
DATA SHEET
ML6426
Typical Applications
Reconstruction filter selection for HDTV and
VGA signal filtering
The filtering requirements for HDTV and VGA standards
vary depending on the resolution of the image to be displayed, and its refresh rate. The actual refresh rate of the display is not necessarily the same as the transmission rate of
the frames of images. Some formats use a frame rate of
30Hz, but the display of those formats cannot be scanned
onto the CRT at 30Hz. Excessive large area flicker would
result. Such kinds of flicker can be seen on a PAL display
with its brightness set high. To avoid this, the video will need
to be stored in a frame buffer. This buffer already exists in
the MPEG decoder of HDTV systems, so there is no cost
penalty. The buffer is read out at twice the rate as the frame
rate for 30Hz systems, thus getting us a refresh rate of 60Hz.
Similar things are done for the 24Hz frame rate formats to
boost them to a 60Hz refresh rate.
Table 1. HDTV / Advanced TV Applications: (From Table 10.3 from ATSC document A54)
Pixels
Vertical Lines
Aspect Ratio
Picture Transmission Rate
1920
1080
16:9
60I, 30P, 24P
1280
720
16:9
60P, 30P, 24P
704
480
16:9 and 4:3
60P, 60I, 30P, 24P
640
480
4:3
60P, 60I, 30P, 24P
P=progressive scan, I=interlaced scan
Picture
Transmission
Rate (Note 2)
Display
Refresh
Rate (Note 2)
Approximate
Horizontal
Rate
Approximate
Sample Clock
Approximate
Reconstruction
Filter Cutoff
Fairchild
Filter to Use
1920
1080
30P, 24P
60Hz
70.6KHz
162MHz
81MHz
N/A
1280
720
60P, 30P,
24P
60Hz
47.1KHz
60MHz
30MHz
ML6426-5
ML6426-4
704
480 (Note 1)
60I
60Hz
15.7KHz
13.5MHz
6.75MHz
ML6426-1
704
480
60P, 30P,
24P
60Hz
31KHz
27MHz
13.5MHz
ML6426-2
ML6426-4
640
480 (Note 1)
60I
60Hz
15.7KHz
24.5MHz
12MHz
ML6426-2
640
480
60P, 30P,
24P
60Hz
31KHz
12.27MHz
6MHz
ML6426-1
(Note 3)
Vertical
Lines
SMPTE
Pixels
Standard
Table 2. Choosing the Correct Reconstruction Filter and Video Amplifier for TV Applications, ML6426 options
P=progressive scan, I=interlaced scan, na = not available
Notes
1. NTSC display rates, can be fed directly into NTSC encoder (set top box)
2. 60 Hz also includes 59.94Hz
3. Custom frequencies ranging ± 3 to 6MHz can be special cut to order
REV. 3A August 2004
7
ML6426
DATA SHEET
Pixel clock rates for the output D/A converters can be
roughly determined from the Table 1. Don’t forget that the
deflection system of a CRT display needs retrace time for the
vertical and horizontal.
This retrace time can vary from one design of an HDTV set
to another, as it only involves tradeoffs between the frame
buffer in the MPEG decoder and the CRT deflection system.
Allowing for 10% retrace time for the vertical and 20% for
the horizontal, the appropriate Reconstruction Filter is summarized in Table 2.
For VGA or RGB monitors, the following resolutions can
use the corresponding Reconstruction Filter and Video
Amplifier as shown in Table 3.
Using the ML6426 in Multiple Resolutions
Several ML6426 devices can be used in parallel to construct
a selectable filter selection block ranging from frequencies
between 6.7 MHz to 50MHz. Each ML6426 can be individually controlled via the disable pin. In a parallel configuration,
as shown in Figure 3 and 7, several ML6426 devices can be
used and selected via general purpose I/O or other logic to
perform the proper reconstruction filtering for the resolution
of choice. This configuration allows for a minimum of bill of
materials and reduces cost. Fairchild’s ML6426 EVAL Kit
demonstrates multi-resolution designs. Furthermore, since
the ML6426 pin-out is identical for all the options, the filters
can be interchanged. This allows for ease of product migration to integrate newer resolutions to filter and drive various
DAC outputs at different sampling frequencies.
Figures 4, 5, and 6 show system diagrams when the ML6426
provides a good solution. Figure 7 provides a more detailed
description for advanced TV applications using various resolutions for legacy video, SDTV, and HDTV.
Sample Clock
Reconstruction
Filter Cutoff
Fairchild
Filter to Use
ML6426-2
VGA
72Hz
37.9kHz
31.5MHz
15.5MHz
ML6426-3
480
VGA
800
1024
600
768
(Prog except noted)
12.5MHz
640
Refresh Rate
25.175MHz
Name
31.5kHz
Vertical
Lines
60Hz
Pixels
Horizontal Rate
Table 3. Choosing the Correct Reconstruction Filter and Video Amplifier for TV Applications, ML6426 options
VGA
75Hz
37.5kHz
31.5MHz
15.5MHz
ML6426-3
SVGA
56Hz
35.1kHz
36MHz
18MHz
ML6426-3
SVGA
60Hz
37.9kHz
40MHz
20MHz
ML6426-3
SVGA
72Hz
48.1kHz
50MHz
25MHz
ML6426-3
SVGA
75Hz
46.9kHz
49.5MHz
25MHz
ML6426-3
XGA
43Hz
Interlaced
35.5kHz
44.9MHz
23MHz
ML6426-3
XGA
60Hz
37.9kHz
65MHz
33MHz
ML6426-5
XGA
70Hz
56.5kHz
75MHz
37.5MHz
ML6426-5
80kHz
135MHz
68MHz
na
1280
1024
SXGA
75Hz
SXGA
60Hz
113MHz
57MHz
na
1600
1200
UXGA
60Hz
166MHz
83MHz
na
N/A = not available
8
REV. 3A August 2004
DATA SHEET
ML6426
GENERAL
PURPOSE I/O
SELECT
LOGIC
DISABLE/ENABLE LINES
5V
12
0.1µF
YIN/RIN
0.1µF
UIN/GIN
15
2
5
6
7
8
9
16
1
4
220µF
13
ML6426-1
6.7MHz
R/Y
11
220µF
10
3
12
4
75Ω
G/U
220µF
14
75Ω
75Ω
B/V
0.1µF
VIN/BIN
SYNC IN
15
2
5
6
7
8
9
16
1
15
2
5
6
7
8
9
16
1
13
ML6426-2
12MHz
11
10
14
3
12
4
13
ML6426-5
36MHz
11
10
14
3
Figure 3. ATSC Digital Television Application
REV. 3A August 2004
9
ML6426
DATA SHEET
GRAPHIC
PROCESSOR
FROM SAT
OR CABLE
MPEG2
TRANSPORT
AND DECODER
Y
HDTV
DECODER
AND DISPLAY
PROCESSOR
D/A
U
ML6426
DIGITAL TV
V
Figure 4. Digital TV Receiver or HDTV Decoder Box
FROM
CAMERA
VCR
CV
S-VIDEO
ANALOG
Y
VIDEO
DECODER
AND DISPLAY
PROCESSOR
RGB
D/A
ML6426
U
RGB
MONITOR
V
VIDEO
ENCODER
YCrCb
DIGITAL
FROM
DVD-ROM
OR MEMORY
Figure 5. PC Graphics/Frame Grabber Editing Card
MRI, XRAY,
ULTRASOUND, CT SCAN
DSP
DIGITAL YUV
D/A
ANALOG
Y
ML6426
U
V
MEDICAL
IMAGING
Figure 6. PC MRI, XRAY, Ultrasound, CT Scan
10
REV. 3A August 2004
DATA SHEET
ML6426
5V
FB1
FB2
GND
0.1µF
C2
C1
1µF
1µF
C 18
0.1µF 2 RINA
0.1µF 5 RINB
C 19
0.1µF 6 GINA
C 20
0.1µF 7 GINB
C 21
0.1µF 8 BINA
C 22
0.1µF 9 BINB
C 17
RINB/YINB
VCCO
12
R5
75Ω
C9
0.1µF
4
C10
RINA/YINA
U1
ML6426-1
VCC
GND
ROUT 13
4TH ORDER
FILTER
C 41
220µF
R11
75Ω
ROUT/YOUT
C 42
220µF
R12
75Ω
GOUT/UOUT
C 43
220µF
R13
75Ω
BOUT/VOUT
R6
75Ω
15 DISABLE
16 SYNC IN
3 GND
A/B
1 MUX
R7
75Ω
BOUT 10
4TH ORDER
FILTER
14 GNDO
GINA/UINA
GOUT 11
4TH ORDER
FILTER
R1 47kΩ
GINB/UINB
R8
75Ω
C12
0.1µF
C4
C3
1µF
1µF
C11
0.1µF
C 26
C 27
C 28
BINB/VINB
R10
75Ω
4
ROUT
U2
ML6426-3
GOUT
BOUT
13
JP1
11
10
3 GND
C 25
0.1µF 2
RINA
0.1µF 5
RINB
0.1µF 6
GNA
0.1µF 7
GNB
0.1µF 8
BINA
0.1µF 9
BINB
1
A/B MUX
16
SYNC IN
14 GNDO
C 24
15 DISABLE
C 23
VCCO
R9
75Ω
VCC
12
BINA/VINA
2
1
4
3
6
5
8
7
4
R2 47kΩ
3
2
SWI
1
C14
C6
C5
1µF
1µF
0
C13
HYSYNC IN
C 33
C 34
ROUT
U3
ML6426-4
GOUT
BOUT
13
11
10
3 GND
C 32
14 GNDO
C 31
0.1µF 2
RINA
0.1µF 5
RINB
0.1µF 6
GNA
0.1µF 7
GNB
0.1µF 8
BINA
0.1µF 9
BINB
1
A/B MUX
16
SYNC IN
15 DISABLE
C 30
VCCO
C 29
4
12
SW2
0.1µF
VCC
0.1µF
R3 47kΩ
1µF
C 39
C 40
ROUT
UX
ML6426-X
GOUT
BOUT
13
11
10
3 GND
C 38
14 GNDO
C 37
0.1µF 2
RINA
0.1µF 5
RINB
0.1µF 6
GNA
0.1µF 7
GNB
0.1µF 8
BINA
0.1µF 9
BINB
1
A/B MUX
16
SYNC IN
0.1µF
VCC
C 36
VCCO
C 35
C15
4
C7
1µF
12
C8
15 DISABLE
C16
0.1µF
R4 47kΩ
Figure 7. Typical Applications Schematic
REV. 3A August 2004
11
ML6426
DATA SHEET
Performance Data
10
10
0
0
–10
AMPLITUDE (dB)
AMPLITUDE (dB)
–10
–20
–30
–40
–20
–30
–40
–50
–50
–60
–60
–70
0.01
0.1
10
1
–70
10k
100
FREQUENCY (MHz)
10
0
0
–10
–10
AMPLITUDE (dB)
AMPLITUDE (dB)
10M
100M
1G
Figure 9. Passband Flatness all Outputs
(Normalized) 12 MHz, ML6426CS-2
10
–20
–30
–40
–20
–30
–40
–50
–50
–60
–60
10M
1M
FREQUENCY (Hz)
Figure 8. Passband Flatness all Outputs
(Normalized) 6.7 MHz, ML6426CS-1
–70
1M
100k
–70
1M
100M
10M
100M
FREQUENCY (MHz)
FREQUENCY (MHz)
Figure 10. Passband Flatness all Outputs
(Normalized) 24 MHz, ML6426CS-3
Figure 11. Passband Flatness all Outputs
(Normalized) 30 MHz, ML6426CS-4
10
0
AMPLITUDE (dB)
–10
–20
–30
–40
–50
–60
–70
100k
1M
10M
100M
1G
FREQUENCY (Hz)
Figure 12. Passband Flatness all Outputs
(Normalized) 36MHz, ML6426CS-5
12
REV. 3A August 2004
DATA SHEET
ML6426
12
10
GROUP DELAY DEVIATION (ns)
0
–10
–20
AMPLITUDE (dB)
–30
–40
–50
–60
–70
–80
8
6
4
2
0
–2
–4
–6
–90
–8
–100
0
10
20
30
40
50
60
70
80
0
90 100
0.7 1.4 2.1 2.8 3.5 4.2 4.9 5.6 6.3 7.0
FREQUENCY (MHz)
FREQUENCY (MHz)
Figure 14. Group Delay Deviation of Passband,
All Outputs ML6426CS-1
14
0
12
–10
10
–20
8
–30
AMPLITUDE (dB)
GROUP DELAY DEVIATION (ns)
Figure 13. Frequency Response All Outputs
ML6426-CS-1
6
4
2
–40
–50
–60
0
–70
–2
–80
–4
–90
–6
–100
0
10
20
30
40
50
60
70
80
0
90 100
10
20
Figure 15. Group Delay Deviation All band,
All Outputs ML6426CS-1
40
50
60
70
80
90 100
Figure 16. Frequency Response All Outputs
ML6426CS-2
10
12
8
10
GROUP DELAY DEVIATION (ns)
GROUP DELAY DEVIATION (ns)
30
FREQUENCY (MHz)
FREQUENCY (MHz)
6
4
2
0
–2
–4
–6
8
6
4
2
0
–2
–4
–6
–8
–8
–10
0
1
2
3
4
5
6
7
8
9
10
FREQUENCY (MHz)
Figure 17. Group Delay Deviation of Passband,
All Outputs ML6426CS-2
REV. 3A August 2004
0
10
20
30
40
50
60
70
80
90 100
FREQUENCY (MHz)
Figure 18. Group Delay Deviation All Band,
All Outputs ML6426CS-2
13
ML6426
DATA SHEET
10
8
GROUP DELAY DEVIATION (ns)
0
–10
–20
AMPLITUDE (dB)
–30
–40
–50
–60
–70
–80
–90
6
4
2
0
–2
–4
–6
–8
–100
–10
0
10
20
30
40
50
60
70
80
90 100
0
2.5
5
FREQUENCY (MHz)
12
0
10
–10
8
–20
6
–30
AMPLITUDE (dB)
GROUP DELAY DEVIATION (ns)
Figure 20. Group Delay Deviation of Passband,
All Outputs ML6426CS-3
4
2
0
–40
–50
–60
–2
–70
–4
–80
–6
–90
–8
–100
0
10
20
30
40
50
60
70
80
90 100
0
10
20
FREQUENCY (MHz)
30
40
50
60
70
80
90 100
FREQUENCY (MHz)
Figure 21. Group Delay Deviation All Band,
All Outputs ML6426CS-3
Figure 22. Frequency Response All Outputs
ML6426CS-4
10
6
8
4
GROUP DELAY DEVIATION (ns)
GROUP DELAY DEVIATION (ns)
10 12.5 15 17.5 20 22.5 25
FREQUENCY (MHz)
Figure 19. Frequency Response All Outputs
ML6426CS-3
6
4
2
0
–2
–4
–6
2
0
–2
–4
–6
–8
–10
–12
–8
–14
–10
0
4
8
12
16
20
24
28
32
36
40
FREQUENCY (MHz)
Figure 23. Group Delay Deviation of Passband,
All Outputs ML6426CS-4
14
7.5
0
10
20
30
40
50
60
70
80
90 100
FREQUENCY (MHz)
Figure 24. Group Delay Deviation All Band,
All Outputs ML6426CS-4
REV. 3A August 2004
DATA SHEET
ML6426
12
–10
10
GROUP DELAY DEVIATION (ns)
0
–20
AMPLITUDE (dB)
–30
–40
–50
–60
–70
–80
–90
8
6
4
2
0
–2
–4
–6
–100
–8
0
10
20
30
40
50
60
70
80
90 100
0
5
10
15
20
25
30
35
40
45
50
FREQUENCY (MHz)
FREQUENCY (MHz)
Figure 25. Frequency Response All Outputs
ML6426-CS-5
Figure 26. Group Delay Deviation of Passband,
All Outputs ML6426CS-5
12
GROUP DELAY DEVIATION (ns)
10
8
6
4
2
0
–2
–4
–6
–8
0
10
20
30
40
50
60
70
80
90 100
FREQUENCY (MHz)
Figure 27. Group Delay Deviation All band,
All Outputs ML6426CS-5
REV. 3A August 2004
15
ML6426
DATA SHEET
Mechanical Dimensions
Package: S16N
16-Pin Narrow SOIC
0.386 - 0.396
(9.80 - 10.06)
16
0.148 - 0.158 0.228 - 0.244
(3.76 - 4.01) (5.79 - 6.20)
PIN 1 ID
1
0.017 - 0.027
(0.43 - 0.69)
(4 PLACES)
0.050 BSC
(1.27 BSC)
0.059 - 0.069
(1.49 - 1.75)
0° - 8°
0.055 - 0.061
(1.40 - 1.55)
16
0.012 - 0.020
(0.30 - 0.51)
SEATING PLANE 0.004 - 0.010
(0.10 - 0.26)
0.015 - 0.035
(0.38 - 0.89)
0.006 - 0.010
(0.15 - 0.26)
REV. 3A August 2004
ML6426
DATA SHEET
Ordering Information
Model
Part Number
Cuttoff Freq
Lead Free
Package
Container
Pack Quantity
ML6426
ML6426CS1
6.7MHz
SOIC-16 (Narrow)
Rail
48
ML6426
ML6426CS1X
6.7MHz
SOIC-16 (Narrow)
Reel
2500
ML6426
ML6426CS1X_NL
6.7MHz
SOIC-16 (Narrow)
Reel
2500
ML6426
ML6426CS2
12MHz
SOIC-16 (Narrow)
Rail
48
ML6426
ML6426CS2X
12MHz
SOIC-16 (Narrow)
Reel
2500
ML6426
ML6426CS3
24MHz
SOIC-16 (Narrow)
Rail
48
ML6426
ML6426CS3X
24MHz
SOIC-16 (Narrow)
Reel
2500
ML6426
ML6426CS4
30MHz
SOIC-16 (Narrow)
Raill
48
ML6426
ML6426CS4X
30MHz
SOIC-16 (Narrow)
Reel
2500
ML6426
ML6426CS4X_NL
30MHz
SOIC-16 (Narrow)
Reel
2500
ML6426
ML6426CS5
36MHz
SOIC-16 (Narrow)
Rail
48
ML6426
ML6426CS5X
36MHz
SOIC-16 (Narrow)
Reel
2500
ML6426
ML6426CS15
15MHz
SOIC-16 (Narrow)
Rail
48
ML6426
ML6426CS15X
15MHz
SOIC-16 (Narrow)
Reel
2500
Temperature range for all parts: 0°C to +70°C
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO
ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME
ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;
NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
www.fairchildsemi.com
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
© 2004 Fairchild Semiconductor Corporation