MM5481 LED Display Driver Y General Description Y The 5481 is a monolithic MOS integrated circuit utilizing Nchannel metal gate low threshold, enhancement mode and ion-implanted depletion mode devices. It utilizes the MM5450 die packaged in a 20-pin package making it ideal for a 2 digit display. The MM5481 is designed to drive common anode-separate cathode LED displays. A single pin controls the LED display brightness by setting a reference current through a variable resistor connected either to VDD or to a separate supply of 11V maximum. Y Y Y Y Applications Y Y Y Features Y Y Y Continuous brightness control Serial data input No load signal required Data enable Wide power supply operation TTL compatibility Alphanumeric capability 2 digit LED driver COPS or microprocessor displays Industrial control indicator Relay driver Instrumentation readouts Block and Connection Diagrams TL/F/6139 – 1 FIGURE 1 Dual-In-Line Package TL/F/6139 – 2 Top View FIGURE 2 Order Number MM5481N See NS Package Number N20A C1995 National Semiconductor Corporation TL/F/6139 RRD-B30M105/Printed in U. S. A. MM5481 LED Display Driver February 1995 Absolute Maximum Ratings Junction Temperature If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Voltage at Any Pin VSS to VSS a 12V Storage Temperature Power Dissipation at 25§ C Molded DIP Package, Board Mount Molded DIP Package, Socket Mount b 65§ C to a 150§ C a 150§ C Lead Temperature (Soldering, 10 sec.) 300§ C *Molded DIP Package, Board Mount, iJA e 61§ C/W, Derate 16.4 mW/§ C above 25§ C. **Molded DIP Package, Socket Mount, iJA e 67§ C/W, Derate 14.9 mW/§ C above 25§ C. 2W* 1.8W** Electrical Characteristics TA e b25§ C to a 85§ C, VDD e 4.75V to 11.0V, VSS e 0V unless otherwise specified Symbol Parameter Conditions VDD Power Supply IDD Power Supply Current Excluding Output Loads VIL Input Voltages Logical ‘‘0’’ Level g 10 mA Input Bias Logical ‘‘1’’ Level 4.75 s VDD s 5.25 VIH Min VDD l 5.25 IBR Brightness Input Current (Note 2) IOH Output Sink Current (Note 3) Segment OFF IOL Segment ON VIBR Brightness Input Voltage (Pin 9) OM Output Matching (Note 1) Typ Max Units 11 V 7 mA b 0.3 0.8 V V 4.75 2.2 VDD VDD b 2 VDD V 0 0.75 mA 10.0 mA 10.0 4.0 25.0 mA mA mA 4.3 V g 20 % VOUT e 3.0V VOUT e 1V (Note 4) Brightness Input e 0 mA Brightness Input e 100 mA Brightness Input e 750 mA 0 2.0 15.0 Input Current e 750 mA 3.0 2.7 AC Electrical Characteristics TA e b25§ C to a 85§ C, VDD e 5V g 0.5V Parameter Conditions Min fC Symbol Clock Input Frequency (Notes 5 and 6) DC th High Time 950 ns tI Low Time 950 ns tDS tDH Data Input Set-Up Time Hold Time 300 300 ns ns Data Enable Input Set-Up Time 100 ns tDES Typ Max Units 500 kHz Note 1: Output matching is calculated as the percent variation from IMAX a IMIN/2. Note 2: With a fixed resistor on the brightness input pin some variation in brightness will occur from one device to another. Maximum brightness input current can be 2 mA as long as Note 3 and junction temperature equation are compiled with. Note 3: Absolute maximum for each output should be limited to 40 mA. Note 4: The VOUT voltage should be regulated by the user. Note 5: AC input waveform specification for test purpose: tr s 20 ns, tf s 20 ns, f e 500 kHz, 50% g 10% duty cycle. Note 6: Clock input rise and fall times must not exceed 300 ns. 2 Functional Description Data Enable The MM5481 uses the MM5450 die which is packaged to operate 2-digit alphanumeric displays with minimal interference to the display and the data source. Serial data transfer from the data source to the display driver is accomplished with 2 signals, serial data and clock. Using a format of a leading ‘‘1’’ followed by the 35 data bits allows data transfer without an additional load signal. The 35 data bits are latched after the 36th bit is complete, thus providing nonmultiplexed, direct drive to the display. Outputs change only if the serial data bits differ from the previous time. Display brightness is determined by control of the output current for LED displays. A 0.001 mF capacitor should be connected to brightness control, pin 9, to prevent possible oscillations. A block diagram is shown in Figure 1 . The output current is typically 20 times greater than the current into pin 9, which is set by an external variable resistor. There is an internal limiting resistor of 400X nominal value. This active low signal enables the data input pin. If high, the shift register sees zeroes clocked in. To blank the display at any time, (i.e., power on), clock in 36 or more zeroes, followed by a ‘one’ (start bit), followed by 36 or more zeroes. Figure 5 shows the Output Data Format for the MM5481. Because it uses only 14 of the possible 34 outputs, 20 of the bits are ‘Don’t Cares’. Note that only alternate groups of 4 outputs are used. Figure 3 shows the timing relationships between data, clock, and data enable. A maximum clock frequency of 0.5 MHz is assumed. For applications where a lesser number of outputs are used, it is possible to either increase the current per output, or operate the part at higher than 1V VOUT. The following equation can be used for calculations. Tj e (VOUT) (ILED) (No. of segments) (iJA) a TA where: Tj e junction temperature, 150§ C max. VOUT e the voltage at the LED driver outputs ILED e the LED current iJA e thermal coefficient of the package TA e ambient temperature iJA (Socket Mount) e 67§ C/W iJA (Board Mount) e 61§ C/W Figure 4 shows the input data format. A start bit of logical ‘‘1’’ precedes the 35 bits of data. At the positive-going-edge of the 36th clock a LOAD signal is generated synchronously with the high state of the clock, which loads the 35 bits of the shift registers into the latches. At the low state of the clock a RESET signal is generated which clears all the shift registers for the next set of data. The shift registers are a static master-slave configuration. There is no clear for the master portion of the first shift register, thus allowing continous operation. There must be a complete set of 36 clocks (high/low edges) or the shift registers will not clear. TL/F/6139 – 3 FIGURE 3. Timing TL/F/6139 – 4 FIGURE 4. Input Data Format 3 Functional Description (Continued) START 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 5450 START X X X X 1 2 3 4 X X X X 5 6 7 8 X X X X 9 10 11 12 X X X X 13 14 X X X X 5481 FIGURE 5. Output Data Format I19 e DV 1k TL/F/6139 – 5 FIGURE 6. Typical Application of Constant Current Brightness Control TL/F/6139 – 6 FIGURE 7. Brightness Control Varying the Duty Cycle Basic Electronically Tuned Television System Safe Operating Area TL/F/6139–7 TL/F/6139 – 8 4 5 MM5481 LED Display Driver Physical Dimensions inches (millimeters) Molded Dual-In-Line Package Order Number MM5481N NS Package Number N20A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation 1111 West Bardin Road Arlington, TX 76017 Tel: 1(800) 272-9959 Fax: 1(800) 737-7018 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Europe Fax: (a49) 0-180-530 85 86 Email: cnjwge @ tevm2.nsc.com Deutsch Tel: (a49) 0-180-530 85 85 English Tel: (a49) 0-180-532 78 32 Fran3ais Tel: (a49) 0-180-532 93 58 Italiano Tel: (a49) 0-180-534 16 80 National Semiconductor Hong Kong Ltd. 13th Floor, Straight Block, Ocean Centre, 5 Canton Rd. Tsimshatsui, Kowloon Hong Kong Tel: (852) 2737-1600 Fax: (852) 2736-9960 National Semiconductor Japan Ltd. Tel: 81-043-299-2309 Fax: 81-043-299-2408 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.