MM58248 High Voltage Display Driver General Description Features The MM58248 is a monolithic MOS integrated circuit utilizing CMOS metal gate low threshold P- and N-channel devices. It is available both in 40-pin molded dual-in-line packages or as dice. The MM58248 is particularly suited for driving high voltage (60V max) vacuum fluorescent (VF) displays (e.g., a 5 x 7 dot matrix display). Y Applications Y Y Y Y Y Y Y Y Y Y Y Y Y COPSTM or microprocessor-driven display Instrumentation readouts Industrial control indicator Digital clock, thermostat, counter, voltmeter Word processor text displays Automotive dashboards Direct interface to high voltage display Serial data input No external resistors required Wide display power supply operation LSTTL compatible inputs Software compatible with NS display driver family Compatible with alphanumeric or dot matrix displays No load signal required Block Diagram TL/F/5599 – 1 FIGURE 1 COPSTM is a trademark of National Semiconductor Corporation. C1995 National Semiconductor Corporation TL/F/5599 RRD-B30M105/Printed in U. S. A. MM58248 High Voltage Display Driver March 1991 Absolute Maximum Ratings Voltage at Any Input Pin VDD a 0.3V to VSS b 0.3V VDD to VDD b 62.5V 62.5V b 65§ C to a 150§ C Voltage at Any Display Pin VDD a lVDISl Storage Temperature Power Dissipation at a 25§ C Molded DIP Package, Board Mount Molded DIP Package, Socket Mount 130§ C Junction Temperature Lead Temperature (Soldering, 10 seconds) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. 260§ C Operating Conditions Min Supply Voltage (VDD) VSS e 0V Display Voltage (VDIS) Temperature Range 2.28W* 2.05W** Max Units V V §C 4.5 5.5 b 55 b 25 b 40 a 85 *Molded DIP Package, Board Mount iJA e 46§ C/W, Derate 21.7 mW/§ C above a 25§ C. **Molded DIP Package, Socket Mount, iJA e 51§ C/W, Derate 19.6 mW/§ C above a 25§ C. DC Electrical Characteristics TA e b40§ C to a 85§ C, VDD e 5V g 0.5V, VSS e 0V unless otherwise specified Symbol IDD Parameter Power Supply Currents IDIS Max Units VIN e VSS or VDD, VSS e 0V, VDIS Disconnected Conditions Min 150 mA VDD e 5.5V, VSS e 0V, VDIS e b55V, All Outputs Low 10 mA 0.8 V VIL Input Logic Levels DATA IN, CLOCK Logic ‘0’ VIH Input Logic Levels DATA IN, CLOCK Logic ‘1’ (Note 1) IIN Input Currents, DATA IN, CLOCK VIN e 0V or VDD CIN Input Capacitance, DATA IN, CLOCK ROFF Display Output Impedances Output Off (Figure 3a) VDD e 5.5V, VSS e 0V VDIS e b25V VDIS e b40V VDIS e b55V Display Output Impedances Output on (Figure 3b) VDD e 5.5V, VSS e 0V VDIS e b25V VDIS e b40V VDIS e b55V Display Output Low Voltage VDD e 5.5V, IOUT e Open Circuit, b 55V s VDIS s b 25V RON VDOL Note 1: 74LSTTL VOH e 2.7V @ IOUT e b 400 mA, TTL VOH e 2.4V @ Typ 2.4 V b 10 10 mA 15 pF 400 550 650 kX kX kX 4.0 3.7 3.4 kX kX kX VDIS a 4 V 60 70 80 3.0 2.6 2.3 VDIS IOUT e b 400 mA. AC Electrical Characteristics TA e b40§ C to a 85§ C, VDD e 5V g 0.5V Parameter Conditions fC Symbol Clock Input Frequency (Notes 2, 3) tH Clock Input High Time tL Clock Input Low Time tDS Data Input Setup Time tDH Data Input Hold Time Min 300 CL e 50 pF 2 Max Units 1.0 MHz ns 300 ns 100 ns 100 ns Note 2: AC input waveform specification for test purposes: tr, tf s 20 ns, f e 1 MHz, 50% g 10% duty cycle. Note 3: Clock input rise and fall times must not exceed 5 ms. Typ Connection Diagrams Plastic Chip Carrier Dual-In-Line Package TL/F/5599 – 2 Top View TL/F/5599 – 8 Order Number MM58248N See NS Package Number N40A Top View Order Number MM58248V See NS Package Number V44A FIGURE 2 Functional Description In Figure 5, a start bit of logic ‘1’ precedes the 35 bits of data, each bit being accepted on the rising edge of CLOCK, i.e., a ‘0’ – ‘1’ transition. At the 36th clock, a LOAD signal is generated synchronously with the high state of the clock, thus loading the 35 bits of the shift register into the latches. At the low state of the clock, a RESET signal is generated, clearing all bits of the shift register for the next set of data. Hence, a complete set of 36 clock pulses is needed for the MM58248, or the shift register will not clear. To clear (reset) the display driver at ‘power on’ or any time, the following flushing routine may be used. Clock in 36 ‘‘zeroes’’, followed by a ‘‘one’’ (start bit), followed by 35 ‘‘zeroes’’. This procedure will completely blank the display. It is recommended to clear the driver at power on. This product is specifically designed to drive multiplexed or non-multiplexed high voltage alphanumeric or dot matrix vacuum fluorescent (VF) displays. Character generation is done externally in the microprocessor, with a serial data path to the display driver. The MM58248 uses two signals, DATA IN and CLOCK, with a format of a leading ‘1’ followed by the 35 data bits, hence allowing data transfer without an additional signal. A block diagram of the MM58248 is shown in Figure 1. Figure 2 shows the pinout of the MM58248 device, where output 1 (pin 18) is equivalent to bit 1, i.e., the first bit of data to be loaded into the shift register following the start bit. A logic ‘1’ at the input will turn on the corresponding display digit/segment/dot output. A significant reduction in discrete board components can be achieved by the use of the MM58248, because external pull-down resistors are not required. Due to the nature of the output stage, both its on and off impedance values vary as a function of the display voltage applied. However, Figures 3a and 3b show that this output impedance will remain constant for a fixed value of display voltage. Figure 6 shows a schematic diagram of a microprocessorbased system where the MM58248 is used to provide the anode drive for a 32-digit 5 x 7 dot matrix vacuum fluorescent (VF) display. The grid drive in this example is provided by another member of the high voltage display driver family, namely the MM58241, which has the additional features of a BLANKING CONTROL pin, a DATA OUT pin, and an ENABLE (external load signal) pin. Figure 4 demonstrates the critical timing requirements between CLOCK and DATA IN for the MM58248. 3 Functional Description (Continued) TL/F/5599 – 3 FIGURE 3a. Output Impedance Off TL/F/5599 – 4 FIGURE 3b. Output Impedance On Timing Diagrams For the purposes of AC measurement, VIH e 2.4V, VIL e 0.8V. TL/F/5599 – 5 FIGURE 4. Clock and Data Timings TL/F/5599 – 6 FIGURE 5. MM58248 Timings (Data Format) 4 Typical Applications TL/F/5599 – 7 FIGURE 6. Microprocessor-Controlled Word Processor Physical Dimensions inches (millimeters) Molded Dual-In-Line Package (N) Order Number MM58248N NS Package Number N40A 5 MM58248 High Voltage Display Driver Physical Dimensions inches (millimeters) (Continued) Plastic Chip Carrier (V) Order Number MM58248V NS Package Number V44A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 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