Fairchild MM74HC688SJ 8-bit magnitude comparator (equality detector) Datasheet

Revised May 2005
MM74HC688
8-Bit Magnitude Comparator (Equality Detector)
General Description
The MM74HC688 equality detector utilizes advanced silicon-gate CMOS technology to compare bit for bit two 8-bit
words and indicates whether or not they are equal. The
P Q output indicates equality when it is LOW. A single
active low enable is provided to facilitate cascading of several packages and enable comparison of words greater
than 8 bits.
This device is useful in memory block decoding applications, where memory block enable signals must be generated from computer address information.
The comparator’s output can drive 10 low power Schottky
equivalent loads. This comparator is functionally and pin
compatible to the 74LS688. All inputs are protected from
damage due to static discharge by diodes to VCC and
ground.
Features
■ Typical propagation delay: 20 ns
■ Wide power supply range: 2–6V
■ Low quiescent current: 80 PA (74 Series)
■ Large output current: 4 mA (74 Series)
■ Same as HC521
Ordering Code:
Order Number
Package Number
MM74HC688WM
MM74HC688SJ
MM74HC688MTC
MM74HC688N
Package Description
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MTC20
N20A
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Logic Diagram
Pin Assignments for DIP
Top View
Truth Table
Inputs
Data
Enable
P,Q
G
P
P
Q
Q
L
L
P!Q
L
H
PQ
L
H
X
H
H
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DS005018
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MM74HC688 8-Bit Magnitude Comparator (Equality Detector)
September 1983
MM74HC688
Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions
(Note 2)
Supply Voltage (VCC)
DC Input Voltage (VIN)
DC Output Voltage (VOUT)
Clamp Diode Current (IIK, IOK)
DC Output Current, per pin (IOUT)
DC VCC or GND Current, per pin
(ICC)
Storage Temperature Range (TSTG)
0.5 to 7.0V
1.5 to VCC 1.5V
0.5 to VCC 0.5V
r20 mA
r25 mA
r50 mA
65qC to 150qC
Min
Max
Supply Voltage (VCC)
2
6
V
DC Input or Output Voltage
0
VCC
V
40
85
qC
(VIN, VOUT )
Operating Temperature Range (TA)
Input Rise or Fall Times
(tr, tf) VCC
2.0V
1000
ns
VCC
4.5V
500
ns
VCC
6.0V
400
ns
Power Dissipation (PD)
(Note 3)
600 mW
S.O. Package only
500 mW
Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur.
Lead Temperature (TL)
DC Electrical Characteristics
Symbol
VIH
VIL
Parameter
Conditions
TA
VCC
25qC
Typ
TA
40 to 85qC TA 55 to 125qC
Guaranteed Limits
Units
2.0V
1.5
1.5
1.5
V
4.5V
3.15
3.15
3.15
V
6.0V
4.2
4.2
4.2
V
Maximum LOW Level
2.0V
0.5
0.5
0.5
V
4.5V
1.35
1.35
1.35
V
6.0V
1.8
1.8
1.8
V
Minimum HIGH Level
VIN
Output Voltage
|IOUT| d 20 PA
VIH or VIL
2.0V
2.0
1.9
1.9
1.9
V
4.5V
4.5
4.4
4.4
4.4
V
6.0V
6.0
5.9
5.9
5.9
V
|IOUT| d 4.0 mA
4.5V
4.2
3.98
3.84
3.7
V
|IOUT| d 5.2 mA
6.0V
5.7
5.48
5.34
5.2
V
VIH or VIL
Maximum LOW Level
VIN
Output Voltage
|IOUT| d 20 PA
VIH or VIL
2.0V
0
0.1
0.1
0.1
V
4.5V
0
0.1
0.1
0.1
V
6.0V
0
0.1
0.1
0.1
V
|IOUT| d 4.0 mA
4.5V
0.2
0.26
0.33
0.4
V
|IOUT| d 5.2 mA
6.0V
0.2
0.26
0.33
0.4
V
VIN
VCC or GND
6.0V
r0.1
r1.0
r1.0
PA
Maximum Quiescent
VIN
VCC or GND
6.0V
8.0
80
160
PA
Supply Current
IOUT
VIN
IIN
(Note 4)
Input Voltage
VIN
VOL
Note 3: Power Dissipation temperature derating — plastic “N” package: 12 mW/qC from 65qC to 85qC.
Minimum HIGH Level
Input Voltage
VOH
Note 2: Unless otherwise specified all voltages are referenced to ground.
260qC
(Soldering 10 seconds)
Units
Maximum Input
VIH or VIL
Current
ICC
0 PA
Note 4: For a power supply of 5V r10% the worst case output voltages (VOH, and VOL) occur for HC at 4.5V. Thus the 4.5V values should be used when
designing with this supply. Worst case VIH and VIL occur at VCC 5.5V and 4.5V respectively. (The VIH value at 5.5V is 3.85V.) The worst case leakage current (IIN, ICC, and IOZ) occur for CMOS at the higher voltage and so the 6.0V values should be used.
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2
VCC
5V, TA
25qC, CL
Symbol
tPHL, tPLH
15 pF, tr
tf 6 ns
Parameter
Conditions
Typ
Maximum Propagation
Guaranteed
Limit
Units
21
30
ns
14
20
ns
Delay, any P or Q to Output
tPLH, tPHL
Maximum Propagation
Delay, Enable to any Output
AC Electrical Characteristics
VCC
2.0V to 6.0V, CL
Symbol
tPHL, tPLH
tPHL, tPLH
tTHL, tTLH
CPD
50 pF, tr
Parameter
tf 6 ns (unless otherwise specified)
Conditions
TA 25qC
VCC
Typ
TA
40 to 85qC TA 55 to 125qC
Guaranteed Limits
Units
Maximum Propagation
2.0V
60
175
220
263
ns
Delay, P or Q to
4.5V
22
35
44
53
ns
Output
6.0V
19
30
38
45
ns
Maximum Propagation
2.0V
45
120
150
180
ns
Delay, Enable to
4.5V
15
24
30
36
ns
Output
6.0V
13
20
25
30
ns
Maximum Output Rise
2.0V
30
75
95
110
ns
and Fall Time
4.5V
8
15
19
22
ns
6.0V
7
13
16
19
Power Dissipation
45
ns
pF
Capacitance (Note 5)
CIN
Maximum Input
5
10
10
10
pF
Capacitance
Note 5: CPD determines the no load dynamic power consumption, PD
IS CPD VCC f ICC.
CPD VCC2 f ICC VCC, and the no load dynamic current consumption,
3
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MM74HC688
AC Electrical Characteristics
MM74HC688
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Package Number M20B
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MM74HC688
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D
5
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MM74HC688
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC20
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MM74HC688 8-Bit Magnitude Comparator (Equality Detector)
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Package Number N20A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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