MPQ8636 High Efficiency, 10/20A, 18V Synchronous, Step-Down Converter FEATURES Part Number Package Input Voltage MPQ8636GLE10 QFN(3x4mm) 4.5V to 18V Latch-off MPQ8636HGLE10 QFN(3x4mm) 4.5V to 18V NonLatch MPQ8636GVE20 QFN(5x4mm) 4.5V to 18V NonLatch OVP DESCRIPTION The MPQ8636 is a fully-integrated, highfrequency, synchronous, rectified, step-down, switch-mode converter. It offers a very compact solution to achieve 10A/20A output current over a wide input supply range, with excellent load and line regulation. The MPQ8636 operates at high efficiency over a wide output-current–load range. The MPQ8636 uses Constant-On-Time (COT) control to provide a fast transient response and ease loop stabilization. An external resistor programs the operating frequency from 200kHz to 1MHz, and the frequency keeps nearly constant as input supply varies with the feed-forward compensation. The default under-voltage lockout threshold is internally set at 4.1V, but a resistor network on the enable pin can increase this threshold. The soft-start pin controls the output-voltage startup ramp. An open-drain power-good signal indicates that the output is within nominal voltage range. Wide 4.5V-to-18V Operating Input Range 10A/20A Output Current Optimal Low RDS(ON) Internal Power MOSFETs Per Device Proprietary Switching-Loss–Reduction Technique Adaptive COT for Ultrafast Transient Response 0.5% Reference Voltage Over 0°C to 70°C Junction Temperature Range Programmable Soft-Start Time Pre-Bias Start-Up Programmable Switching Frequency from 200kHz to 1MHz Non-Latch OCP, OVP, and Thermal Shutdown Output Adjustable from 0.611V to 13V APPLICATIONS Telecom and Networking Systems Base Stations Servers Personal Video Recorders Flat-Panel Televisions and Monitors Distributed Power Systems All MPS parts are lead-free and adhere to the RoHS directive. For MPS green status, please visit MPS website under Products, Quality Assurance page. “MPS” and “The Future of Analog IC Technology” are registered trademarks of Monolithic Power Systems, Inc. It has fully-integrated protection features that include over-current protection, over-voltage protection and thermal shutdown. The MPQ8636 requires a minimal number of readily-available standard external components and is available in a 16-Pin QFN 3mm×4mm or a 29-Pin QFN 5mm×4mm package. MPQ8636 Rev. 1.23 www.MonolithicPower.com 9/9/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 1 MPQ8636 — 10/20A, 18V, SYNCHRONOUS, STEP-DOWN CONVERTER TYPICAL APPLICATION MPQ8636 Rev. 1.23 www.MonolithicPower.com 9/9/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 2 MPQ8636 — 10/20A, 18V, SYNCHRONOUS, STEP-DOWN CONVERTER ORDERING INFORMATION Part Number Package Top Marking MPQ8636GLE-10* QFN(3x4mm) MP8636 E10 MPQ8636HGLE-10** QFN(3x4mm) MP8636H E10 MPQ8636GVE-20*** QFN(5x4mm) MP8636 E20 * For Tape & Reel, add suffix –Z (e.g. MPQ8636GLE-10–Z) ** For Tape & Reel, add suffix –Z (e.g. MPQ8636HGLE-10-Z) *** For Tape & Reel, add suffix –Z (e.g. MPQ8636GVE-20-Z) PACKAGE REFERENCE VIN VCC PG AGND SS FB FREQ EN BST VCC PG AGND SS FB FREQ EN 8 7 6 5 4 3 2 1 8 7 6 5 4 3 2 1 9 14 SW 15 SW 16 PGND 10 PGND TOP VIEW BST TOP VIEW 11 13 12 VIN PGND PGND VIN 9 SW 15 SW 16 PGND 10 PGND 11 14 VIN 13 PGND 12 PGND Part Number* Package Part Number** Package MPQ8636GLE-10 Junction Temperature QFN (3x4mm) Top Marking MPQ8636HGLE-10 Junction Temperature QFN (3x4mm) Top Marking –40°C to +125°C MP8636 E10 –40°C to +125°C MP8636H E10 * For Tape & Reel, add suffix –Z (eg. MPQ8636GLE-10–Z) ** For Tape & Reel, add suffix –Z (eg. MPQ8636HGLE-10–Z) MPQ8636 Rev. 1.23 www.MonolithicPower.com 9/9/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 3 MPQ8636 — 10/20A, 18V, SYNCHRONOUS, STEP-DOWN CONVERTER TOP VIEW IN EN 1 24 PGND PGND PGND 23 22 21 20 PGND FREQ 2 19 PGND FB 3 SS 18 SW 4 17 SW 25 SW 26 SW 27 SW 28 SW 29 SW AGND 5 16 SW PG 6 15 SW VCC 7 14 PGND BST 8 9 10 IN PGND 11 12 13 PGND PGND PGND Part Number*** Package MPQ8636GVE-20 Junction Temperature QFN (5x4mm) Top Marking –40°C to +125°C MP8636 E20 *** For Tape & Reel, add suffix –Z (eg. MPQ8636GVE-20–Z) MPQ8636 Rev. 1.23 www.MonolithicPower.com 9/9/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 4 MPQ8636 — 10/20A, 18V, SYNCHRONOUS, STEP-DOWN CONVERTER ABSOLUTE MAXIMUM RATINGS (1) Supply Voltage VIN .......................................21V VSW ....................................... -0.3V to VIN + 0.3V VSW (30ns) ..................................-3V to VIN + 3V VBST .....................................................VSW + 6V VBST (30ns) ........................................VSW + 6.5V Enable Current IEN(2)................................ 2.5mA All Other Pins ................................ –0.3V to +6V (3) Continuous Power Dissipation (TA=+25°) QFN3X4……………………….…..…………2.7W QFN5X4……………………….…..…………3.3W Junction Temperature .............................. 150°C Lead Temperature ................................... 260°C Storage Temperature ............... -65°C to +150°C Recommended Operating Conditions (4) Thermal Resistance (5) θJA θJC QFN (3x4mm) ........................ 46 ....... 9 .... °C/W QFN (5x4mm) ........................ 38 ....... 6 .... °C/W Notes: 1) Exceeding these ratings may damage the device. 2) Refer to the section “Configuring the EN Control”. 3) The maximum allowable power dissipation is a function of the maximum junction temperature TJ(MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD(MAX)=(TJ(MAX)TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 4) The device is not guaranteed to function outside of its operating conditions. 5) Measured on JESD51-7, 4-layer PCB. Supply Voltage VIN .......................... 4.5V to 18V Output Voltage VOUT.................... 0.611V to 13V Enable Current IEN ......................................1mA Operating Junction Temp. (TJ). -40°C to +125°C MPQ8636 Rev. 1.23 www.MonolithicPower.com 9/9/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 5 MPQ8636 — 10/20A, 18V, SYNCHRONOUS, STEP-DOWN CONVERTER ELECTRICAL CHARACTERISTICS VIN = 12V, TJ = -40°C to +125°C, unless otherwise noted. Parameters Symbol Condition Min Typ Max Units 0 1 μA 860 1000 μA Supply Current Supply Current (Shutdown) IIN VEN = 0V Supply Current (Quiescent) IIN VEN = 2V, VFB = 1V 700 MOSFET High-Side Switch-On Resistance HSRDS-ON Low-Side Switch-On Resistance LSRDS-ON Switch Leakage SW LKG MPQ8636-10, MPQ8636H10, TJ =25°C MPQ8636-20, TJ =25°C MPQ8636-10, MPQ8636H10, TJ =25°C MPQ8636-20, TJ =25°C 19.6 mΩ 9.9 5.7 mΩ 2.4 VEN = 0V, VSW = 0V or 12V 0 10 μA A Current Limit High-Side Peak Current Limit Low-Side Valley Current Limit Low-Side Negative Current (6) Limit ILIMIT_PEAK (6) ILIMIT_VALLEY MPQ8636-10 13 17.3 21.6 MPQ8636-10 9.5 11 12.5 MPQ8636H-10 10 13 16 MPQ8636-20 20 25 30 -6.5 -5 -4.5 ILIMIT_NEGATIVE A A Timer τON One-Shot ON Time Minimum On Time (6) Minimum OFF Time RFREQ=453kΩ, VOUT=1.2V τON_MIN (6) τOFF_MIN 250 ns 20 30 40 MPQ8636-10 50 100 150 MPQ8636H-10, MPQ863620 200 360 420 ns ns Over-Voltage and Under-Voltage Protection OVP Latch Threshold (6) OVP Non-Latch Threshold VOVP_LATCH MPQ8636-10 127% 130% 133% VFB VOVP_NON- MPQ8636-10, MPQ8636H10 and MPQ8636-20 117% 120% 123% VFB LATCH τOVP OVP Delay UVP Threshold (6) μs 2 VUVP 47% 50% 53% VFB TJ = 0°C to +70°C 608 611 614 mV TJ = 0°C to +125°C 605 611 617 mV TJ = -40°C to +125°C 602 611 620 mV Reference and Soft Start Reference Voltage VREF MPQ8636 Rev. 1.23 www.MonolithicPower.com 9/9/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 6 MPQ8636 — 10/20A, 18V, SYNCHRONOUS, STEP-DOWN CONVERTER ELECTRICAL CHARACTERISTICS (continued) VIN = 12V, TJ = -40°C to +125°C, unless otherwise noted. Parameters Symbol Feedback Current Soft Start Charging Current IFB ISS Condition VFB = 611mV VSS=0V Min Typ Max Units 16 50 20 100 25 nA μA 1.1 1.3 1.5 V Enable And UVLO Enable Input, Low Voltage Enable, Hysteresis VILEN VEN-HYS Enable, Input Current 250 0 0 mV VCCVth 3.8 V VCCHYS 500 mV 4.8 0.5 V % IEN VEN = 2V VEN = 0V μA VCC Regulator VCC Under-Voltage Lockout, Threshold Rising VCC Under-Voltage Lockout, Threshold Hysteresis VCC Regulator VCC Load Regulation Power-Good VCC Icc=5mA Power-Good, Rising Threshold PGVth-Hi Power-Good, Falling Threshold Power-Good, Low-to High-Delay Power Good, Sink Current Capability Power Good, Leakage Current PGVth-Lo PGTd 87% 91% 94% 80% 2.5 IOL VOL=600mA IPG_LEAK VPG = 3.3V VFB VFB ms 12 mA 10 nA 25 °C °C Thermal Protection (6) Thermal Shutdown Thermal Shutdown, Hysteresis TSD 150 Note: 6) Guaranteed by design. MPQ8636 Rev. 1.23 www.MonolithicPower.com 9/9/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 7 MPQ8636 — 10/20A, 18V, SYNCHRONOUS, STEP-DOWN CONVERTER PIN FUNCTIONS MPQ8636GLE-10, MPQ8636HGLE-10 PIN # Name 1 EN 2 FREQ 3 FB 4 SS 5 AGND 6 PG 7 VCC 8 BST 9, 14 IN 10, 11, 12, 13 PGND 15, 16 SW Description Enable. Digital input that turns the regulator on or off. Drive EN high to turn on the regulator; drive it low to turn it off. Connect EN to IN through a pull-up resistor or a resistive voltage divider for automatic startup. Do not float this pin. Frequency Set. Require a resistor connected between FREQ and IN to set the switching frequency. The input voltage and the resistor connected to the FREQ pin determine the ON time. The connection to the IN pin provides line feed-forward and stabilizes the frequency during input voltage’s variation. Feedback. Connect to the tap of an external resistor divider from the output to GND to set the output voltage. FB is also configured to realize over-voltage protection (OVP) by monitoring output voltage. MPQ8636-10 and MPQ8636H-10 provide different OVP mode. Please refer to the section “Over-Voltage-Protection (OVP)”. Place the resistor divider as close to FB pin as possible. Avoid using vias on the FB traces. Soft-Start. Connect an external capacitor to program the soft start time for the switch mode regulator. Analog Ground. The control circuit reference. Power-Good. The output is an open drain signal. Requires a pull-up resistor to a DC voltage to indicate HIGH if the output voltage exceeds 91% of the nominal voltage. There is a delay from FB ≥ 91% to when PG goes high. Internal 4.8V LDO Output. Powers the driver and control circuits. Decouple with a ≥1µF ceramic capacitor as close to the pin as possible. For best results, use X7R or X5R dielectric ceramic capacitors for their stable temperature characteristics. Bootstrap. Require a capacitor connected between SW and BST pins to form a floating supply across the high-side switch driver. Supply Voltage. Supplies power to the internal MOSFET and regulator. The MPQ863610/MPQ8636H-10 operates from a 4.5V-to-18V input rail. Requires an input decoupling capacitor. Connect using wide PCB traces and multiple vias. System Ground. Reference ground of the regulated output voltage. PCB layout requires extra care. Connect using wide PCB traces. Switch Output. Connect to the inductor and bootstrap capacitor. The high-side switch drives the pin up to the VIN during the PWM duty cycle’s ON time. The inductor current drives the SW pin negative during the OFF-time. The low-side switch’s ON-resistance and the internal Schottky diode clamp the negative voltage. Connect using wide PCB traces. MPQ8636 Rev. 1.23 www.MonolithicPower.com 9/9/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 8 MPQ8636 — 10/20A, 18V, SYNCHRONOUS, STEP-DOWN CONVERTER MPQ8636GVE-20 PIN# Name 1 EN 2 FREQ 3 FB 4 SS 5 AGND 6 PG 7 VCC 8 BST 15-18, 25-29 SW 10-14, 19-23 PGND 9, 24 IN Description Enable. Digital input that turns the regulator on or off. Drive EN high to turn on the regulator; drive it low to turn it off. Connect EN to IN through a pull-up resistor or a resistive voltage divider for automatic startup. Do not float this pin. Frequency Set. Require a resistor connected between FREQ and IN to set the switching frequency. The input voltage and the resistor connected to the FREQ pin determine the ON time. The connection to the IN pin provides line feed-forward and stabilizes the frequency during input voltage’s variation. Feedback. Connect to the tap of an external resistor divider from the output to GND to set the output voltage. Place the resistor divider as close to FB pin as possible. Avoid using vias on the FB traces. Soft-Start. Connect an external capacitor to program the soft start time for the switch mode regulator. Analog Ground. The control circuit reference. Power-Good. The output is an open drain signal. Requires a pull-up resistor to a DC voltage to indicate HIGH if the output voltage exceeds 91% of the nominal voltage. There is a delay from FB ≥ 91% to when PG goes high. Internal 4.8V LDO Output. Powers the driver and control circuits. Decouple with a ≥1µF ceramic capacitor as close to the pin as possible. For best results, use X7R or X5R dielectric ceramic capacitors for their stable temperature characteristics. Bootstrap. Require a capacitor connected between SW and BST pins to form a floating supply across the high-side switch driver. Switch Output. Connect to the inductor and bootstrap capacitor. The high-side switch drives these pins up to VIN during the PWM duty cycle’s ON time. The inductor current drives the SW pin negative during the OFF-time. The low-side switch’s ON-resistance and the internal Schottky diode holds the negative voltage. Connect all SW pins using wide PCB traces. System Ground. Reference ground of the regulated output voltage. PCB layout requires extra care. Connect using wide PCB traces. Supply Voltage. Supplies power to the internal MOSFET and regulator. The MPQ8636GVE-20 operates from a 4.5V-to-18V input rail. Requires an input decoupling capacitor. Connect using wide PCB traces and multiple vias. MPQ8636 Rev. 1.23 www.MonolithicPower.com 9/9/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 9 MPQ8636 — 10/20A, 18V, SYNCHRONOUS, STEP-DOWN CONVERTER TYPICAL CHARACTERISTICS MPQ8636-10, MPQ8636H-10, VIN = 12V, VOUT = 1V, L = 1µH, TA = 25°C, unless otherwise noted. MPQ8636 Rev. 1.23 www.MonolithicPower.com 9/9/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 10 MPQ8636 — 10/20A, 18V, SYNCHRONOUS, STEP-DOWN CONVERTER TYPICAL CHARACTERISTICS (continued) MPQ8636-10, MPQ8636H-10, VIN = 12V, VOUT = 1V, L = 1µH, TA = 25°C, unless otherwise noted. MPQ8636 Rev. 1.23 www.MonolithicPower.com 9/9/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 11 MPQ8636 — 10/20A, 18V, SYNCHRONOUS, STEP-DOWN CONVERTER TYPICAL PERFORMANCE CHARACTERISTICS MPQ8636-10, MPQ8636H-10, VIN = 12V, VOUT = 1V, L = 1µH, TA = 25°C, unless otherwise noted. MPQ8636 Rev. 1.23 www.MonolithicPower.com 9/9/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 12 MPQ8636 — 10/20A, 18V, SYNCHRONOUS, STEP-DOWN CONVERTER TYPICAL PERFORMANCE CHARACTERISTICS (continued) MPQ8636-10, MPQ8636H-10, VIN=12V, VOUT =1V, L=1µH, TA=+25°C, unless otherwise noted. MPQ8636 Rev. 1.23 www.MonolithicPower.com 9/9/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 13 MPQ8636 — 10/20A, 18V, SYNCHRONOUS, STEP-DOWN CONVERTER TYPICAL PERFORMANCE CHARACTERISTICS (continued) MPQ8636GLE-10, VIN=12V, VOUT =1V, L=1µH, TA=+25°C, unless otherwise noted. MPQ8636 Rev. 1.23 www.MonolithicPower.com 9/9/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 14 MPQ8636 — 10/20A, 18V, SYNCHRONOUS, STEP-DOWN CONVERTER BLOCK DIAGRAM IN FREQ VCC VCC EN LDO BST BIAS Minimum OFF Timer REFERENCE ON Timer BST HS Driver HS-FET LOGIC SS SW SOFT START VCC FB LS Driver FB Comparator PG UV PGOOD Comparator UV Detect Comparator OV LS-FET ZCD Current Modulator GND LS Current Limit AGND OV Detect Comparator Figure 1— Functional Block Diagram MPQ8636 Rev. 1.23 www.MonolithicPower.com 9/9/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 15 MPQ8636 — 10/20A, 18V, SYNCHRONOUS, STEP-DOWN CONVERTER OPERATION The MPQ8636 is a fully-integrated, synchronous, rectified, step-down, switch-mode converter. It uses constant-on-time (COT) control to provide a fast transient response and ease loop stabilization. At the beginning of each cycle, the high-side MOSFET (HS-FET) turns ON when the feedback voltage (VFB) drops below the reference voltage (VREF), which indicates an insufficient output voltage. The input voltage and the frequency-set resistor determine the ON period as follows: ON (ns) 6.1 RFREQ (k) VIN (V) 0.4 (1) After the ON period elapses, the HS-FET turns off. It turns ON again when VFB drops below VREF. By repeating this operation, the converter regulates the output voltage. The integrated lowside MOSFET (LS-FET) turns on when the HSFET is OFF to minimize the conduction loss. There is a dead short (or shoot-through) between input and GND if both HS-FET and LS-FET turn on at the same time. A dead-time (DT) internally generated between HS-FET OFF and LS-FET ON, or LS-FET OFF and HS-FET ON avoids shoot-through. PWM Operation MPQ8636 always functions in continuousconduction mode (CCM), meaning the inductor current can go negative in light-load conditions. Figure 2 shows CCM operation. When VFB is below VREF, HS-FET turns on for a fixed interval determined by the one- shot on-timer, as per equation 1. When the HS-FET turns off, the LSFET turns on until the next period. In CCM operation, the switching frequency is fairly constant and is also called PWM mode. Switching Frequency Selecting the switching frequency requires trading off between efficiency and component size. Low-frequency operation increases efficiency by reducing MOSFET switching losses, but requires larger inductor and capacitor values to minimize the output voltage ripple. For MPQ8636，set the ON time using the FREQ pin to set the frequency for steady-state operation on CCM. The MPQ8636 uses adaptive constant-on-time (COT) control, though the IC lacks a dedicated oscillator. Connect the FREQ pin to the IN pin through the resistor (RFREQ) so that the input voltage is feed-forwarded to the one-shot ONtime timer. When operating in steady state at CCM, the duty ratio stays at VOUT/VIN, so the switching frequency is fairly constant over the input voltage range. Set the switching frequency as follows: fSW (kHz) 106 6.1 RFREQ (k) VIN (V) (ns) VIN (V) 0.4 VOUT (V) DELAY (2) Where τDELAY is the comparator delay of about 5ns. Typically, the MPQ8636 is set to 200kHz to 1MHz applications. It is optimized to operate at high switching frequencies at high efficiency: high switching frequencies allow for physically smaller LC filter components to reduce the PCB footprint. Jitter and FB Ramp Slope Figure 3 shows jitter occurring in PWM mode. When there is noise on the VFB descending slope, the HS-FET ON time deviates from its intended point and produces jitter, and influences system stability. The VFB ripple’s slope steepness dominates the noise immunity, though its magnitude has no direct effect. Figure 2—PWM Operation MPQ8636 Rev. 1.23 www.MonolithicPower.com 9/9/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 16 MPQ8636 — 10/20A, 18V, SYNCHRONOUS, STEP-DOWN CONVERTER L SW R4 VOUT C4 IR4 IC4 R9 R1 IFB Ceramic FB Figure 5—Simplified Circuit in PWM Mode with External Ramp Compensation Figure 3—Jitter in PWM Mode Ramp with a Large ESR Capacitor Using POSCAPs or other large-ESR capacitors as the output capacitor results in the ESR ripple dominating the output ripple . The ESR also significantly influences the VFB slope. Figure 4 shows the simplified equivalent circuit in PWM mode with the HS-FET OFF and without an external ramp circuit. SW L FB Figure 5 shows the simplified equivalent circuit in PWM mode with the HS-FET OFF and an external ramp compensation circuit (R4, C4). Design the external ramp based on the inductor ripple current. Select C4, R9, R1 and R2 to meet the following condition: ESR POSCAP IR4 IC4 IFB IC4 (5) VRAMP Figure 4—Simplified Circuit in PWM Mode without External Ramp Compensation (3) Where τSW is the switching period. Ramp with a Small ESR Capacitor Use an external ramp when using ceramic output capacitors because the ESR ripple is not high enough to stabilize the system. VIN VOUT R1//R2 (6) ON R4 C4 R1//R2 R9 The descending slope of the VFB ripple then follows: To realize the stability without an external ramp, usually select the ESR value as follows: R ESR (4) Then estimate the ramp on VFB as: R2 SW ON 2 0.7 π C OUT 1 1 R1 R2 R9 2π f SW C4 5 R1 R2 Where: VOUT R1 R2 VSLOPE VOUT VRAMP OFF R4 C4 (7) Equation 7 shows that if there is instability in PWM mode, reduce either R4 or C4. If C4 is irreducible due to equation 4 limitations, then reduce R4. For a stable PWM operation, design Vslope based on equation 8. VSLOPE SW ON RESR COUT I 10-3 0.7 π 2 VOUT OUT 2 L COUT SW ON (8) Where IOUT is the load current. MPQ8636 Rev. 1.23 www.MonolithicPower.com 9/9/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 17 MPQ8636 — 10/20A, 18V, SYNCHRONOUS, STEP-DOWN CONVERTER Configuring the EN Control The regulator turns on when EN goes HIGH; conversely it turns off when EN goes low. Do not float the pin. For automatic start-up. pull the EN pin up to input voltage through a resistive voltage divider. Choose the values of the pull-up resistor (RUP from the IN pin to the EN pin) and the pull-down resistor (RDOWN from the EN pin to GND) to determine the automatic start-up voltage: VINSTART 1.5 (RUP RDOWN ) (V) RDOWN (9) For example, for RUP=100kΩ and RDOWN=51kΩ, the VIN-START is set at 4. 44V. To reduce noise, add a 10nF ceramic capacitor from EN to GND. An internal zener diode on the EN pin clamps the EN pin voltage to prevent runaway. The maximum pull-up current, assuming the worstcase 6V, for the internal zener clamp should be less than 1mA. Therefore, when driving EN with an external logic signal, use an EN voltage less than 6V. When connecting EN to IN through a pull-up resistor or a resistive voltage divider, select a resistance that ensures a maximum pull-up current of less than 1mA. If using a resistive voltage divider and VIN exceeds 6V, then the minimum resistance for the pull-up resistor, RUP, should meet: VIN 6V 6V 1mA RUP RDOWN (10) With only RUP (the pull-down resistor, RDOWN, is not connected), then the VCC UVLO threshold determines VIN-START, so the minimum resistor value is: RUP V 6V IN ( ) 1mA A typical pull-up resistor is 100kΩ. (11) (SS) mechanism to ensure a smooth output during power-up. When the EN pin goes HIGH, an internal current source (20μA) charges the SS capacitor. The SS capacitor voltage overtakes the REF voltage to the PWM comparator. The output voltage smoothly ramps up with the SS voltage. Once the SS voltage reaches the REF voltage, it continues ramping up while VREF takes over the PWM comparator. At this point, soft-start finishes and the device enters steady-state operation. Determine the SS capacitor value as follows: CSS nF SS ms ISS A VREF V (12) If the output capacitors are large, then avoid setting a short SS time or risk hitting the current limit during SS. Use a minimum value of 4.7nF if the output capacitance value exceeds 330μF. Pre-Bias Startup The MPQ8636 has been designed for monotonic startup into pre-biased loads. If the output is prebiased to a certain voltage during startup, the IC will disable switching for both high-side and lowside switches until the voltage on the soft-start capacitor exceeds the sensed output voltage at the FB pin. Power Good (PG) The MPQ8636 has a power-good (PG) output. The PG pin is the open drain of a MOSFET. Connect it to VCC or some other voltage source that measures less than 5.5V through a pull-up resistor (typically 100kΩ). After applying the input voltage, the MOSFET turns on so that the PG pin is pulled to GND before the SS is ready. After the FB voltage reaches 91% of the REF voltage, the PG pin is pulled HIGH after a 2.5ms delay. When the FB voltage drops to 80% of the REF voltage or exceeds 120% of the nominal REF voltage, the PG pin is pulled LOW. If the input DC source fails to power the MPQ8636, the PG pin is also pulled low Soft Start The MPQ8636 employs a soft start MPQ8636 Rev. 1.23 www.MonolithicPower.com 9/9/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 18 MPQ8636 — 10/20A, 18V, SYNCHRONOUS, STEP-DOWN CONVERTER even though this pin is tied to an external DC source through a pull-up resistor (typically 100kΩ). Over-Current Protection (OCP) The MPQ8636 features three current-limit levels for over-current conditions: high-side peak current limit, low-side valley current limit and lowside negative current limit. However, the OCP operation mechanism of MPQ8636 and MPQ8636H are different. For MPQ8636GLE-10: High-Side Peak Current Limit: The part has a cycle-by-cycle over-current limiting function. The device monitors the inductor current during the HS-FET ON state. When the sensed inductor current hits the peak current limit, the output of over-current comparator goes HIGH, the device enters OCP mode immediately and turns off the HS-FET and turns on the LS-FET. Low-Side Valley Current Limit: The device also monitors the inductor current during the LS-FET ON state. When ILIM=1 and at the end of the OFF time, the LS-FET sourcing current is compared to the internal positive-valley–current limit. If the valley current limit is less than the LSFET sourcing current, the HS-FET remains OFF and the LS-FET remains ON for the next ON time. When the LS-FET sourcing current drops below the valley current limit, the HS-FET turns on again. For MPQ8636H-10 and MPQ8636-20: The part enters OCP mode if only the LS-FET sourcing valley current exceeds the valley current limit. Once the OCP is triggered, the LS-FET keeps ON state until the LS-FET sourcing valley current is less than the valley current limit. And then the LS-FET turns off, the HS-FET turns on for a fixed time determined by frequency-set resistor RFREQ and input voltage. During OCP, the device tries to recover from the over-current fault with hiccup mode: the chip disables the output power stage, discharges the soft-start capacitor and then automatically retries soft-start. If the over-current condition still holds after soft-start ends, the device repeats this operation cycle until the over-current conditions disappear and then output rises back to regulation level: OCP offers non-latch protection. Low-Side Negative Current Limit: If the sensed LS-FET negative current exceeds the negative current limit, the LS-FET turns off immediately and stays OFF for the remainder of the OFF period. In this situation, both MOSFETs are OFF until the end of a fixed interval. The HS-FET body diode conducts the inductor current for the fixed time. Over-Voltage Protection (OVP) The MPQ8636 monitors the output voltage using the FB pin connected to the tap of a resistor divider to detect output over-voltage. MPQ8636 and MPQ8636H provide Latch-Off and NonLatch OVP mode as showed in Table 1. Table 1—OVP Mode OVP Mode Part # Non-Latch Mode Latch-Off Mode MPQ8636H-10 MPQ8636-20 MPQ8636-10 For MPQ8636-10: If the FB voltage exceeds the nominal REF voltage but remains lower than 120% of the REF voltage (0.611V), both MOSFETs are off. If the FB voltage exceeds 120% of the REF voltage but remains below 130%, the LS-FET turns on while the HS-FET remains off. The LSFET remains on until the FB voltage drops below 110% of the REF voltage or the low-side negative current limit is hit. If the FB voltage exceeds 130% of the REF voltage, then the device is latched off. Need cycle the input power supply or EN to restart. For MPQ8636H-10 and MPQ8636-20: Even the FB voltage exceeds 130% of the REF voltage, the part enters a non-latch off mode. Once the FB voltage comes back to the reasonable value, they will exit this OVP mode and operate normally again. UVLO Protection The MPQ8636 has under-voltage lockout protection (UVLO). When the VCC voltage exceeds the UVLO rising-threshold MPQ8636 Rev. 1.23 www.MonolithicPower.com 9/9/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 19 MPQ8636 — 10/20A, 18V, SYNCHRONOUS, STEP-DOWN CONVERTER voltage, the MPQ8636 powers up. It shuts off when the VCC voltage falls below the UVLO falling threshold voltage. This is non-latch protection. The MPQ8636 is disabled when the VCC voltage falls below 3.3 V. If an application requires a higher UVLO threshold, use the two external resistors connected to the EN pin as shown in Figure 6 to adjust the startup input voltage. For best results, use the enable resistors to set the input-voltage falling threshold (VSTOP) above 3.6V. Set the rising threshold (VSTART) to provide enough hysteresis to account for any input supply variations. Thermal Shutdown The MPQ8636 has thermal shutdown. The IC internally monitors the junction temperature. If the junction temperature exceeds the threshold value (minimum 150°C), the converter shuts off. This is a non-latch protection. There is about 25°C hysteresis. Once the junction temperature drops to about 125°C, it initiates a soft startup. IN R UP R DOWN EN Comparator EN Figure 6—Adjustable UVLO Threshold MPQ8636 Rev. 1.23 www.MonolithicPower.com 9/9/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 20 MPQ8636 — 10/20A, 18V, SYNCHRONOUS, STEP-DOWN CONVERTER APPLICATION INFORMATION Selecting the Output-Voltage-Large-ESR Capacitors For applications that electrolytic capacitor or POS capacitor with a large ESR is set as output capacitors. The feedback resistors—R1 and R2, as shown in Figure 7—set the output voltage. SW L POSCAP Figure 7—Simplified POSCAP Circuit First, choose a value for R2 that balances between high quiescent current loss (low R2) and high noise sensitivity on FB (high R2). A typical value falls within 5kΩ to 50kΩ, using a comparatively larger R2 when VOUT is low, and a smaller R2 when VOUT is high. Then calculate R1 as follows, which considers the output ripple: 1 VOUT VREF 2 R2 VREF Selecting the Output-Voltage Small-ESR Capacitors FB R4 VOUT C4 (14) R2 R4 R9 For PWM operation, estimate VFB(AVG) from equation 15. VFB( AVG) VREF R1 1 R1// R2 (15) VRAMP 2 R1// R2 R9 Usually, R9 is 0Ω, though it can also be set following equation 16 for better noise immunity. It should also be less than 20% of R1//R2 to minimize its influence on VRAMP. (13) Where VOUT is the output ripple determined by equation 22. L VFB(AVG) Where VFB(AVG) is the average FB voltage. VFB(AVG) varies with the VIN, VOUT, and load condition, where the load regulation is strictly related to the VFB(AVG). Also the line regulation is related to the VFB(AVG); improving the load or line regulation involves a lower VRAMP that meets equation 8. R2 VOUT R2 VOUT VFB(AVG) ESR R1 SW R1 VOUT FB R1 balance between high quiescent current loss and FB noise sensitivity. Choose R2 within 5kΩ to 50kΩ, using a larger R2 when VOUT is low, and a smaller R2 when VOUT is high. Determine the value of R1 as follows: R9 1 R1 R2 5 R1 R2 (16) Using equations 14 and 15 to calculate the output voltage can be complicated. To simplify the R1 calculation in equation 14, add a DCblocking capacitor, CDC, to filter the DC influence from R4 and R9. Figure 9 shows a simplified circuit with external ramp compensation and a DC-blocking capacitor. The addition of this capacitor, simplifies the R1 calculation as per equation 17 for PWM mode operation. R9 Ceramic R2 Figure 8—Simplified Ceramic Capacitor Circuit When using a low-ESR ceramic capacitor on the output, add an external voltage ramp to the FB pin consisting of R4 and C4. The ramp voltage, VRAMP, and the resistor divider influence the output voltage, as shown in Figure 8. Calculate VRAMP as shown in equation 6. Select R2 to R1 1 V 2 RAMP R2 1 VREF VRAMP 2 VOUT VREF (17) For best results, select a CDC value at least 10×C4 for better DC-blocking performance, but MPQ8636 Rev. 1.23 www.MonolithicPower.com 9/9/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 21 MPQ8636 — 10/20A, 18V, SYNCHRONOUS, STEP-DOWN CONVERTER smaller than 0.47µF to account for start-up performance. To use a larger CDC for better FB noise immunity, reduce R1 and R2 to limit effects on system start-up. Note that even with CDC, the load and line regulation are still related to VRAMP. SW FB L R4 VOUT C4 Ceramic The worst-case condition occurs at VIN = 2VOUT, where: IOUT 1 4 fSW CIN The output capacitor maintains the DC output voltage. Use ceramic capacitors or POSCAPs. Estimate the output voltage ripple as: Input Capacitor The input current to the step-down converter is discontinuous, and therefore, requires a capacitor to supply the AC current to the stepdown converter while maintaining the DC input voltage. Use ceramic capacitors for best performance. During layout, place the input capacitors as close to the IN pin as possible. The capacitance can vary significantly with temperature. Use capacitors with X5R and X7R ceramic dielectrics because they are fairly stable over a wide temperature range. The capacitors must also have a ripple current rating that exceeds the converter’s maximum input ripple current. Estimate the input ripple current as follows: VOUT V (1 OUT ) VIN VIN (21) Output Capacitor Figure 9—Simplified Ceramic Capacitor Circuit with DC-Blocking Capacitor (18) The worst-case condition occurs at VIN = 2VOUT, where: I OUT 2 IOUT V V OUT (1 OUT ) (20) fSW CIN VIN VIN ΔVIN R2 ICIN ΔVIN R1 C DC ICIN IOUT Estimate the input voltage ripple as follows: ΔV OUT VOUT V 1 (1 OUT ) (R ESR ) (22) f SW L VIN 8 f SW C OUT When using ceramic capacitors, the capacitance dominates the impedance at the switching frequency. The capacitance also dominates the output voltage ripple. For simplification, estimate the output voltage ripple as: ΔV OUT VOUT 8 fSW L C OUT For simplification, choose an input capacitor with an RMS current rating that exceeds half the maximum load current. (1 VOUT ) (23) VIN The ESR only contributes minimally to the output voltage ripple, thus requiring an external ramp to stabilize the system. Design the external ramp with R4 and C4 as per equations 4, 7 and 8. The ESR dominates the switching-frequency impedence for POSCAPs. The ESR ramp voltage is high enough to stabilize the system, thus eliminating the need for an external ramp. Select a minimum ESR value around 12mΩ to ensure stable converter operation. For simplification, the output ripple can be approximated as: VOUT (19) 2 VOUT V (1 OUT ) R ESR f SW L VIN (24) Inductor The inductor supplies constant current to the output load while being driven by the switching input voltage. A larger-value inductor results in The input capacitance value determines the converter input voltage ripple. Select a capacitor value that meets any input-voltage–ripple requirements. MPQ8636 Rev. 1.23 www.MonolithicPower.com 9/9/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 22 MPQ8636 — 10/20A, 18V, SYNCHRONOUS, STEP-DOWN CONVERTER less ripple current and lower output-ripple voltage, but is larger physical size, has a higher series resistance, and/or lower saturation current. Generally, select an inductor value that allows the inductor peak-to-peak ripple current to equal 30% to 40% of the maximum switch current limit. Also, design for a peak inductor current that is below the maximum switch current limit. The inductance value can be calculated as: L VOUT V (1 OUT ) f SW IL VIN (25) Where ΔIL is the peak-to-peak inductor ripple current. Choose an inductor that will not saturate under the maximum inductor peak current. The peak inductor current can be calculated as: ILP IOUT VOUT V (1 OUT ) 2 f SW L VIN (26) Table 2 lists a few highly-recommended highefficiency inductors. Table 2—Inductor Selector Guide Part Number Manufacturer Inductance (µH) DCR (mΩ) Current Rating (A) Dimensions L 3 x W x H (mm ) Switching Frequency (kHz) 744325072 Wurth 0.72 1.35 35 10.2 x 10.5 x 4.7 500 FDU1250C-1R0M FDA1055-1R5M 744325180 TOKO TOKO Wurth 1 1.5 1.8 1.72 2.8 3.5 31.3 24 18 13.3 x 12.1 x 5 11.6 x 10.8 x 5.5 10.2 x 10.5 x 4.7 500 500 500 Typical Design Parameter Tables The following tables include recommended component values for typical output voltages (1V, 2.5V, 3.3V) and switching frequency (500kHz). Refer to Table 3 for design cases without external ramp compensation and Table 4 for design cases with external ramp compensation. An external ramp is not needed when using highESR capacitors, such as electrolytic or POSCAPs. Use an external ramp when using low-ESR capacitors, such as ceramic capacitors. For cases not listed in this datasheet, an excel spreadsheet provided by local sales representatives can assist with the calculations. Table 3—fSW=500kHz, VIN=12V VOUT (V) 1 2.5 3.3 L (μH) 0.72 1.5 1.8 R1 (kΩ) 13.3 63.4 91 R2 (kΩ) 20 20 20 R7 (kΩ) 357 887 1200 Table 4—fSW=500kHz, VIN=12V VOUT (V) 1 2.5 3.3 L (μH) 0.72 1.5 1.8 R1 (kΩ) 13.7 66.5 95.3 R2 (kΩ) 20 20 20 R4 (kΩ) 750 1000 1200 MPQ8636 Rev. 1.23 www.MonolithicPower.com 9/9/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. C4 (pF) 220 220 220 R7 (kΩ) 357 887 1200 23 MPQ8636 — 10/20A, 18V, SYNCHRONOUS, STEP-DOWN CONVERTER TYPICAL APPLICATION (7) Figure 10 — Typical Application Circuit with No External Ramp MPQ8636-10, MPQ8636H-10, VIN=12V, VOUT=1V, IOUT=10A, fSW=500kHz Figure 11 — Typical Application Circuit with Low ESR Ceramic Capacitor MPQ8636-10, MPQ8636H-10, VIN=12V, VOUT=1V, IOUT=10A, fSW=500kHz Figure 12 — Typical Application Circuit with Low ESR Ceramic Capacitor and DC-Blocking Capacitor. MPQ8636-10, MPQ8636H-10, VIN=12V, VOUT=1V, IOUT=10A, fSW=500kHz MPQ8636 Rev. 1.23 www.MonolithicPower.com 9/9/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 24 MPQ8636 — 10/20A, 18V, SYNCHRONOUS, STEP-DOWN CONVERTER Figure 13 — Efficiency Curve MPQ8636-10, MPQ8636H-10, VOUT=1V, IOUT=1A-10A, fSW=500kHz Figure 14 — Typical Application Circuit with Low ESR Ceramic Capacitor MPQ8636-10, MPQ8636H-10, VIN=12V, VOUT=1V, IOUT=10A, fSW=300kHz Figure 15 — Efficiency Curve MPQ8636-10, MPQ8636H-10, VOUT=1V, IOUT=1A-10A, fSW=300kHz MPQ8636 Rev. 1.23 www.MonolithicPower.com 9/9/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 25 MPQ8636 — 10/20A, 18V, SYNCHRONOUS, STEP-DOWN CONVERTER Figure 16 — Typical Application Circuit with Low ESR Ceramic Capacitor MPQ8636-10, MPQ8636H-10, VIN=12V, VOUT=1V, IOUT=10A, fSW=800kHz Figure 17 — Efficiency Curve MPQ8636-10, MPQ8636H-10, VOUT=1V, IOUT=1A-10A, fSW=800kHz Figure 18 — Typical Application Circuit with Low ESR Ceramic Capacitor MPQ8636-10, MPQ8636H-10, VIN=12V, VOUT=0.8V, IOUT=10A, fSW=300kHz MPQ8636 Rev. 1.23 www.MonolithicPower.com 9/9/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 26 MPQ8636 — 10/20A, 18V, SYNCHRONOUS, STEP-DOWN CONVERTER Figure 19 — Efficiency Curve MPQ8636-10, MPQ8636H-10, VOUT=0.8V, IOUT=1A-10A, fSW=300kHz Figure 20 — Typical Application Circuit with Low ESR Ceramic Capacitor MPQ8636-10, MPQ8636H-10, VIN=12V, VOUT=0.8V, IOUT=10A, fSW=500kHz Figure 21 — Efficiency Curve MPQ8636-10, MPQ8636H-10, VOUT=0.8V, IOUT=1A-10A, fSW=500kHz MPQ8636 Rev. 1.23 www.MonolithicPower.com 9/9/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 27 MPQ8636 — 10/20A, 18V, SYNCHRONOUS, STEP-DOWN CONVERTER Figure 22 — Typical Application Circuit with Low ESR Ceramic Capacitor MPQ8636-10, MPQ8636H-10, VIN=12V, VOUT=1.2V, IOUT=10A, fSW=300kHz Figure 23 — Efficiency Curve MPQ8636-10, MPQ8636H-10, VOUT=1.2V, IOUT=1A-10A, fSW=300kHz Figure 24 — Typical Application Circuit with Low ESR Ceramic Capacitor MPQ8636-10, MPQ8636H-10, VIN=12V, VOUT=1.2V, IOUT=10A, fSW=500kHz MPQ8636 Rev. 1.23 www.MonolithicPower.com 9/9/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 28 MPQ8636 — 10/20A, 18V, SYNCHRONOUS, STEP-DOWN CONVERTER Figure 25 — Efficiency Curve MPQ8636-10, MPQ8636H-10, VOUT=1.2V, IOUT=1A-10A, fSW=500kHz Figure 26 — Typical Application Circuit with Low ESR Ceramic Capacitor MPQ8636-10, MPQ8636H-10, VIN=12V, VOUT=1.2V, IOUT=10A, fSW=800kHz Figure 27 — Efficiency Curve MPQ8636-10, MPQ8636H-10, VOUT=1.2V, IOUT=1A-10A, fSW=800kHz MPQ8636 Rev. 1.23 www.MonolithicPower.com 9/9/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 29 MPQ8636 — 10/20A, 18V, SYNCHRONOUS, STEP-DOWN CONVERTER Figure 28 — Typical Application Circuit with Low ESR Ceramic Capacitor MPQ8636-10, MPQ8636H-10, VIN=12V, VOUT=1.5 V, IOUT=10A, fSW=300kHz Figure 29 — Efficiency Curve MPQ8636-10, MPQ8636H-10, VOUT=1.5V, IOUT=1A-10A, fSW=300kHz Figure 30 — Typical Application Circuit with Low ESR Ceramic Capacitor MPQ8636-10, MPQ8636H-10, VIN=12V, VOUT=1.5 V, IOUT=10A, fSW=500kHz MPQ8636 Rev. 1.23 www.MonolithicPower.com 9/9/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 30 MPQ8636 — 10/20A, 18V, SYNCHRONOUS, STEP-DOWN CONVERTER Figure 31 — Efficiency Curve MPQ8636-10, MPQ8636H-10, VOUT=1.5V, IOUT=1A-10A, fSW=500kHz Figure 32 — Typical Application Circuit with Low ESR Ceramic Capacitor MPQ8636-10, MPQ8636H-10, VIN=12V, VOUT=1.5 V, IOUT=10A, fSW=800kHz Figure 33 — Efficiency Curve MPQ8636-10, MPQ8636H-10, VOUT=1.5V, IOUT=1A-10A, fSW=800kHz MPQ8636 Rev. 1.23 www.MonolithicPower.com 9/9/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 31 MPQ8636 — 10/20A, 18V, SYNCHRONOUS, STEP-DOWN CONVERTER Figure 34 — Typical Application Circuit with Low ESR Ceramic Capacitor MPQ8636-10, MPQ8636H-10, VIN=12V, VOUT=1.8 V, IOUT=10A, fSW=300kHz Figure 35 — Efficiency Curve MPQ8636-10, MPQ8636H-10, VOUT=1.8V, IOUT=1A-10A, fSW=300kHz Figure 36 — Typical Application Circuit with Low ESR Ceramic Capacitor MPQ8636-10, MPQ8636H-10, VIN=12V, VOUT=1.8 V, IOUT=10A, fSW=500kHz MPQ8636 Rev. 1.23 www.MonolithicPower.com 9/9/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 32 MPQ8636 — 10/20A, 18V, SYNCHRONOUS, STEP-DOWN CONVERTER Figure 37 — Efficiency Curve MPQ8636-10, MPQ8636H-10, VOUT=1.8V, IOUT=1A-10A, fSW=500kHz Figure 38 — Typical Application Circuit with Low ESR Ceramic Capacitor MPQ8636-10, MPQ8636H-10, VIN=12V, VOUT=1.8 V, IOUT=10A, fSW=800kHz Figure 39 — Efficiency Curve MPQ8636-10, MPQ8636H-10, VOUT=1.8V, IOUT=1A-10A, fSW=800kHz MPQ8636 Rev. 1.23 www.MonolithicPower.com 9/9/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 33 MPQ8636 — 10/20A, 18V, SYNCHRONOUS, STEP-DOWN CONVERTER Figure 40 — Typical Application Circuit with Low ESR Ceramic Capacitor MPQ8636-10, MPQ8636H-10, VIN=12V, VOUT=3.3 V, IOUT=10A, fSW=300kHz Figure 41 — Efficiency Curve MPQ8636-10, MPQ8636H-10, VOUT=3.3V, IOUT=1A-10A, fSW=300kHz Figure 42 — Typical Application Circuit with Low ESR Ceramic Capacitor MPQ8636-10, MPQ8636H-10, VIN=12V, VOUT=3.3 V, IOUT=10A, fSW=500kHz MPQ8636 Rev. 1.23 www.MonolithicPower.com 9/9/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 34 MPQ8636 — 10/20A, 18V, SYNCHRONOUS, STEP-DOWN CONVERTER Figure 43 — Efficiency Curve MPQ8636-10, MPQ8636H-10, VOUT=3.3V, IOUT=1A-10A, fSW=500kHz Figure 44 — Typical Application Circuit with Low ESR Ceramic Capacitor MPQ8636-10, MPQ8636H-10, VIN=12V, VOUT=3.3 V, IOUT=10A, fSW=800kHz Figure 45 — Efficiency Curve MPQ8636-10, MPQ8636H-10, VOUT=3.3V, IOUT=1A-10A, fSW=800kHz MPQ8636 Rev. 1.23 www.MonolithicPower.com 9/9/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 35 MPQ8636 — 10/20A, 18V, SYNCHRONOUS, STEP-DOWN CONVERTER Figure 46 — Typical Application Circuit with Low ESR Ceramic Capacitor MPQ8636-10, MPQ8636H-10, VIN=12V, VOUT=5 V, IOUT=10A, fSW=300kHz Figure 47 — Efficiency Curve MPQ8636-10, MPQ8636H-10, VOUT=5V, IOUT=1A-10A, fSW=300kHz Figure 48 — Typical Application Circuit with Low ESR Ceramic Capacitor MPQ8636-10, MPQ8636H-10, VIN=12V, VOUT=5 V, IOUT=10A, fSW=500kHz MPQ8636 Rev. 1.23 www.MonolithicPower.com 9/9/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 36 MPQ8636 — 10/20A, 18V, SYNCHRONOUS, STEP-DOWN CONVERTER Figure 49 — Efficiency Curve MPQ8636-10, MPQ8636H-10, VOUT=5V, IOUT=1A-10A, fSW=500kHz Figure 50 — Typical Application Circuit with Low ESR Ceramic Capacitor MPQ8636-10, MPQ8636H-10, VIN=12V, VOUT=5 V, IOUT=10A, fSW=800kHz Figure 51 — Efficiency Curve MPQ8636-10, MPQ8636H-10, VOUT=5V, IOUT=1A-10A, fSW=800kHz NOTE: 7) The all application circuits’ steady states are OK, but other performances are not tested. MPQ8636 Rev. 1.23 www.MonolithicPower.com 9/9/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 37 MPQ8636 — 10/20A, 18V, SYNCHRONOUS, STEP-DOWN CONVERTER LAYOUT RECOMMENDATION GND C1E IN PGND PGND PGND VCC SW SW SW R3 C6 SW SW AGND SW PG SW R3 R4 SW SS IN PGND EN R3 R1 PGND FREQ PGND FB PGND R3 C4 SW PGND R3 R3 BST PGND R3 R2 C1A R3 R5 C1B R3 RFREQ R3 RFREQ C1C C1D C1E PGND R3 C2 GND VOUT VIN Top Layer GND Inner1 Layer BST IN C1A C1B R3 C3 C1D R3 C5 VIN C1E L1 1. Place high current paths (GND, IN, and SW) very close to the device with short, direct and wide traces. 2. Two-layer IN copper layers are required to achieve better performance. Respectively put at least a decoupling capacitor on both Top and Bottom layers and as close to the IN and GND pins as possible. Also, several vias with 18mil diameter and 8mil hole- size are required to be placed under the device and near input capacitors to help on the thermal dissipation, also reduce the parasitic inductance. 3. Put a decoupling capacitor as close to the VCC and AGND pins as possible. 4. Keep the switching node (SW) plane as small as possible and far away from the feedback network. 5. Place the external feedback resistors next to the FB pin. Make sure that there are no vias on the FB trace. The feedback resistors should refer to AGND instead of PGND. 6. Keep the BST voltage path (BST, C3, and SW) as short as possible. 7. Recommend strongly a four-layer layout to improve thermal performance. C3 L1 SW VOUT FREQ R5 R4 C4 R1 FB VCC C5 C2 MPQ8636 MPQ8636H EN R3 SS R2 C6 PG AGND PGND 4 3 2 1 VIN VIN CIN GND EN 5 FREQ 6 SS AGND 7 FB VCC 8 PG BST Figure 52—Schematic for PCB Layout Guide SW PGND PGND CIN CIN CIN SW PGND PGND Inner2 Layer Top Layer Figure 53—Recommend Input Capacitor Placement for QFN 3mmx4mm MPQ8636 Rev. 1.23 www.MonolithicPower.com 9/9/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 38 MPQ8636 — 10/20A, 18V, SYNCHRONOUS, STEP-DOWN CONVERTER Design Example Below is a design example following the application guidelines for the specifications: Table 5—Design Example VIN VOUT fSW C1C GND VIN 4.5-18V 1V 500kHz The detailed application schematic is shown in Figure 11. The typical performance and circuit waveforms have been shown in the Typical Performance Characteristics section. For more device applications, please refer to the related Evaluation Board Datasheets. Bottom Layer FIGURE 54—PCB Layout Guideline for QFN 5mmx4mm MPQ8636 Rev. 1.23 www.MonolithicPower.com 9/9/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 39 MPQ8636 — 10/20A, 18V, SYNCHRONOUS, STEP-DOWN CONVERTER OUTLINE DRAWING FOR 16L FCQFN (3X4MM) PACKAGEPACKAGE INFORMATION MF-PO-D-0170 revision 0.0 QFN (3×4mm) PIN 1 ID 0.125x45° TYP. PIN 1 ID MARKING PIN 1 ID INDEX AREA BOTTOM VIEW TOP VIEW SIDE VIEW NOTE: 0.125x45° 1) ALL DIMENSIONS ARE IN MILLIMETERS. 2) EXPOSED PADDLE SIZE DOES NOT INCLUDE MOLD FLASH. 3) LEAD COPLANARITY SHALL BE 0.10 MILLIMETERS MAX. 4) JEDEC REFERENCE IS MO-220. 5) DRAWING IS NOT TO SCALE. RECOMMENDED LAND PATTERN MPQ8636 Rev. 1.23 www.MonolithicPower.com 9/9/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 40 MPQ8636 — 10/20A, 18V, SYNCHRONOUS, STEP-DOWN CONVERTER QFN(5×4mm) PIN 1 ID 0.125x45° TYP. PIN 1 ID MARKING PIN 1 ID INDEX AREA BOTTOM VIEW TOP VIEW SIDE VIEW NOTE: 0.125x45° 1) ALL DIMENSIONS ARE IN MILLIMETERS. 2) EXPOSED PADDLE SIZE DOES NOT INCLUDE MOLD FLASH. 3) LEAD COPLANARITY SHALL BE 0.10 MILLIMETERS MAX. 4) JEDEC REFERENCE IS MO-220. 5) DRAWING IS NOT TO SCALE. RECOMMENDED LAND PATTERN NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MPQ8636 Rev. 1.23 www.MonolithicPower.com 9/9/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 41