ON MUN5135 Digital transistors (brt) r1 = 2.2 k , r2 = 47 k Datasheet

MUN5135, DTA123JE,
DTA123JM3, NSBA123JF3
Digital Transistors (BRT)
R1 = 2.2 kW, R2 = 47 kW
PNP Transistors with Monolithic Bias
Resistor Network
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This series of digital transistors is designed to replace a single
device and its external resistor bias network. The Bias Resistor
Transistor (BRT) contains a single transistor with a monolithic bias
network consisting of two resistors; a series base resistor and a
base−emitter resistor. The BRT eliminates these individual
components by integrating them into a single device. The use of a BRT
can reduce both system cost and board space.
PIN CONNECTIONS
PIN 1
BASE
(INPUT)
PIN 3
COLLECTOR
(OUTPUT)
R1
R2
PIN 2
EMITTER
(GROUND)
Features
•
•
•
•
•
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
S and NSV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
MARKING DIAGRAMS
XX M
SC−75
CASE 463
STYLE 1
XX M
SOT−723
CASE 631AA
STYLE 1
XM 1
SOT−1123
CASE 524AA
STYLE 1
1
Symbol
Max
Unit
Collector−Base Voltage
VCBO
50
Vdc
Collector−Emitter Voltage
VCEO
50
Vdc
IC
100
mAdc
Input Forward Voltage
VIN(fwd)
12
Vdc
Input Reverse Voltage
VIN(rev)
5
Vdc
Collector Current − Continuous
SC−70/SOT−323
CASE 419
STYLE 3
1
MAXIMUM RATINGS (TA = 25°C)
Rating
XX MG
G
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1
XXX
M
G
= Specific Device Code
= Date Code*
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
ORDERING INFORMATION
See detailed ordering, marking, and shipping information in
the package dimensions section on page 2 of this data sheet.
© Semiconductor Components Industries, LLC, 2012
September, 2012 − Rev. 1
1
Publication Order Number:
DTA123J/D
MUN5135, DTA123JE, DTA123JM3, NSBA123JF3
Table 1. ORDERING INFORMATION
Part Marking
Package
Shipping†
MUN5135T1G
6M
SC−70/SOT−323
3,000 / Tape & Reel
DTA123JET1G
6M
SC−75
3,000 / Tape & Reel
DTA123JM3T5G
6M
SOT−723
8,000 / Tape & Reel
NSBA123JF3T5G
J(90°)*
SOT−1123
8,000 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*(XX°) = Degree rotation in the clockwise direction.
PD, POWER DISSIPATION (mW)
300
250
(1) SC−75 and SC−70/SOT−323; Minimum Pad
(2) SOT−1123; 100 mm2, 1 oz. copper trace
(3) SOT−723; Minimum Pad
200
150
(1)
(2) (3)
100
50
0
−50
−25
0
25
50
75
100
125
150
AMBIENT TEMPERATURE (°C)
Figure 1. Derating Curve
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2
MUN5135, DTA123JE, DTA123JM3, NSBA123JF3
Table 2. THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
202
310
1.6
2.5
mW
THERMAL CHARACTERISTICS (SC−70/SOT−323) (MUN5135)
Total Device Dissipation
TA = 25°C
(Note 1)
(Note 2)
(Note 1)
(Note 2)
Derate above 25°C
PD
mW/°C
Thermal Resistance,
Junction to Ambient
(Note 1)
(Note 2)
RqJA
618
403
°C/W
Thermal Resistance,
Junction to Lead
(Note 1)
(Note 2)
RqJL
280
332
°C/W
TJ, Tstg
−55 to +150
°C
200
300
1.6
2.4
mW
Junction and Storage Temperature Range
Thermal Characteristics (SC−75) (DTA123JE)
Total Device Dissipation
TA = 25°C
(Note 1)
(Note 2)
(Note 1)
(Note 2)
Derate above 25°C
Thermal Resistance,
Junction to Ambient
(Note 1)
(Note 2)
Junction and Storage Temperature Range
PD
mW/°C
RqJA
600
400
°C/W
TJ, Tstg
−55 to +150
°C
260
600
2.0
4.8
mW
Thermal Characteristics (SOT−723) (DTA123JM3)
Total Device Dissipation
TA = 25°C
(Note 1)
(Note 2)
(Note 1)
(Note 2)
Derate above 25°C
Thermal Resistance,
Junction to Ambient
(Note 1)
(Note 2)
Junction and Storage Temperature Range
PD
mW/°C
RqJA
480
205
°C/W
TJ, Tstg
−55 to +150
°C
254
297
2.0
2.4
mW
Thermal Characteristics (SOT−1123) (NSBA123JF3)
Total Device Dissipation
TA = 25°C
(Note 3)
(Note 4)
(Note 3)
(Note 4)
Derate above 25°C
Thermal Resistance,
Junction to Ambient
Thermal Resistance, Junction to Lead
(Note 3)
Junction and Storage Temperature Range
1.
2.
3.
4.
FR−4 @ Minimum Pad.
FR−4 @ 1.0 x 1.0 Inch Pad.
FR−4 @ 100 mm2, 1 oz. copper traces, still air.
FR−4 @ 500 mm2, 1 oz. copper traces, still air.
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3
PD
mW/°C
RqJA
493
421
°C/W
RqJL
193
°C/W
TJ, Tstg
−55 to +150
°C
MUN5135, DTA123JE, DTA123JM3, NSBA123JF3
Table 3. ELECTRICAL CHARACTERISTICS (TA = 25°C, unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
−
−
100
−
−
500
−
−
0.2
50
−
−
50
−
−
80
140
−
−
−
0.25
−
0.6
−
−
0.8
−
−
−
0.2
4.9
−
−
Unit
OFF CHARACTERISTICS
Collector−Base Cutoff Current
(VCB = 50 V, IE = 0)
ICBO
Collector−Emitter Cutoff Current
(VCE = 50 V, IB = 0)
ICEO
Emitter−Base Cutoff Current
(VEB = 6.0 V, IC = 0)
IEBO
Collector−Base Breakdown Voltage
(IC = 10 mA, IE = 0)
V(BR)CBO
Collector−Emitter Breakdown Voltage (Note 5)
(IC = 2.0 mA, IB = 0)
V(BR)CEO
nAdc
nAdc
mAdc
Vdc
Vdc
ON CHARACTERISTICS
hFE
DC Current Gain (Note 5)
(IC = 5.0 mA, VCE = 10 V)
Collector *Emitter Saturation Voltage (Note 5)
(IC = 10 mA, IB = 0.3 mA)
VCE(sat)
Input Voltage (off)
(VCE = 5.0 V, IC = 100 mA)
Vi(off)
Input Voltage (on)
(VCE = 0.2 V, IC = 5.0 mA)
Vi(on)
Output Voltage (on)
(VCC = 5.0 V, VB = 2.5 V, RL = 1.0 kW)
VOL
Output Voltage (off)
(VCC = 5.0 V, VB = 0.5 V, RL = 1.0 kW)
VOH
Input Resistor
R1
1.5
2.2
2.9
Resistor Ratio
R1/R2
0.038
0.047
0.056
5. Pulsed Condition: Pulse Width = 300 msec, Duty Cycle v 2%.
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4
Vdc
Vdc
Vdc
Vdc
Vdc
kW
MUN5135, DTA123JE, DTA123JM3, NSBA123JF3
1000
1
IC/IB = 10
25°C
150°C
0.1
−55°C
0.01
0
10
20
30
40
IC, COLLECTOR CURRENT (mA)
100
150°C
1
50
1
10
IC, COLLECTOR CURRENT (mA)
100
Figure 3. DC Current Gain
7
100
5
IC, COLLECTOR CURRENT (mA)
f = 10 kHz
IE = 0 A
TA = 25°C
6
4
3
2
1
0
10
20
30
40
150°C
1
25°C
0.1
0.01
0.001
50
−55°C
10
VO = 5 V
0
1
VR, REVERSE BIAS VOLTAGE (V)
Figure 4. Output Capacitance
2
3
Vin, INPUT VOLTAGE (V)
Figure 5. Output Current vs. Input Voltage
10
Vin, INPUT VOLTAGE (V)
Cob, CAPACITANCE (pF)
−55°C
10
Figure 2. VCE(sat) vs. IC
0
VCE = 10 V
25°C
hFE, DC CURRENT GAIN
VCE(sat), COLLECTOR−EMITTER VOLTAGE (V)
TYPICAL CHARACTERISTICS
MUN5135, DTA123JE, DTA123JM3
25°C
1
−55°C
150°C
VO = 0.2 V
0.1
0
10
20
30
40
IC, COLLECTOR CURRENT (mA)
Figure 6. Input Voltage vs. Output Current
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5
50
4
MUN5135, DTA123JE, DTA123JM3, NSBA123JF3
1000
1
VCE = 10 V
IC/IB = 10
hFE, DC CURRENT GAIN
VCE(sat), COLLECTOR−EMITTER VOLTAGE (V)
TYPICAL CHARACTERISTICS
NSBA123JF3
25°C
150°C
0.1
−55°C
0.01
0
10
20
30
40
IC, COLLECTOR CURRENT (mA)
100
−55°C
10
1
50
0.1
1
10
IC, COLLECTOR CURRENT (mA)
Figure 7. VCE(sat) vs. IC
100
5
IC, COLLECTOR CURRENT (mA)
f = 10 kHz
IE = 0 A
TA = 25°C
6
4
3
2
1
0
10
20
30
40
VR, REVERSE BIAS VOLTAGE (V)
−55°C
1
25°C
0.1
0.01
0.001
50
150°C
10
VO = 5 V
0
Figure 9. Output Capacitance
1
2
Vin, INPUT VOLTAGE (V)
Figure 10. Output Current vs. Input Voltage
100
Vin, INPUT VOLTAGE (V)
Cob, CAPACITANCE (pF)
100
Figure 8. DC Current Gain
7
0
150°C
25°C
10
25°C
−55°C
1
150°C
VO = 0.2 V
0.1
0
10
20
30
40
IC, COLLECTOR CURRENT (mA)
Figure 11. Input Voltage vs. Output Current
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6
50
3
MUN5135, DTA123JE, DTA123JM3, NSBA123JF3
PACKAGE DIMENSIONS
SC−70 (SOT−323)
CASE 419−04
ISSUE N
D
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
e1
DIM
A
A1
A2
b
c
D
E
e
e1
L
HE
3
E
HE
1
2
b
e
A
0.05 (0.002)
0.30
0.10
1.80
1.15
1.20
0.20
2.00
MILLIMETERS
NOM
MAX
0.90
1.00
0.05
0.10
0.70 REF
0.35
0.40
0.18
0.25
2.10
2.20
1.24
1.35
1.30
1.40
0.65 BSC
0.38
0.56
2.10
2.40
STYLE 3:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
c
A2
MIN
0.80
0.00
L
A1
SOLDERING FOOTPRINT*
0.65
0.025
0.65
0.025
1.9
0.075
0.9
0.035
0.7
0.028
SCALE 10:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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7
MIN
0.032
0.000
0.012
0.004
0.071
0.045
0.047
0.008
0.079
INCHES
NOM
0.035
0.002
0.028 REF
0.014
0.007
0.083
0.049
0.051
0.026 BSC
0.015
0.083
MAX
0.040
0.004
0.016
0.010
0.087
0.053
0.055
0.022
0.095
MUN5135, DTA123JE, DTA123JM3, NSBA123JF3
PACKAGE DIMENSIONS
SC−75/SOT−416
CASE 463
ISSUE F
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
−E−
2
3
b 3 PL
0.20 (0.008)
e
−D−
DIM
A
A1
b
C
D
E
e
L
HE
1
M
D
HE
C
0.20 (0.008) E
STYLE 1:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
A
L
MILLIMETERS
MIN
NOM MAX
0.70
0.80
0.90
0.00
0.05
0.10
0.15
0.20
0.30
0.10
0.15
0.25
1.55
1.60
1.65
0.70
0.80
0.90
1.00 BSC
0.10
0.15
0.20
1.50
1.60
1.70
A1
SOLDERING FOOTPRINT*
0.356
0.014
1.803
0.071
0.787
0.031
0.508
0.020
1.000
0.039
SCALE 10:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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8
INCHES
NOM MAX
0.031 0.035
0.002 0.004
0.008 0.012
0.006 0.010
0.063 0.067
0.031 0.035
0.04 BSC
0.004 0.006 0.008
0.061 0.063 0.065
MIN
0.027
0.000
0.006
0.004
0.059
0.027
MUN5135, DTA123JE, DTA123JM3, NSBA123JF3
PACKAGE DIMENSIONS
SOT−723
CASE 631AA
ISSUE D
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH. MINIMUM LEAD THICKNESS IS THE MINIMUM
THICKNESS OF BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
−X−
D
b1
A
−Y−
3
E
1
2X
HE
2
2X
e
b
C
0.08 X Y
SIDE VIEW
TOP VIEW
3X
1
3X
DIM
A
b
b1
C
D
E
e
HE
L
L2
L
MILLIMETERS
MIN
NOM
MAX
0.45
0.50
0.55
0.15
0.21
0.27
0.25
0.31
0.37
0.07
0.12
0.17
1.15
1.20
1.25
0.75
0.80
0.85
0.40 BSC
1.15
1.20
1.25
0.29 REF
0.15
0.20
0.25
STYLE 1:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
L2
BOTTOM VIEW
RECOMMENDED
SOLDERING FOOTPRINT*
2X
0.40
2X
0.27
PACKAGE
OUTLINE
1.50
3X
0.52
0.36
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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9
MUN5135, DTA123JE, DTA123JM3, NSBA123JF3
PACKAGE DIMENSIONS
SOT−1123
CASE 524AA
ISSUE C
−X−
D
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH. MINIMUM LEAD THICKNESS IS THE
MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS.
−Y−
1
3
E
2
TOP VIEW
A
c
DIM
A
b
b1
c
D
E
e
HE
L
L2
HE
SIDE VIEW
3X
STYLE 1:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
b
L2
0.08 X Y
e
2X
3X
b1
MILLIMETERS
MIN
MAX
0.34
0.40
0.15
0.28
0.10
0.20
0.07
0.17
0.75
0.85
0.55
0.65
0.35
0.40
0.95
1.05
0.185 REF
0.05
0.15
L
BOTTOM VIEW
SOLDERING FOOTPRINT*
1.20
3X
0.34
0.26
1
0.38
2X
0.20
PACKAGE
OUTLINE
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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