Fairchild NC7NZ17K8X Tinylogic uhs triple buffer with schmitt trigger input Datasheet

Revised November 2005
NC7NZ17
TinyLogic UHS Triple Buffer
with Schmitt Trigger Inputs
General Description
Features
The NC7NZ17 is a triple buffer with Schmitt trigger inputs
from Fairchild’s Ultra High Speed Series of TinyLogic in
the US8 package. The device is fabricated with advanced
CMOS technology to achieve ultra high speed with high
output drive while maintaining low static power dissipation
over a very broad VCC operating range. The device is
specified to operate over the 1.65V to 5.5V VCC range. The
inputs and outputs are high impedance when VCC is 0V.
Inputs tolerate voltages up to 7V independent of VCC operating voltage. Schmitt trigger inputs typically achieve 1V
hysteresis between the positive going and negative going
input threshold voltage at 5V VCC.
■ Space saving US8 surface mount package
■ MicroPak Pb-Free leadless package
■ Ultra High Speed: tPD 3.6 ns Typ into 50 pF at 5V VCC
■ High Output Drive: ±24 mA at 3V VCC
■ Broad VCC Operating Range; 1.65V to 5.5V
■ Power down high impedance inputs/outputs
■ Overvoltage tolerant inputs facilitate 5V to 3V translation
■ Patented noise/EMI reduction circuitry implemented
Ordering Code:
Product
Order
Package
Code
Number
Number
Top Mark
NC7NZ17K8X
MAB08A
NZ17
NC7NZ17L8X
MAC08A
U4
Package Description
Supplied As
8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide 3k Units on Tape and Reel
Pb-Free 8-Lead MicroPak, 1.6 mm Wide
5k Units on Tape and Reel
Pb-Free package per JEDEC J-STD-020B.
TinyLogic is a registered trademark of Fairchild Semiconductor Corporation.
MicroPak is a trademark of Fairchild Semiconductor Corporation.
© 2005 Fairchild Semiconductor Corporation
DS500493
www.fairchildsemi.com
NC7NZ17 TinyLogic UHS Triple Buffer with Schmitt Trigger Inputs
July 2001
NC7NZ17
Logic Symbol
Connection Diagrams
IEEE/IEC
Pin Descriptions
(Top View)
Pin Names
Description
A1, A2, A3
Data Inputs
Y1, Y2, Y3
Output
Pin One Orientation Diagram
Function Table
Y=A
Input
Output
A
Y
AAA represents Product Code Top Mark - see ordering code
L
L
Note: Orientation of Top Mark determines Pin One location. Read the Top
Product Code Mark left to right, Pin One is the lower left pin (see diagram).
H
H
H = HIGH Logic Level
Pad Assignments for MicroPak
L = LOW Logic Level
(Top Thru View)
www.fairchildsemi.com
2
Recommended Operating
Conditions (Note 2)
Supply Voltage (VCC)
−0.5V to +7V
DC Input Voltage (VIN)
−0.5V to +7V
Supply Voltage Operating (VCC)
DC Output Voltage (VOUT)
−0.5V to +7V
Supply Voltage Data Retention (VCC)
DC Input Diode Current (IIK)
1.65V to 5.5V
1.5V to 5.5V
Input Voltage (VIN)
@ VIN < −0.5V
−50 mA
0V to 5.5V
Output Voltage (VOUT)
DC Output Diode Current (IOK)
0V to VCC
−40°C to +85°C
Operating Temperature (TA)
@ VOUT < −0.5V
−50 mA
Thermal Resistance (θJA)
250°C/W
±50 mA
DC Output Current (IOUT)
±100 mA
DC VCC/GND Current (ICC/IGND)
−65°C to +150°C
Storage Temperature (TSTG)
Note 1: Absolute maximum ratings are DC values beyond which the device
may be damaged or have its useful life impaired. The datasheet specifications should be met, without exception, to ensure that the system design is
reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation outside datasheet specifications.
150°C
Junction Temperature under Bias (TJ)
Junction Lead Temperature (TL)
260°C
(Soldering, 10 seconds)
Power Dissipation (PD) @ +85°C
250 mW
Note 2: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol
VP
VN
Parameter
VOH
VOL
TA = −40°C to +85°C
(V)
Min
Typ
Max
Min
Max
Positive Threshold
1.65
0.7
1.07
1.5
0.7
1.5
Voltage
2.3
1.0
1.38
1.8
1.0
1.8
3.0
1.3
1.74
2.2
1.3
2.2
4.5
1.9
2.43
3.1
1.9
3.1
Negative Threshold
Voltage
VH
TA = +25°C
VCC
Hysteresis Voltage
5.5
2.2
2.88
3.6
2.2
3.6
1.65
0.25
0.56
0.9
0.25
0.9
2.3
0.40
0.75
1.15
0.40
1.15
3.0
0.6
0.98
1.5
0.6
1.5
4.5
1.0
1.42
2.0
1.0
2.0
2.3
5.5
1.2
1.68
2.3
1.2
1.65
0.15
0.51
1.0
0.15
1.0
2.3
0.25
0.62
1.1
0.25
1.1
3.0
0.4
0.76
1.2
0.4
1.2
4.5
0.6
1.01
1.5
0.6
1.5
1.7
0.7
1.7
Units
Conditions
V
V
V
5.5
0.7
1.20
HIGH Level Output
1.65
1.55
1.65
1.55
Voltage
2.3
2.2
2.3
2.2
3.0
2.9
3.0
2.9
4.5
4.4
4.5
4.4
1.65
1.29
1.52
1.29
2.3
1.9
2.14
1.9
IOH = −8 mA
3.0
2.4
2.75
2.4
IOH = −16 mA
3.0
2.3
2.62
2.3
IOH = −24 mA
4.5
3.8
4.13
3.8
IOH = −100 µA
V
1.65
0.0
0.1
0.1
Voltage
2.3
0.0
0.1
0.1
3.0
0.0
0.1
0.1
Input Leakage Current
IOFF
Power Off Leakage Current
IOH = −4 mA
IOH = −32 mA
LOW Level Output
IIN
VIN = VIH
IOL = 100 µA
4.5
0.0
0.1
0.1
1.65
0.08
0.24
0.24
2.3
0.10
0.3
0.3
IOL = 8 mA
3.0
0.16
0.4
0.4
IOL = 16 mA
3.0
0.24
0.55
0.55
IOL = 24 mA
4.5
0.25
0.55
0.55
0 to 5.5
±0.1
±1.0
µA
VIN = 5.5V, GND
0.0
1
10
µA
VIN or VOUT = 5.5V
3
V
VIN = VIL
IOL = 4 mA
IOL = 32 mA
www.fairchildsemi.com
NC7NZ17
Absolute Maximum Ratings(Note 1)
NC7NZ17
DC Electrical Characteristics
Symbol
TA = +25°C
VCC
Parameter
(V)
ICC
Quiescent Supply Current
(Continued)
Min
Typ
TA = −40°C to +85°C
Max
1.65 to 5.5
Min
1.0
Units
Conditions
Max
10
µA
VIN = 5.5V, GND
AC Electrical Characteristics
Symbol
tPLH
Propagation Delay
tPHL
tPLH
TA = +25°C
VCC
Parameter
Propagation Delay
tPHL
TA = −40°C to +85°C
(V)
Min
Typ
Max
Min
Max
1.8 ± 0.15
2.0
6.9
11.9
2.0
13.1
2.5 ± 0.2
1.5
4.8
8.2
1.5
9.0
3.3 ± 0.3
1.0
3.7
5.6
1.0
6.2
5.0 ± 0.5
0.8
3.0
4.7
0.8
5.2
3.3 ± 0.3
1.5
4.3
6.6
1.5
7.3
5.0 ± 0.5
1.0
3.6
5.6
1.0
6.2
CIN
Input Capacitance
0
2.5
CPD
Power Dissipation
3.3
9
Capacitance
5.0
11
Units
ns
ns
Conditions
CL = 15 pF,
RL = 1 MΩ
CL = 50 pF,
Figure
Number
Figures
1, 3
RL = 500Ω
Figures
1, 3
(Note 3)
Figure 2
pF
pF
Note 3: C PD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (ICCD ) at no output
loading and operating at 50% duty cycle. (See Figure 2.) CPD is related to ICCD dynamic operating current by the expression:
ICCD = (CPD)(VCC)(fIN) + (ICCstatic).
Dynamic Switching Characteristics
Symbol
Parameter
Conditions
VCC
TA = 25°C
(V)
Typical
Unit
VOLP
Quiet Output Dynamic Peak VOL
CL = 50pF, VIH = 5.0V, VIL = 0V
5.0
0.8
V
VOLV
Quiet Output Dynamic Valley VOL
CL = 50pF, VIH = 5.0V, VIL = 0V
5.0
−0.8
V
AC Loading and Waveforms
CL includes load and stray capacitance
Input PRR = 1.0 MHz; tW = 500 ns
FIGURE 1. AC Test Circuit
Input = AC Waveform; tr = tf = 1.8 ns;
PRR = variable; Duty Cycle = 50%
FIGURE 3. AC Waveforms
FIGURE 2. ICCD Test Circuit
www.fairchildsemi.com
4
TAPE FORMAT for US8
Package
Tape
Number
Cavity
Section
Cavities
Status
Status
Leader (Start End)
125 (typ)
Empty
Sealed
Designator
K8X
Cover Tape
Carrier
3000
Filled
Sealed
Trailer (Hub End)
75 (typ)
Empty
Sealed
Cover Tape
TAPE DIMENSIONS inches (millimeters)
TAPE FORMAT for MicroPak
Package
Designator
L8X
Tape
Number
Cavity
Section
Cavities
Status
Status
Leader (Start End)
125 (typ)
Empty
Sealed
Carrier
3000
Filled
Sealed
Trailer (Hub End)
75 (typ)
Empty
Sealed
TAPE DIMENSIONS inches (millimeters)
5
www.fairchildsemi.com
NC7NZ17
Tape and Reel Specification
NC7NZ17
Tape and Reel Specification
(Continued)
REEL DIMENSIONS inches (millimeters)
Tape Size
8 mm
A
B
C
D
N
W1
W2
W3
7.0
0.059
0.512
0.795
2.165
0.331 + 0.059/ −0.000
0.567
W1 + 0.078/−0.039
(177.8)
(1.50)
(13.00)
(20.20)
(55.00)
(8.40 + 1.50/−0.00)
(14.40)
(W1 + 2.00/−1.00)
www.fairchildsemi.com
6
NC7NZ17
Physical Dimensions inches (millimeters) unless otherwise noted
8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide
Package Number MAB08A
7
www.fairchildsemi.com
NC7NZ17 TinyLogic UHS Triple Buffer with Schmitt Trigger Inputs
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Pb-Free 8-Lead MicroPak, 1.6 mm Wide
Package Number MAC08A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
www.fairchildsemi.com
www.fairchildsemi.com
8
Similar pages