ON NCP1521BMUTBG 1.5 mhz, 600 ma step−down dc−dc converter Datasheet

NCP1521B
1.5 MHz, 600 mA
Step−Down DC−DC
Converter
High−Efficiency, Low Ripple, Adjustable
Output Voltage
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The NCP1521B step−down PWM DC−DC converter is optimized
for portable applications powered from one cell Li−ion or three cell
Alkaline/NiCd/NiMH batteries. The part is available in adjustable
output voltage versions ranging from 0.9 V to 3.3 V. It uses
synchronous rectification to increase efficiency and reduce external
part count. The device also has a built−in 1.5 MHz (nominal)
oscillator which reduces component size by allowing smaller
inductors and capacitors. Automatic switching PWM/PFM mode
offers improved system efficiency.
Additional features include integrated soft−start, cycle−by−cycle
current limiting and thermal shutdown protection. The NCP1521B is
available in space saving, low profile TSOP5 and UDFN6 packages.
Features
•
•
•
•
•
•
•
•
•
•
•
•
•
Up to 96% Efficiency
Best−In−Class Ripple, including PFM Mode
Sources up to 600 mA
1.5 MHz Switching Frequency
Adjustable Output Voltage from 0.9 V to 3.3 V
Synchronous Rectification for Higher Efficiency
2.7 V to 5.5 V Input Voltage Range
Low Quiescent Current
Shutdown Current Consumption of 0.3 mA
Thermal Limit Protection
Short Circuit Protection
All Pins are Fully ESD Protected
This is a Pb−Free Device
1
VIN
2
GND
3
EN
LX
5
CIN
OFF ON
L
DBP
= Specific Device Code
A
= Assembly Location
Y
= Year
W
= Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
Device
1
6
2 ZCMG 5
G
3
4
Shipping†
Package
NCP1521BSNT1G
TSOP−5 3000/Tape & Reel
(Pb−Free)
NCP1521BMUTBG
UDFN6 3000/Tape & Reel
(Pb−Free)
R2
VOUT
OFF ON
Cff
4
R2
1 EN
FB
6
2 GND LX
5
3 VIN GND
4
2.2 mH R1
18 pF
VOUT
10 mF
4.7 mF
VIN
Figure 1. Typical Application − TSOP−5
March, 2007 − Rev. 0
1
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
R1
© Semiconductor Components Industries, LLC, 2007
1
DBPAYWG
G
ORDERING INFORMATION
COUT
FB
5
ZC
= Specific Device Code
M
= Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
Cellular Phones, Smart Phones and PDAs
Digital Still/Video Cameras
MP3 Players and Portable Audio Systems
Wireless and DSL Modems
Portable Equipment
USB Powered Devices
VIN
5
TSOP−5
SN SUFFIX
CASE 483
UDFN6
MU SUFFIX
CASE 517AB
Typical Applications
•
•
•
•
•
•
MARKING
DIAGRAM
1
Figure 2. Typical Application − UDFN6
Publication Order Number:
NCP1521B/D
NCP1521B
100%
95%
EFFICIENCY (%)
90%
85%
80%
75%
70%
65%
60%
VOUT = 3.3 V
VIN = 4.2 V
TA = 25°C
55%
50%
0
100
200
300
400
500
600
700
IOUT (mA)
Figure 3. Efficiency vs. Output Current
Q1
Vbattery
Q2
VIN
1
LX
5
PWM/PFM
CONTROL
2.2 mH
10 mF
4.7 mF
GND
2
Enable
EN
3
R1
ILIMIT
LOGIC
CONTROL
& THERMAL
SHUTDOWN
FB
4
REFERENCE
VOLTAGE
R2
Figure 4. Simplified Block Diagram
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2
18 pF
NCP1521B
PIN FUNCTION DESCRIPTION
Pin No.
TSOP5
Pin No.
UDFN6
Pin Name
Type
1
3
VIN
Analog /
Power Input
Power supply input for the PFET power stage, analog and digital blocks. The
pin must be decoupled to ground by a 4.7 mF ceramic capacitor.
2
2, 4
GND
Analog /
Power Ground
This pin is the GND reference for the NFET power stage and the analog section of the IC. The pin must be connected to the system ground.
3
1
EN
Digital Input
Enable for switching regulators. This pin is active HIGH and is turned off by
logic LOW on this pin. Do not left this pin floating.
4
6
FB
Analog Input
Feedback voltage from the output of the power supply. This is the input to the
error amplifier.
5
5
LX
Analog Output
Description
Connection from power MOSFETs to the Inductor.
PIN CONNECTIONS
VIN
1
GND
2
EN
3
5
4
LX
FB
EN
1
6
FB
GND
2
5
LX
VIN
3
4
GND
(Top View)
Figure 5. Pin Connections − TSOP5
Figure 6. Pin Connections − UDFN6
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Minimum Voltage All Pins
Vmin
−0.3
V
Maximum Voltage All Pins (Note 2)
Vmax
7.0
V
Maximum Voltage Enable, FB, LX
Vmax
VIN + 0.3
V
Thermal Resistance, Junction −to−Air
(with Recommended Soldering Footprint)
TSOP5
UDFN6
RqJA
300
260
°C/W
Operating Ambient Temperature Range
TA
−40 to 85
°C
Storage Temperature Range
Tstg
−55 to 150
°C
Junction Operating Temperature
Tj
−40 to 125
°C
Latch−up Current Maximum Rating (TA = 85°C) (Note 4)
Lu
$100
mA
2.0
200
kV
V
1
per IPC
ESD Withstand Voltage (Note 3)
Human Body Model
Machine Model
Vesd
Moisture Sensitivity Level (Note 5)
MSL
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Maximum electrical ratings are defined as those values beyond which damage to the device may occur at TA = 25°C.
2. According to JEDEC standard JESD22−A108B.
3. This device series contains ESD protection and exceeds the following tests:
Human Body Model (HBM) per JEDEC standard: JESD22−A114.
Machine Model (MM) per JEDEC standard: JESD22−A115.
4. Latchup current maximum rating per JEDEC standard: JESD78.
5. JEDEC Standard: J−STD−020A.
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NCP1521B
ELECTRICAL CHARACTERISTICS (Typical values are referenced to TA = +25°C, Min and Max values are referenced −40°C to +85°C
ambient temperature, unless otherwise noted, operating conditions VIN = 3.6 V, VOUT = 1.2 V, unless otherwise noted.)
Pin
Rating
TSOP
UDFN
Symbol
Min
Typ
Max
Unit
VIN PIN
Input Voltage Range
1
3
VIN
2.7
−
5.5
V
Quiescent Current, PFM No Switching
1
3
Iq ON
−
30
45
mA
Standby Current, EN Low
1
3
Iq OFF
−
0.2
1.5
mA
Under Voltage Lockout (VIN Falling)
1
3
VUVLO
2.2
2.4
2.55
V
Positive going Input High Voltage Threshold, EN0 Signal
3
1
VIH
1.2
−
−
V
Negative going Input High Voltage Threshold, EN0 Signal
3
1
VIL
−
−
0.4
V
EN High Input Current, EN = 3.6 V
3
1
IENH
−
2.0
−
mA
−
−3.0
$1.0
$2.0
−
3.0
EN PIN
OUTPUT
Output Voltage Accuracy (Note 6)
Ambient Temperature
Overtemperature Range
VOUT
%
Minimum Output Voltage
VOUT
−
0.9
−
V
Maximum Output Voltage
VOUT
−
3.3
−
V
Output Voltage load regulation Overtemperature
IOUT = 100 mA to 600 mA
VOUT
−
−
0.0005
−
−
−
Load Transient Response, Rise/Falltime 1 ms
10 mA to 100 mA Load Step
200 mA to 600 mA Load Step
VOUT
−
−
35
80
−
−
Output Voltage Line Regulation, IOUT = 100 mA,
VIN = 2.7 V to 5.5 V
VOUT
−
0.05
−
Line Transient Response, IOUT = 100 mA,
3.6 V to 3.0 V Line Step (Falltime=50 ms)
VOUT
−
6
−
Output Voltage Ripple, IOUT = 300 mA (PWM Mode)
VOUT
−
2.0
−
mV
Output Voltage Ripple, IOUT = 0 mA (PFM Mode)
VOUT
−
8.0
−
mV
%/mA
mV
%
mVPP
Peak Inductor Current
5
5
ILIM
−
1200
−
mA
Oscillator Frequency
5
5
FOSC
1.3
1.5
1.8
MHz
Duty Cycle
5
5
−
−
−
100
%
TSTART
−
320
500
ms
Thermal Shutdown Threshold
TSD
−
160
−
°C
Thermal Shutdown Hysteresis
TSDH
−
25
−
°C
P−Channel On−Resistance
RLxH
−
400
−
mW
N−Channel On−Resistance
RLxL
−
400
−
mW
P−Channel Leakage Current
ILeakH
−
0.05
−
mA
N−Channel Leakage Current
ILeakL
−
0.01
−
mA
Soft−Start Time
POWER SWITCHES
6. The overall output voltage tolerance depends upon the accuracy of the external resistor (R1, R2).
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NCP1521B
TABLE OF GRAPHS
Typical Characteristics for Step−down Converter
ISTB
Iq
VOUT
Eff
Standby Current
vs. Input Voltage
7
Quiescent Current, PFM No Switching
vs. Input Voltage
8
Output Voltage Accuracy
vs. Temperature
9 and 10
Efficiency
vs. Output Current
11, 12, and 13
Freq
Switching Frequency
vs. Input Voltage
14
VOUT
Soft−Start
vs. Time
15
VOUT
Short Circuit Protection
vs. Time
16
VOUT
Line Regulation
vs. Input Voltage
VOUT
Line Transient
vs. Time
VOUT
Load Regulation
vs. Output Current
VOUT
Load Transient
vs. Time
1.0
17 and 18
19, 20, 21, and 22
23 and 24
25, 26, 27, and 28
35
0.9
EN = VIN
EN = 0 V
QUIESCENT CURRENT (mA)
IOUT = 0 mA
0.8
0.7
ISTB (mA)
Figure
0.6
0.5
0.4
0.3
0.2
0.1
0
2.7
3.2
3.7
4.2
4.7
34
33
32
31
30
29
2.5
5.2
IOUT = 0 mA
VIN, INPUT VOLTAGE (V)
3.0
3.5
4.0
4.5
VIN, INPUT VOLTAGE (V)
Figure 7. Shutdown Current vs. Supply Voltage
5.0
5.5
Figure 8. Quiescent Current PFM No Switching
vs. Supply Voltage
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NCP1521B
1.0%
0.5%
ACCURACY (%)
ACCURACY (%)
1.0%
IOUT = 30 mA
0%
IOUT = 600 mA
−0.5%
0
40
TEMPERATURE (°C)
VIN = 5.5 V
VIN = 3.6 V
−1.0%
−40
80
0
40
80
TEMPERATURE (°C)
Figure 9. Output Voltage Accuracy vs. Temperature
(VIN = 3.6 V, VOUT = 1.2 V)
Figure 10. Output Voltage Accuracy vs. Temperature
(VOUT = 1.2 V, IOUT = 200 V)
100%
100%
VOUT = 3.3 V
95%
95%
VOUT = 1.8 V
90%
EFFICIENCY (%)
VOUT = 0.9 V
80%
75%
70%
65%
80%
75%
65%
60%
55%
200
300
400
500
600
VIN = 5.5 V
70%
55%
100
VIN = 2.7 V
85%
60%
0
VIN = 3.6 V
90%
85%
50%
VIN = 2.7 V
0%
−0.5%
−1.0%
−40
EFFICIENCY (%)
0.5%
50%
0
100
200
300
400
500
600
IOUT, OUTPUT CURRENT (mA)
IOUT, OUTPUT CURRENT (mA)
Figure 11. Efficiency vs. Output Current
(VIN = 3.6 V, TA = 255C)
Figure 12. Efficiency vs. Output Current
(VOUT = 1.2 V, TA = 255C)
100%
1.8
EFFICIENCY (%)
90%
FREQUENCY (MHz)
95%
−40°C
85%
80%
25°C
75%
85°C
70%
65%
60%
1.7
1.6
−40°C
1.5
25°C
85°C
1.4
55%
50%
0
100
200
300
400
IOUT, OUTPUT CURRENT (mA)
500
600
1.3
2.7
Figure 13. Efficiency vs. Output Current
(VIN = 3.6 V, VOUT = 1.2 V)
3.2
3.7
4.2
4.7
VIN, INPUT VOLTAGE (V)
5.2
Figure 14. Switching Frequency vs. Input
Voltage (VOUT = 1.2 V, IOUT = 300 mA)
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NCP1521B
VOUTIN
2 V/div
VOUT
500 mV/div
ILX
500 mV/div
ILX
200 mV/div
VOUT
200 mV/div
Time
2.5 ms/div
Time
100 ms/div
Figure 16. Short−Circuit Protection
(VIN = 3.6 V, VOUT = 1.2 V)
1.25
1.25
1.24
1.24
VOUT, OUTPUT VOLTAGE (V)
VOUT, OUTPUT VOLTAGE (V)
Figure 15. Typical Soft−Start
(VIN = 3.6 V, VOUT = 1.2 V, IOUT = 250 mA)
1.23
1.22
85°C
1.21
25°C
1.20
1.19
−40°C
1.18
1.17
1.16
1.15
2.7
3.2
3.7
4.2
4.7
1.23
IOUT = 1 mA
1.22
IOUT = 100 mA
1.21
1.20
1.19
IOUT = 600 mA
1.18
1.17
1.16
1.15
2.7
5.2
3.2
3.7
4.2
4.7
VIN, INPUT VOLTAGE (V)
VIN, INPUT VOLTAGE (V)
Figure 17. Line Regulation
(VOUT = 1.2 V, IOUT = 100 mA)
Figure 18. Line Regulation
(VOUT = 3.6 V, TA = 255C)
VIN
1 V/div
5.2
VIN
1 V/div
VOUT
20 mV/div
VOUT
20 mV/div
Time
20 ms/div
Time
20 ms/div
Figure 19. 3.0 V to 3.6 V Line Transient
(Risetime = 50 ms, VOUT = 1.2 V, IOUT = 100 mA,
TA = 255C)
Figure 20. 3.6 V to 3.0 V Line Transient
(Risetime = 50 ms, VOUT = 1.2 V, IOUT = 100 mA,
TA = 255C)
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1.5
1.5
1.0
1.0
−40°C
0.5
LOAD REGULATION (%)
LOAD REGULATION (%)
NCP1521B
25°C
0
−0.5
VIN = 5.5 V
−1.0
VIN = 2.7 V
0
−0.5
85°C
−1.5
0.5
VIN = 3.6 V
−1.0
0
100
200
300
400
500
−1.5
600
0
100
200
300
400
500
IOUT, (mA)
IOUT, (mA)
Figure 21. Load Regulation
(VIN = 3.6 V, VOUT = 1.2 V)
Figure 22. Load Regulation
(VOUT = 1.2 V, TA = 255C)
VOUT
50 mV/div
VOUT
50 mV/div
IOUT
50 mA/div
IOUT
50 mA/div
Figure 23. 10 mA to 100 mA Load Transient
(VIN = 3.6 V, VOUT = 1.2 V, TA = 255C)
Figure 24. 100 mA to 10 mA Load Transient
(VIN = 3.6 V, VOUT = 1.2 V, TA = 255C)
VOUT
50 mV/div
VOUT
50 mV/div
IOUT
200 mA/div
IOUT
200 mA/div
Figure 25. 200 mA to 600 mA Load Transient
(VIN = 3.6 V, VOUT = 1.2 V, TA = 255C)
Figure 26. 200 mA to 100 mA Load Transient
(VIN = 3.6 V, VOUT = 1.2 V, TA = 255C)
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600
NCP1521B
OPERATION DESCRIPTION
Overview
VOUT
10mV/div
The NCP1521B uses a constant frequency, current mode
step−down architecture. Both the main (P−Channel
MOSFET) and synchronous (N−Channel MOSFET)
switches are internal.
It delivers a constant voltage from either a single Li−Ion
or three cell NiMH/NiCd battery to portable devices such
as cell phones and PDA. The output voltage is set by an
external resistor divider. The NCP1521B sources at least
600 mA, depending on external components chosen.
The NCP1521B works with two modes of operation;
PWM/PFM depending on the current required. In PWM
mode, the device can supply voltage with a tolerance of
"3% and 90% efficiency or better. Lighter load currents
cause the device to automatically switch into PFM mode
for reduced current consumption (IQ = 30 mA typ) and
extended battery life.
Additional features include soft−start, undervoltage
protection, current overload protection, and thermal
shutdown protection. As shown in Figure 1, only six
external components are required. The part uses an internal
reference voltage of 0.6 V. It is recommended to keep the
part in shutdown mode until the input voltage is 2.7 V or
higher.
ILx
100mA/div
VLx
2V/div
200 ns/div
Figure 27. PWM Switching Waveform
(VIN = 3.6 V, VOUT = 1.2 V, IOUT = 600 mA)
PFM Operating Mode
Under light load conditions, the NCP1521B enters in low
current PFM mode operation to reduce power
consumption. The output regulation is implemented by
pulse frequency modulation. If the output voltage drops
below the threshold of PFM comparator, a new cycle will
be initiated by the PFM comparator to turn on the switch
Q1. Q1 remains ON during the minimum on time of the
structure while Q2 is in its current source mode. The peak
inductor current depends upon the drop between input and
output voltage. After a short dead time delay where Q1 is
switched OFF, Q2 is turned in its ON state. The negative
current detector will detect when the inductor current drops
below zero and sends the signal to turn Q2 to current source
mode to prevent a too large deregulation of the output
voltage. When the output voltage falls below the threshold
of the PFM comparator, a new cycle starts immediately.
PWM Operating Mode
In this mode, the output voltage of the NCP1521B is
regulated by modulating the on−time pulse width of the
main switch Q1 at a fixed frequency of 1.5 MHz. The
switching of the PMOS Q1 is controlled by a flip−flop
driven by the internal oscillator and a comparator that
compares the error signal from an error amplifier with the
sum of the sensed current signal and compensation ramp.
This driver switches ON and OFF the upper side transistor
(Q1) and switches the lower side transistor (Q2) in either
ON state or in current source mode. At the beginning of
each cycle, the main switch Q1 is turned ON while Q2 is
in its current source mode by the rising edge of the internal
oscillator clock. The inductor current ramps up until the
sum of the current sense signal and compensation ramp
becomes higher than the error voltage amplifier. Once this
has occurred, the PWM comparator resets the flip−flop, Q1
is turned OFF and the synchronous switch Q2 is turned in
its ON state. Q2 replaces the external Schottky diode to
reduce the conduction loss and improve the efficiency. To
avoid overall power loss, a certain amount of dead time is
introduced to ensure Q1 is completely turned OFF before
Q2 is being turned ON.
Vout
10mV/div
VLx
2V/div
ILx
100mA/div
Figure 28. PFM Mode Switching Waveform
(VIN = 3.6 V, VOUT = 1.2 V, IOUT = 0 mA)
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NCP1521B
Cycle−by−Cycle Current Limitation
the typical current consumption will be 0.3 mA (typical
value). Applying a voltage above 1.2 V to EN pin will
enable the device for normal operation. The typical
threshold is around 0.7 V. The device will go through
soft−start to normal operation.
From the block diagram (Figure 4), an ILIM comparator
is used to realize cycle−by−cycle current limit protection.
The comparator compares the LX pin voltage with the
reference voltage, which is biased by a constant current. If
the inductor current reaches the limit, the ILIM comparator
detects the LX voltage falling below the reference voltage
and releases the signal to turn off the switch Q1. The
cycle−by−cycle current limit is set at 1200 mA (nom).
Thermal Shutdown
Internal Thermal Shutdown circuitry is provided to
protect the integrated circuit in the event that the maximum
junction temperature is exceeded. If the junction
temperature exceeds 160°C, the device shuts down. In this
mode switch Q1 and Q2 and the control circuits are all
turned off. The device restarts in soft−start after the
temperature drops below 135°C. This feature is provided
to prevent catastrophic failures from accidental device
overheating, and it is not intended as a substitute for proper
heatsinking.
Short Circuit Protection
When the output is shorted to ground, the device limits
the inductor current. The duty−cycle is minimum and the
consumption on the input line is 300 mA (Typ). When the
short circuit condition is removed, the device returns to the
normal mode of operation.
Soft−Start
The NCP1521B uses soft−start (300 ms Typ) to limit the
inrush current when the device is initially enabled.
Soft−start is implemented by gradually increasing the
reference voltage until it reaches the full reference voltage.
During startup, a pulsed current source charges the internal
soft−start capacitor to provide gradually increasing
reference voltage. When the voltage across the capacitor
ramps up to the nominal reference voltage, the pulsed
current source will be switched off and the reference
voltage will switch to the regular reference voltage.
Low Dropout Operation
The NCP1521B offers a low input to output voltage
difference. The NCP1521B can operate at 100% duty
cycle. In this mode the PMOS (Q1) remains completely on.
The minimum input voltage to maintain regulation can
be calculated as:
VIN(min) + VOUT(max)
) (IOUT (RDS(on) ) RINDUCTOR))
(eq. 1)
•
•
•
•
Shutdown Mode
Forcing this pin to a voltage below 0.4 V will shut down
the IC. In shutdown mode, the internal reference, oscillator
and most of the control circuitries are turned off. Therefore,
VOUT: Output Voltage (Volts)
IOUT: Max Output Current
RDS(on): P−Channel Switch RDS(on)
RINDUCTOR: Inductor Resistance (DCR)
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NCP1521B
APPLICATION INFORMATION
Output Voltage Selection
The corner frequency is given by:
The output voltage is programmed through an external
resistor divider connected from VOUT to FB then to GND.
For low power consumption and noise immunity, the
resistor from FB to GND (R2) should be in the
[100 k−600 k] range. If R2 is 200 k given the VFB is 0.6 V,
the current through the divider will be 3.0 mA.
The formula below gives the value of VOUT, given the
desired R1 and the R1 value:
(1 ) R1)
R2
VOUT + VFB
•
•
•
•
fc +
1
COUT
+
1
2p Ǹ2.2 mH
10 mF
+ 34 kHz
(eq. 3)
The device is intended to operate with inductance values
between 1.0 mH and maximum of 4.7 mH.
If the corner frequency is moved, it is recommended to
check the loop stability depending on the output ripple
voltage accepted and output current required. For lower
frequency, the stability will be increased; a larger output
capacitor value could be chosen without critical effect on
the system. On the other hand, a smaller capacitor value
increases the corner frequency and it should be critical for
the system stability. Take care to check the loop stability.
The phase margin is usually higher than 45°.
(eq. 2)
VOUT: Output Voltage (Volts)
VFB: Feedback Voltage = 0.6 V
R1: Feedback Resistor from VOUT to FB
R2: Feedback Resistor from FB to GND
Table 2. L−C Filter Example
Input Capacitor Selection
In PWM operating mode, the input current is pulsating
with large switching noise. Using an input bypass capacitor
can reduce the peak current transients drawn from the
input supply source, thereby reducing switching noise
significantly. The capacitance needed for the input bypass
capacitor depends on the source impedance of the input
supply.
The maximum RMS current occurs at 50% duty cycle
with maximum output current, which is Iout_max/2.
For NCP1521B, a low profile, low ESR ceramic
capacitor of 4.7 mF should be used for most of the cases. For
effective bypass results, the input capacitor should be
placed as close as possible to the VIN pin.
Inductance (L)
TDK
C2012X5ROJ475KB
mH
22
mF
2.2
mH
10
mF
4.7
mH
4.7
mF
ǒ
V
V
DIL + OUT 1− OUT
L fSW
VIN
Ǔ
(eq. 4)
DIL peak to peak inductor ripple current
L inductor value
fSW switching frequency
GRM21BR71C475KA
JMK212BY475MG
1.0
The inductor parameters directly related to device
performances are saturation current and DC resistance and
inductance value. The inductor ripple current (DIL)
decreases with higher inductance:
GRM188R60J475KE
Taiyo Yuden
Output Capacitor (Cout)
Inductor Selection
Table 1. List of Input Capacitor
Murata
2p ǸL
The saturation current of the inductor should be rated
higher than the maximum load current plus half the ripple
current:
C1632X5ROJ475KT
DI
IL(MAX) + IO(MAX) ) L
2
Output L−C Filter Design Considerations
The NCP1521B operates at 1.5 MHz frequency and uses
current mode architecture. The correct selection of the
output filter ensures good stability and fast transient
response.
Due to the nature of the buck converter, the output L−C
filter must be selected to work with internal compensation.
For NCP1521B, the internal compensation is internally
fixed and it is optimized for an output filter of L = 2.2 mH
and COUT = 10 mF.
(eq. 5)
DIL(MAX) Maximum inductor current
DIO(MAX) Maximum Output current
The inductor’s resistance will factor into the overall
efficiency of the converter. For best performances, the DC
resistance should be less than 0.3 W for good efficiency.
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11
NCP1521B
Table 3. LIST OF INDUCTOR
Table 4. LIST OF OUTPUT CAPACITOR
FDK
MIPW3226 Series
TDK
Murata
GRM188R60J475KE
4.7 mF
VLF3010AT Series
GRM21BR60J106ME19L
10 mF
Taiyo Yuden
LQ CBL2012
GRM188R60OJ106ME
10 mF
Coil craft
DO1605−T Series
JMK212BY475MG
4.7 mF
JMK212BJ106MG
10 mF
C2012X5ROJ475KB
4.7 mF
C2012X5ROJ226M
22 mF
C2012X5ROJ106K
10 mF
Taiyo Yuden
LPO3010
Output Capacitor Selection
TDK
Selecting the proper output capacitor is based on the
desired output ripple voltage. Ceramic capacitors with low
ESR values will have the lowest output ripple voltage and
are strongly recommended. The output capacitor requires
either an X7R or X5R dielectric.
The output ripple voltage in PWM mode is given by:
DVOUT + DIL
ǒ4
1
fSW−3
COUT
Feed−Forward Capacitor Selection
The feed−forward capacitor sets the feedback loop
response and is critical to obtain good loop stability.
Given that the compensation is internally fixed, a fixed
18 pF or higher ceramic capacitor is needed. Choose a
small ceramic capacitor X7R or X5R or COG dielectric.
Ǔ
) ESR (eq. 6)
In PFM mode (at light load), the output voltage is
regulated by pulse frequency modulation. The output
voltage ripple is independent of the output capacitor value.
It is set by the threshold of PFM comparator.
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12
NCP1521B
PACKAGE DIMENSIONS
TSOP−5
CASE 483−02
ISSUE F
2X
0.10 T
2X
0.20 T
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES
LEAD FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS
OF BASE MATERIAL.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
5. OPTIONAL CONSTRUCTION: AN
ADDITIONAL TRIMMED LEAD IS ALLOWED
IN THIS LOCATION. TRIMMED LEAD NOT TO
EXTEND MORE THAN 0.2 FROM BODY.
D 5X
NOTE 5
0.20 C A B
5
1
4
2
L
3
M
B
S
K
DETAIL Z
G
A
DIM
A
B
C
D
G
H
J
K
L
M
S
DETAIL Z
J
C
0.05
SEATING
PLANE
H
T
SOLDERING FOOTPRINT*
0.95
0.037
MILLIMETERS
MIN
MAX
3.00 BSC
1.50 BSC
0.90
1.10
0.25
0.50
0.95 BSC
0.01
0.10
0.10
0.26
0.20
0.60
1.25
1.55
0_
10 _
2.50
3.00
1.9
0.074
2.4
0.094
1.0
0.039
0.7
0.028
SCALE 10:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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13
NCP1521B
PACKAGE DIMENSIONS
UDFN6 2x2, 0.65P
CASE 517AB−01
ISSUE A
D
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.20mm FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
A
B
PIN ONE
REFERENCE
0.10 C
2X
ÍÍÍ
ÍÍÍ
ÍÍÍ
E
DIM
A
A1
A3
b
D
D2
E
E2
e
K
L
0.10 C
2X
A3
0.10 C
A
6X
0.08 C
SOLDERING FOOTPRINT*
A1
C
6X
0.40
1
e
L
6X
0.47
0.95
SEATING
PLANE
D2
6X
MILLIMETERS
MIN
MAX
0.45
0.55
0.00
0.05
0.127 REF
0.25
0.35
2.00 BSC
1.50
1.70
2.00 BSC
0.80
1.00
0.65 BSC
0.20
−−−
0.25
0.35
1
4X
3
1.70
E2
6X
K
6
4
BOTTOM VIEW
6X
b
0.10 C A
0.05 C
2.30
B
0.65
PITCH
DIMENSIONS: MILLIMETERS
NOTE 3
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
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