ON NDP10N62ZG N-channel power mosfet 620 v, 0.65 â ¦ Datasheet

NDF10N62Z, NDP10N62Z
N-Channel Power MOSFET
620 V, 0.65 W
Features
•
•
•
•
•
Low ON Resistance
Low Gate Charge
Zener Diode−protected Gate
100% Avalanche Tested
These Devices are Pb−Free and RoHS Compliant
http://onsemi.com
VDSS
RDS(ON) (TYP) @ 5 A
620 V
0.65 Ω
ABSOLUTE MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
Symbol
Drain−to−Source Voltage
VDSS
Continuous Drain Current,
RqJC
ID
Continuous Drain Current
RqJC, TA = 100°C
NDF10N62Z
NDP10N62Z
Unit
N−Channel
620 (Note 1)
V
D (2)
10 (Note 2)
A
ID
5.7 (Note 2)
A
Pulsed Drain Current,
VGS @ 10 V
IDM
36 (Note 2)
A
Power Dissipation, RqJC
(Note 1)
PD
Gate−to−Source Voltage
VGS
±30
V
Single Pulse Avalanche
Energy, ID = 10 A
EAS
300
mJ
ESD (HBM)
(JESD22−A114)
Vesd
3900
V
RMS Isolation Voltage
(t = 0.3 sec., R.H. ≤ 30%,
TA = 25°C) (Figure 14)
VISO
Peak Diode Recovery
dv/dt
4.5 (Note 3)
V/ns
Continuous Source
Current (Body Diode)
IS
10
A
Maximum Temperature for
Soldering Leads
TL
260
°C
Operating Junction and
Storage Temperature Range
TJ, Tstg
−55 to 150
°C
G (1)
36
125
W
4500
April, 2010 − Rev. 0
MARKING
DIAGRAM
V
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface mounted on FR4 board using 1″ sq. pad size,
(Cu area = 1.127 in sq [2 oz] including traces)
2. Limited by maximum junction temperature
3. IS ≤ 10 A, di/dt ≤ 200 A/ms, VDD = 80% BVDSS
© Semiconductor Components Industries, LLC, 2010
S (3)
TO−220FP
CASE 221D
STYLE 1
1
NDF10N62ZG
or
NDP10N62ZG
AYWW
Gate
Source
TO−220AB
CASE 221A
STYLE 5
Drain
A
Y
WW
G
= Location Code
= Year
= Work Week
= Pb−Free Package
ORDERING INFORMATION
Device
Package
Shipping
NDF10N62ZG
TO−220FP
50 Units/Rail
NDP10N62ZG
TO−220AB
In Development
Publication Order Number:
NDF10N62Z/D
NDF10N62Z, NDP10N62Z
THERMAL RESISTANCE
Symbol
NDF10N62Z
NDP10N62Z
Unit
Junction−to−Case (Drain)
Parameter
RqJC
3.4
1.0
°C/W
Junction−to−Ambient Steady State (Note 4)
RqJA
50
50
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Characteristic
Test Conditions
Symbol
Min
VGS = 0 V, ID = 1 mA
BVDSS
620
Reference to 25°C,
ID = 1 mA
DBVDSS/
DTJ
Typ
Max
Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Drain−to−Source Leakage Current
25°C
VDS = 620 V, VGS = 0 V
Gate−to−Source Forward Leakage
V
0.6
IDSS
V/°C
1
125°C
mA
50
VGS = ±20 V
IGSS
Static Drain−to−Source
On−Resistance
VGS = 10 V, ID = 5.0 A
RDS(on)
Gate Threshold Voltage
VDS = VGS, ID = 100 mA
VGS(th)
VDS = 15 V, ID = 10 A
gFS
7.9
S
Ciss
1425
pF
Coss
150
Reverse Transfer Capacitance
Crss
35
Total Gate Charge
Qg
47
±10
mA
0.75
W
4.5
V
ON CHARACTERISTICS (Note 5)
Forward Transconductance
0.65
3.0
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
Gate−to−Source Charge
VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
nC
Qgs
9.3
Qgd
25
Plateau Voltage
Vgp
6.4
V
Gate Resistance
Rg
1.5
W
td(on)
15
ns
tr
31
td(off)
40
tf
21
Gate−to−Drain (“Miller”) Charge
VDD = 310 V, ID = 10 A,
VGS = 10 V
RESISTIVE SWITCHING CHARACTERISTICS
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
VDD = 310 V, ID = 10 A,
VGS = 10 V, RG = 5 Ω
Fall Time
SOURCE−DRAIN DIODE CHARACTERISTICS (TC = 25°C unless otherwise noted)
Diode Forward Voltage
IS = 10 A, VGS = 0 V
VSD
Reverse Recovery Time
VGS = 0 V, VDD = 30 V
IS = 10 A, di/dt = 100 A/ms
trr
395
ns
Qrr
3.0
mC
Reverse Recovery Charge
4. Insertion mounted
5. Pulse Width ≤ 380 ms, Duty Cycle ≤ 2%.
http://onsemi.com
2
1.6
V
NDF10N62Z, NDP10N62Z
TYPICAL CHARACTERISTICS
20
7.0 V
14
6.4 V
12
6.2 V
10
6.0 V
8
5.8 V
6
5.6 V
5.4 V
4
4
8
12
16
20
24
14
12
10
8
TJ = 150°C
6
4
TJ = −55°C
2
6
7
Figure 2. Transfer Characteristics
0.70
ID = 5 A
0.65
5
6
7
8
9
10
VGS, GATE−TO−SOURCE VOLTAGE (V)
8
0.80
TJ = 25°C
VGS = 10 V
0.75
0.70
0.65
0.60
2.5
5.0
7.5
10
12.5
ID, DRAIN CURRENT (A)
Figure 3. On−Resistance vs. Gate Voltage
Figure 4. On−Resistance vs. Drain Current
and Gate Voltage
1.15
BVDSS, NORMALIZED BREAKDOWN
VOLTAGE (V)
2.7
RDS(on), DRAIN−TO−SOURCE
RESISTANCE (NORMALIZED)
5
Figure 1. On−Region Characteristics
0.75
VGS = 10 V
ID = 5 A
1.7
1.2
0.7
0.2
−50
4
VGS, GATE−TO−SOURCE VOLTAGE (V)
TJ = 25°C
2.2
3
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
0.80
0.60
TJ = 25°C
16
2
0
5.0 V
0
VDS = 30 V
18
6.6 V
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
ID, DRAIN CURRENT (A)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
10 V
16
2
0
20
VGS = 15 V
TJ = 25°C
ID, DRAIN CURRENT (A)
18
−25
0
25
50
75
100
125
150
1.1
ID = 1 mA
1.05
1.0
0.95
0.9
−50
TJ, JUNCTION TEMPERATURE (°C)
−25
0
25
50
75
100
125
TJ, JUNCTION TEMPERATURE (°C)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. BVDSS Variation with Temperature
http://onsemi.com
3
150
NDF10N62Z, NDP10N62Z
TYPICAL CHARACTERISTICS
3500
100
VGS = 0 V
TJ = 25°C
3000
TJ = 150°C
10
C, CAPACITANCE (pF)
IDSS, LEAKAGE (mA)
VGS = 0 V
1
TJ = 100°C
0.1
2500
2000
Ciss
1500
1000
Crss
500
0
100
300
500
400
600
50
75
100
125
150
175
Figure 8. Capacitance Variation
QT
10
Qgs
200
Qgd
VGS
5
VDS = 310 V
ID = 10 A
TJ = 25°C
5
10
15
VDD = 310 V
ID = 10 A
VGS = 10 V
300
VDS
20
25
30
35
40
45
0
50
tr
100
tf
td(on)
10
1
1
10
100
Qg, TOTAL GATE CHARGE (nC)
RG, GATE RESISTANCE (W)
Figure 9. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
Figure 10. Resistive Switching Time Variation
vs. Gate Resistance
100
ID, DRAIN CURRENT (A)
6
4
2
0.4
td(off)
100
VGS = 0 V
TJ = 25°C
8
200
1000
t, TIME (ns)
15
0
25
Figure 7. Drain−to−Source Leakage Current
vs. Voltage
400
0
0
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
20
0
Coss
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
10
IS, SOURCE CURRENT (A)
200
0
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
VGS, GATE−TO−SOURCE VOLTAGE (V)
0.01
0.5
0.6
0.7
0.8
0.9
10
1
1 ms
100 ms
10 ms
Mounted on 2″ sq. FR4
board (1″ sq. 2 oz. Cu 0.06″
thick single sided) with one
die operating
RDS(on) Limit
Thermal Limit
Package Limit
0.1
0.01
1.0
VGS = 10 V
Single Pulse
TC = 25°C
1
10
10 ms
dc
100
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 11. Diode Source Current vs.
Forward Voltage
Figure 12. Maximum Rated Forward Biased
Safe Operating Area for NDF10N62Z
http://onsemi.com
4
1000
NDF10N62Z, NDP10N62Z
TYPICAL CHARACTERISTICS
10
R(t) (°C/W)
Duty Cycle = 50%
1 20%
10%
5%
0.1
2%
1%
0.01
RqJC Steady State = 3.4°C/W
Single Pulse Simulation
0.001
0.000001 0.00001
0.0001
0.001
0.1
0.01
1
10
PULSE TIME (sec)
Figure 13. Thermal Impedance for NDF10N62Z
LEADS
HEATSINK
0.110″ MIN
Figure 14. Isolation Test Diagram
Measurement made between leads and heatsink with all leads shorted together.
*For additional mounting information, please download the ON Semiconductor
Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
5
100
1000
NDF10N62Z, NDP10N62Z
PACKAGE DIMENSIONS
TO−220FP
CASE 221D−03
ISSUE K
−T−
−B−
F
SEATING
PLANE
C
S
Q
U
DIM
A
B
C
D
F
G
H
J
K
L
N
Q
R
S
U
A
1 2 3
H
−Y−
K
G
N
L
D
J
R
3 PL
0.25 (0.010)
M
B
M
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH
3. 221D-01 THRU 221D-02 OBSOLETE, NEW
STANDARD 221D-03.
−T−
F
T
SEATING
PLANE
C
S
A
U
1 2 3
H
K
Z
L
R
V
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION Z DEFINES A ZONE WHERE ALL
BODY AND LEAD IRREGULARITIES ARE
ALLOWED.
DIM
A
B
C
D
F
G
H
J
K
L
N
Q
R
S
T
U
V
Z
4
Q
MILLIMETERS
MIN
MAX
15.67
16.12
9.96
10.63
4.50
4.90
0.60
1.00
2.95
3.28
2.54 BSC
3.00
3.43
0.45
0.63
12.78
13.73
1.23
1.47
5.08 BSC
3.10
3.50
2.51
2.96
2.34
2.87
6.06
6.88
STYLE 1:
PIN 1. GATE
2. DRAIN
3. SOURCE
Y
TO−220AB
CASE 221A−09
ISSUE AE
B
INCHES
MIN
MAX
0.617
0.635
0.392
0.419
0.177
0.193
0.024
0.039
0.116
0.129
0.100 BSC
0.118
0.135
0.018
0.025
0.503
0.541
0.048
0.058
0.200 BSC
0.122
0.138
0.099
0.117
0.092
0.113
0.239
0.271
J
G
D
INCHES
MIN
MAX
0.570
0.620
0.380
0.405
0.160
0.190
0.025
0.035
0.142
0.161
0.095
0.105
0.110
0.155
0.014
0.025
0.500
0.562
0.045
0.060
0.190
0.210
0.100
0.120
0.080
0.110
0.045
0.055
0.235
0.255
0.000
0.050
0.045
----0.080
STYLE 5:
PIN 1.
2.
3.
4.
N
MILLIMETERS
MIN
MAX
14.48
15.75
9.66
10.28
4.07
4.82
0.64
0.88
3.61
4.09
2.42
2.66
2.80
3.93
0.36
0.64
12.70
14.27
1.15
1.52
4.83
5.33
2.54
3.04
2.04
2.79
1.15
1.39
5.97
6.47
0.00
1.27
1.15
----2.04
GATE
DRAIN
SOURCE
DRAIN
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5773−3850
http://onsemi.com
6
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NDF10N62Z/D
Similar pages