TI NE5534APE4 Low-noise operational amplifier Datasheet

 SLOS070C − JULY 1979 − REVISED SEPTEMBER 2004
D Equivalent Input Noise Voltage . . .
D
D
D
D
D
D
D
D
D
3.5 nV//Hz Typ
Unity-Gain Bandwidth . . . 10 MHz Typ
Common-Mode Rejection Ratio . . .
100 dB Typ
High DC Voltage Gain . . . 100 V/mV Typ
Peak-to-Peak Output Voltage Swing
32 V Typ With VCC+ = +18 V and RL = 600 W
High Slew Rate . . . 13 V/ms Typ
Wide Supply-Voltage Range +3 V to +20 V
Low Harmonic Distortion
Offset Nulling Capability
External Compensation Capability
NE5534, SA5534 . . . D (SOIC), P (PDIP),
OR PS (SOP) PACKAGE
NE5534A, SA5534A . . . D (SOIC) OR P (PDIP) PACKAGE
(TOP VIEW)
BALANCE
IN−
IN+
VCC−
1
8
2
7
3
6
4
5
COMP/BAL
VCC+
OUT
COMP
description/ordering information
The NE5534, NE5534A, SA5534, and SA5534A are high-performance operational amplifiers combining
excellent dc and ac characteristics. Some of the features include very low noise, high output-drive capability,
high unity-gain and maximum-output-swing bandwidths, low distortion, and high slew rate.
These operational amplifiers are compensated internally for a gain equal to or greater than three. Optimization
of the frequency response for various applications can be obtained by use of an external compensation
capacitor between COMP and COMP/BAL. The devices feature input-protection diodes, output short-circuit
protection, and offset-voltage nulling capability with use of the BALANCE and COMP/BAL pins (see the
application circuit diagram).
For the NE5534A and SA5534A, a maximum limit is specified for the equivalent input noise voltage.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  2004, Texas Instruments Incorporated
!"# $"%&! '#
'"! ! $#!! $# (# # #) "#
'' *+ '"! $!#, '# #!#&+ !&"'#
#, && $##
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1
SLOS070C − JULY 1979 − REVISED SEPTEMBER 2004
description/ordering information (continued)
ORDERING INFORMATION
TA
VIOmax
AT 25°C
PDIP (P)
0°C
0
C to 70
70°C
C
4 mV
SOIC (D)
SOP (PS)
PDIP (P)
−40°C to 85°C
4 mV
ORDERABLE
PART NUMBER
PACKAGE†
SOIC (D)
SOP (PS)
TOP-SIDE
MARKING
Tube of 50
NE5534P
NE5534P
Tube of 50
NE5534AP
NE5534AP
Tube of 75
NE5534D
Reel of 2500
NE5534DR
Tube of 75
NE5534AD
Reel of 2500
NE5534ADR
Reel of 2000
NE5534PSR
N5534
Tube of 50
SA5534P
SA5534P
Tube of 50
SA5534AP
SA5534AP
Tube of 75
SA5534D
Reel of 2500
SA5534DR
Tube of 75
SA5534AD
Reel of 2500
SA5534ADR
Tube of 80
SA553APS
Reel of 2000
SA553APSR
NE5534
5534A
SA5534
SA5534A
SA5534
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available
at www.ti.com/sc/package.
schematic
BALANCE
COMP/BAL
8
1
100 pF
IN+
12 kΩ
COMP
5
7
12 kΩ
3
40 pF
15 Ω
6
IN−
2
12 pF
7 pF
All component values shown are nominal.
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OUT
15 Ω
4
2
VCC+
VCC−
SLOS070C − JULY 1979 − REVISED SEPTEMBER 2004
symbol
application circuit
VCC+
22 kΩ
COMP
100 kΩ
COMP/BAL
IN−
CC
1
−
OUT
IN+
2
+
8
−
5
7
5534
6
BALANCE
3
+
4
VCC−
Frequency Compensation and Offset-Voltage Nulling Circuit
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage: VCC+ (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 V
VCC− (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −22 V
Input voltage either input (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VCC+
Input current (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±10 mA
Duration of output short circuit (see Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Unlimited
Package thermal impedance, θJA (see Notes 5 and 6): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97°C/W
P package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85°C/W
PS package . . . . . . . . . . . . . . . . . . . . . . . . . . . 95°C/W
Operating virtual junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between VCC+ and VCC−.
2. The magnitude of the input voltage must never exceed the magnitude of the supply voltage.
3. Excessive current will flow if a differential input voltage in excess of approximately 0.6 V is applied between the inputs, unless some
limiting resistance is used.
4. The output may be shorted to ground or to either power supply. Temperature and/or supply voltages must be limited to ensure the
maximum dissipation rating is not exceeded.
5. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable
ambient temperature is PD = (TJ(max) − TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
6. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions
MIN
MAX
UNIT
VCC+
VCC−
Supply voltage
5
15
V
Supply voltage
−5
−15
V
NE5534, NE5534A
0
70
TA
Operating free-air temperature range
SA5534, SA5534A
−40
85
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°C
3
SLOS070C − JULY 1979 − REVISED SEPTEMBER 2004
electrical characteristics, VCC± = ±15 V, TA = 25°C (unless otherwise noted)
TEST CONDITIONS†
PARAMETER
MIN
TYP
MAX
4
Input offset voltage
VO = 0,
RS = 50 Ω
TA = 25°C
TA = Full range
0.5
VIO
Input offset current
VO = 0
TA = 25°C
TA = Full range
20
IIO
Input bias current
VO = 0
TA = 25°C
TA = Full range
500
IIB
VICR
Common-mode input voltage range
±12
±13
24
26
30
32
25
100
VO(PP)
Maximum peak-to-peak output voltage swing
RL ≥ 600 Ω
VCC± = ±15 V
VCC± = ±18 V
AVD
Large-signal differential voltage amplification
VO = ±10 V,
RL ≥ 600 Ω
TA = 25°C
TA = Full range
Avd
Small-signal differential voltage amplification
f = 10 kHz
VO = ±10 V
BOM
B1
ri
Maximum-output-swing bandwidth
Unity-gain bandwidth
5
mV
300
400
nA
1500
2000
nA
V
V
V/mV
15
CC = 0
UNIT
6
CC = 22 pF
2.2
CC = 0
200
V/mV
CC = 22 pF
95
VCC± = ±18 V,
RL ≥ 600 Ω,
VO = ±14 V,
CC = 22 pF
70
CC = 22 pF,
CL = 100 pF
10
MHz
100
kΩ
RL ≥ 600 Ω,
f = 10 kHz
0.3
Ω
Input resistance
30
kHz
zo
Output impedance
AVD = 30 dB,
CC = 22 pF,
CMRR
Common-mode rejection ratio
VO = 0,
RS = 50 Ω
VIC = VICRmin,
70
100
dB
kSVR
Supply-voltage rejection ratio (∆VCC/∆VIO)
VCC+ = ±9 V to ±15 V,
VO = 0
RS = 50 Ω,
80
100
dB
IOS
Output short-circuit current
38
mA
ICC
Supply current
VO = 0, No load
TA = 25°C
4
8
mA
† All characteristics are measured under open-loop conditions with zero common-mode input voltage, unless otherwise specified.
For NE5534 and NE5534A, full range is 0°C to 70°C. For SA5534 and SA5534A, full range is −40°C to 85°C.
4
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SLOS070C − JULY 1979 − REVISED SEPTEMBER 2004
operating characteristics, VCC ± = ±15 V, TA = 25°C
PARAMETER
TEST CONDITIONS
NE5534,
SA5534
TYP
SR
Slew rate
Rise time
Overshoot factor
tr
Rise time
Overshoot factor
Vn
Equivalent input noise voltage
In
Equivalent input noise current
F
Average noise figure
CC = 0
CC = 22 pF
NE5534A, SA5534A
MIN
TYP
13
13
6
6
UNIT
MAX
V/ s
V/µs
VI = 50 mV,
RL = 600 Ω,
CL = 100 pF
AVD = 1,
CC = 22 pF
20
20
ns
20
20
%
VI = 50 mV,
RL = 600 Ω,
CL = 500 pF
f = 30 Hz
AVD = 1,
CC = 47 pF
50
50
ns
35
35
%
7
5.5
7
f = 1 kHz
4
3.5
4.5
f = 30 Hz
2.5
1.5
f = 1 kHz
0.6
0.4
RS = 5 kΩ,
f = 10 Hz to 20 kHz
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0.9
nV/√Hz
pA/√Hz
dB
5
SLOS070C − JULY 1979 − REVISED SEPTEMBER 2004
NORMALIZED INPUT BIAS CURRENT
AND INPUT OFFSET CURRENT
vs
FREE-AIR TEMPERATURE
VO(PP)
VOPP − Maximum Peak-to-Peak Output Voltage − V
Normalized Input Bias Current and Input Offset Current
TYPICAL CHARACTERISTICS†
1.6
VCC± = ±15 V
1.4
Offset
1.2
Bias
1
0.8
0.6
0.4
−75 −50
75 100
−25
0
25
50
TA − Free-Air Temperature − °C
125
ÁÁ
ÁÁ
ÁÁ
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
vs
FREQUENCY
30
CC = 0
25
20
15
10
CC = 22 pF
5
VCC± = ±15 V
TA = 25°C
0
100
1k
NORMALIZED SLEW RATE AND
UNITY-GAIN BANDWIDTH
vs
SUPPLY VOLTAGE
103
CC = 0 pF
102
CC = 22 pF
1k
10 k 100 k 1 M
f − Frequency − Hz
10 M 100 M
Normalized Slew Rate and Unity-Gain Bandwidth
AVD − Differential Voltage Amplification − V/mV
104
100
TA = 25°C
1.1
Unity-Gain
Bandwidth
1
0.9
0.8
0.7
Slew Rate
0.6
0.5
0.4
0
Figure 3
15
5
10
| VCC± | − Supply Voltage − V
Figure 4
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
6
1M
1.2
VCC± = ±15 V
TA = 25°C
105
1
10
100 k
Figure 2
LARGE-SIGNAL
DIFFERENTIAL VOLTAGE AMPLIFICATION
vs
FREQUENCY
10
10 k
f − Frequency − Hz
Figure 1
106
CC = 47 pF
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20
SLOS070C − JULY 1979 − REVISED SEPTEMBER 2004
TYPICAL CHARACTERISTICS†
NORMALIZED SLEW RATE AND
UNITY-GAIN BANDWIDTH
vs
FREE-AIR TEMPERATURE
TOTAL HARMONIC DISTORTION
vs
FREQUENCY
0.01
VCC± = ±15 V
1.1
THD − Total Harmonic Distortion − %
Normalized Slew Rate and Unity-Gain Bandwidth
1.2
Slew Rate
Unity-Gain
Bandwidth
1
0.9
0.8
−75
−50
75 100
−25
0
25
50
TA − Free-Air Temperature − °C
0.007
VCC± = ±15 V
AVD = 1
VI(rms) = 2 V
TA = 25°C
0.004
0.002
0.001
100
125
400
I n − Equivalent Input Noise Current − pA/ Hz
Vn − Equivalent Input Noise Voltage − nV/ Hz
10
VCC± = ±15 V
TA = 25°C
SA5534, NE5534
SA5534A, NE5534A
2
100
40 k 100 k
EQUIVALENT INPUT NOISE CURRENT
vs
FREQUENCY
4
1
10
10 k
Figure 6
EQUIVALENT INPUT NOISE VOLTAGE
vs
FREQUENCY
7
4k
f − Frequency − Hz
Figure 5
10
1k
1k
10 k
100 k
VCC± = ±15 V
TA = 25°C
7
4
2
1
SA5534, NE5534
0.7
0.4
SA5534A, NE5534A
0.2
0.1
10
f − Frequency − Hz
100
1k
10 k
100 k
f − Frequency − Hz
Figure 8
Figure 7
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
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7
SLOS070C − JULY 1979 − REVISED SEPTEMBER 2004
TYPICAL CHARACTERISTICS
TOTAL EQUIVALENT INPUT NOISE VOLTAGE
vs
SOURCE RESISTANCE
Total Equivalent Input Noise Voltage − µV
100
70
40
VCC± = ±15 V
TA = 25°C
20
10
7
4
f = 10 Hz to 20 kHz
2
1
0.7
0.4
f = 200 Hz to 4 kHz
0.2
0.1
100
1k
10 k
100 k
RS − Source Resistance − Ω
Figure 9
8
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1M
PACKAGE OPTION ADDENDUM
www.ti.com
4-Jun-2007
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
NE5534AD
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
NE5534ADE4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
NE5534ADG4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
NE5534ADR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
NE5534ADRE4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
NE5534ADRG4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
NE5534AJG
OBSOLETE
CDIP
JG
8
TBD
Call TI
NE5534AP
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
NE5534APE4
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
NE5534D
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
NE5534DE4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
NE5534DG4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
NE5534DR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
NE5534DRE4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
NE5534DRG4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
NE5534IP
OBSOLETE
PDIP
P
8
TBD
Call TI
NE5534P
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
NE5534PE4
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
NE5534PSR
ACTIVE
SO
PS
8
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
NE5534PSRE4
ACTIVE
SO
PS
8
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
NE5534PSRG4
ACTIVE
SO
PS
8
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SA5534AD
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
SA5534ADE4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
SA5534ADG4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
SA5534ADR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
SA5534ADRE4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
CU NIPDAU
Level-2-260C-1 YEAR
Addendum-Page 1
Lead/Ball Finish
MSL Peak Temp (3)
Call TI
Call TI
PACKAGE OPTION ADDENDUM
www.ti.com
4-Jun-2007
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
SA5534ADRG4
ACTIVE
SOIC
D
8
SA5534AP
ACTIVE
PDIP
P
8
50
SA5534APE4
ACTIVE
PDIP
P
8
SA5534D
ACTIVE
SOIC
D
SA5534DE4
ACTIVE
SOIC
SA5534DG4
ACTIVE
SA5534DR
Lead/Ball Finish
MSL Peak Temp (3)
no Sb/Br)
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
SA5534DRE4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
SA5534DRG4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
SA5534P
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
SA5534PE4
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
SA5534PS
ACTIVE
SO
PS
8
80
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SA5534PSE4
ACTIVE
SO
PS
8
80
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SA5534PSG4
ACTIVE
SO
PS
8
80
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SA5534PSR
ACTIVE
SO
PS
8
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SA5534PSRE4
ACTIVE
SO
PS
8
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SA5534PSRG4
ACTIVE
SO
PS
8
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
4-Jun-2007
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Oct-2007
TAPE AND REEL BOX INFORMATION
Device
Package Pins
Site
Reel
Diameter
(mm)
Reel
Width
(mm)
A0 (mm)
B0 (mm)
K0 (mm)
P1
(mm)
W
Pin1
(mm) Quadrant
NE5534ADR
D
8
SITE 27
330
12
6.4
5.2
2.1
8
12
Q1
NE5534DR
D
8
SITE 27
330
12
6.4
5.2
2.1
8
12
Q1
NE5534PSR
PS
8
SITE 41
330
16
8.2
6.6
2.5
12
16
Q1
SA5534ADR
D
8
SITE 27
330
12
6.4
5.2
2.1
8
12
Q1
SA5534DR
D
8
SITE 27
330
12
6.4
5.2
2.1
8
12
Q1
SA5534PSR
PS
8
SITE 41
330
16
8.2
6.6
2.5
12
16
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Oct-2007
Device
Package
Pins
Site
Length (mm)
Width (mm)
Height (mm)
NE5534ADR
D
8
SITE 27
342.9
336.6
20.64
NE5534DR
D
8
SITE 27
342.9
336.6
20.64
NE5534PSR
PS
8
SITE 41
346.0
346.0
33.0
SA5534ADR
D
8
SITE 27
342.9
336.6
20.64
SA5534DR
D
8
SITE 27
342.9
336.6
20.64
SA5534PSR
PS
8
SITE 41
346.0
346.0
33.0
Pack Materials-Page 2
MECHANICAL DATA
MCER001A – JANUARY 1995 – REVISED JANUARY 1997
JG (R-GDIP-T8)
CERAMIC DUAL-IN-LINE
0.400 (10,16)
0.355 (9,00)
8
5
0.280 (7,11)
0.245 (6,22)
1
0.063 (1,60)
0.015 (0,38)
4
0.065 (1,65)
0.045 (1,14)
0.310 (7,87)
0.290 (7,37)
0.020 (0,51) MIN
0.200 (5,08) MAX
Seating Plane
0.130 (3,30) MIN
0.023 (0,58)
0.015 (0,38)
0°–15°
0.100 (2,54)
0.014 (0,36)
0.008 (0,20)
4040107/C 08/96
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a ceramic lid using glass frit.
Index point is provided on cap for terminal identification.
Falls within MIL STD 1835 GDIP1-T8
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MPDI001A – JANUARY 1995 – REVISED JUNE 1999
P (R-PDIP-T8)
PLASTIC DUAL-IN-LINE
0.400 (10,60)
0.355 (9,02)
8
5
0.260 (6,60)
0.240 (6,10)
1
4
0.070 (1,78) MAX
0.325 (8,26)
0.300 (7,62)
0.020 (0,51) MIN
0.015 (0,38)
Gage Plane
0.200 (5,08) MAX
Seating Plane
0.010 (0,25) NOM
0.125 (3,18) MIN
0.100 (2,54)
0.021 (0,53)
0.015 (0,38)
0.430 (10,92)
MAX
0.010 (0,25) M
4040082/D 05/98
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001
For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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