NJRC NJW1241

NJW1241
3-Chanels Differential Output Line Amplifier
„ GENERAL DESCRIPTION
The NJW1241 is a differential output 3-channel audio line
amplifier for High Voltage Pre-out of Car AV system. It can
swing 5Vrms(14.1V peak-to peak) singal at 8V opearating
voltage /single-end output because of including the charge
pump circuit.
Ground-referenced outputs eliminate output coupling
capacitor. The pop noise suppression circuit reduces a pop
noise at the power-on and power-off.
PACKAGE OUTLINE
NJW1241V
„ FEATURES
l Operating Voltage
l Operating Current
6.0V to +10V
IDD=12mA typ.
at V+=8V, RL=47kΩ, No Signal
5.0Vrms min. @single-end output
0.004% typ
l Maximum Output Voltage
l Low Distortion
l Output Coupling Capacitor-less
l External Synchronizing
Divide-by-2
l Pop Noise Suppression Circuit
l External Mute
l Gain Select
+6dB/+8dB
l RF Immunity OpAmp tolerant to FR noise. (ex. mobile phone)
l Bi-CMOS Technology
l Package Outline
SSOP32
„ BLOCK DIAGRAM
V+
IN1
OUT1A
Mute Tr
V-
OUT1B
Mute Tr
V+
IN2
OUT2A
Mute Tr
V-
OUT2B
Mute Tr
V+
IN3
OUT3A
Mute Tr
V-
OUT3B
Mute Tr
Gain
Select
Ver. 0.4E
Charge
Pump
Pop Noise
Suppression
V-
V + Detector
–1–
NJW1241
NJW1241
„ PIN CONFIGURATION
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
–2–
Symbol
IN1
REF1
IN2
REF2
IN3
REF3
MUTE
GAIN
V- IN
V- OUT
RegCNT
NC
NC
CLK
V+ Reg
NC
Function
Input 1
Reference 1
Input 2
Reference 2
Input 3
Reference 3
MUTE / Pop Noise Suppression
Gain Select
V- Power Input
V- Power Output
V- Power Control
No Connect
No Connect
External Clock Input
V+ Power Supply for Regulator
No Connect
No.
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Symbol
Function
NC
No Connect
FB
V- Power Supply External Setting
CP
Flying Capacitor Positive Terminal
NC
No Connect
NC
No Connect
GND
Ground
CN
Flying Capacitor Negative Terminal
MUTE_TC Pop Noise Suppression Capacitor
V+ A
V+ Power Supply for Analog
GND
Ground
Output 3B
OUT3B
Output 3A
OUT3A
Output 2B
OUT2B
Output 2A
OUT2A
OUT1B
Output 1B
OUT1A
Output 1A
NJW1241
„ ABSOLUTE MAXIMUM RATING (Ta=25°C)
PARAMETER
SYMBOL
RATING
UNIT
V
10.5
V
VCLK
-0.3∼+6
V
VRegCNT
-0.3∼+6
V
+
Supply Voltage
CLK Terminal Voltage
-
V Power Supply Control Voltage
FB Terminal Voltager
-
VFB
Maximum Input Voltage
(V OUT)+6
VIN
Power Dissipation
V
+
V +0.3
V
(Note1)
PD
905
mW
Operating Temperature Range
Topr
-40 ~ +85
°C
Storage Temperature Range
Tstg
-40 ~ +125
°C
(Note1) EIA/JEDEC STANDARD Test board (76.2x114.3x1.6mm, 2layer, FR-4) mounting
RECOMMENDED OPERATING CONDITIONS
(Ta=25°C unless otherwise specified)
PARAMETER
SYMBOL
Operating Voltage
(Note2)
External Clock Input Range
External Clock Duty Input Range
TEST CONDITION
MIN.
TYP.
MAX.
UNIT
V+
6
8
10
V
fCLK
150
-
1250
kHz
DUTY
45
-
80
%
(Note2) The regulator for V- power supply operates by the half of fCLK.
„ ELECTRICAL CHARACTERISTICS
+
(Ta=25°C, V =8V, f=1kHz, Vin=0dBV, RL=47kΩ, GAIN=Low, MUTE=High, RegCNT=High unless otherwise specified)
PARAMETER
SYMBOL
Operating Current
IDD
Voltage Gain1
GV1
Voltage Gain2
GV2
TEST CONDITION
No signal
GAIN=High
MIN.
TYP.
MAX.
UNIT
-
12
20
mA
5.5
6
6.5
dB
7.5
8
8.5
dB
Maximum Output Voltage
VOMAX
THD=1%,
5
-
-
Vrms
Mute Level
VMUTE
MUTE=Low
-
-100
-80
dB
S/N Ratio
VNO1
-
100
-
dB
Total Harmonic Distortion
THD
-
0.004
-
%
80
-
-
dB
-
300
-
kHz
MIN.
TYP.
MAX.
UNIT
Vin=500mVrms , A=Weighted
Differential Output
BW:400Hz-22kHz,
Differential Output
Channel Separation
CS
Rg=600Ω
Internal Oscillating Frequency
fOSC
fCLK=No signal
„ CONTROL CHARACTERISTICS
+
(Ta=25°C, V =8V, f=1kHz, Vin=0dBV, RL=47kΩ unless otherwise specified)
PARAMETER
SYMBOL
TEST CONDITION
+
V
Mute Terminal High
MuteH
MUTE OFF
2.3
-
V
Mute Terminal Low
MuteL
MUTE ON
0
-
0.7
V
+
Gain Terminal High
GainH
Gv=8dB
2.3
-
V
V
Gain Terminal Low
GainL
Gv=6dB
0
-
0.7
V
CLK Terminal High
CLKH
2.3
-
5.5
V
CLK Terminal Low
CLKL
0
-
0.7
V
–3–
NJW1241
„TERMINAL DESCRIPTION
Terminal
SYMBOL
FUNCTION
EQUIVALENT CIRCUIT
V +A
1
3
5
IN1
IN2
IN3
INPUT1
INPUT2
INPUT3
V+A
VOLTAGE
V +A
10kΩ
0V
50kΩ
V-IN
1pF
V-IN
V+A
V+A
V+A
6.3kΩ
2
4
6
REF1
REF2
REF3
Reference1
Reference2
Reference3
10kΩ
0V
50kΩ
V-IN
1pF
V-IN
V +A
7
8
MUTE
GAIN
MUTE/Pop Noise
Suppression
Gain Select
V +A
0V
20kΩ
100kΩ
1pF
V-IN
Reg(5V)
500kΩ
100Ω
11
RegCNT
V- Power Control
0V
500kΩ
Reg(5V)
14
CLK
External Clock Input
100Ω
0V
1MΩ
–4–
Reg(5V)
NJW1241
„TERMINAL DESCRIPTION
Terminal
SYMBOL
FUNCTION
EQUIVALENT CIRCUIT
VOLTAGE
Reg(5V)
100Ω
18
FB
1kΩ
V- Power Supply
External Setting
2pF
V-OUT
V+Reg
19
CP
Flying Capacitor
Positive Terminal
-
V -OUT
23
CN
Flying Capacitor
Negative Terminal
-
V-OUT
V+A
24
MUTE_TC
Pop Noise
Suppression
Capacitor
V-OUT
V +A
V+A
100kΩ
50kΩ
0V
1MΩ
V -IN
27
28
29
30
31
32
OUT6
OUT5
OUT4
OUT3
OUT2
OUT1
Output6
Output5
Output4
Output3
Output2
Output1
V-IN
V+A
V +A
V-IN
V +A
200Ω
0V
50Ω
V-IN
200Ω
FB
V -IN
V-IN
–5–
NJW1241
„TEST CIRCUIT (IDD)
IN1
C1=1uF
OUT1A
Mute
1
50kΩ
REF1
Mute
2
IN2
C2=1uF
Mute
50kΩ
REF2
Mute
4
Mute
5
50kΩ
Mute
6
29
RL=47kΩ
28
RL=47kΩ
27
RL=47kΩ
GND
7
100kΩ
26
Pop Noise
Suppression
Gain Select
6dB/8dB
8
100kΩ
Bias
9
V +A
V+
25
+
MUTE _TC
C8=1uF
V -IN
C10=100uF
C9=1uF
24
V -OUT
V+
CN
10
A
23
RegCNT
GND
11
22
Negative
Voltage
Regulator
R2=680kΩ
NC
12
NC
C7=1uF
21
NC
NC
13
20
CLK
CP
14
19
V +Reg
C6=1uF
RL=47kΩ
OUT3B
MUTE
V+
RL=47kΩ
30
OUT3A
REF3
C5=1uF
31
OUT2B
IN3
GAIN
RL=47kΩ
OUT2A
3
C3=1uF
32
OUT1B
FB
15
18
NC
NC
16
17
V-OUT [Pin 10]
„TEST CIRCUIT (Gv, VOMAX, THD, VMUTE)
IN1
C1=1uF
OUT1A
Mute
1
REF1
50kΩ
Mute
2
IN2
C2=1uF
Mute
50kΩ
Mute
4
Mute
50kΩ
7
100kΩ
Gain Select
6dB/8dB
100kΩ
V-IN
C5=1uF
V
V -OUT
11
NC
12
NC
13
CLK
14
V +Reg
C6=1uF
RL=47kΩ
28
RL=47kΩ
27
RL=47kΩ
V+A
V+
25
+
MUTE _TC
C8=1uF
C9=1uF
24
CN
10
R2=680kΩ
–6–
Bias
23
RegCNT
+
29
26
Pop Noise
Suppression
8
9
RL=47kΩ
GND
MUTE
GAIN
30
OUT3B
Mute
6
3V~V +
RL=47kΩ
OUT3A
5
REF3
31
OUT2B
IN3
C3=1uF
RL=47kΩ V
OUT2A
3
REF2
32
OUT1B
GND
Negative
Voltage
Regulator
22
NC
21
C7=1uF
NC
20
CP
19
FB
15
18
NC
NC
16
17
V -OUT [Pin 10]
C10=10uF
NJW1241
„TEST CIRCUIT (VNO)
IN1
C1=1uF
OUT1A
Mute
1
REF1
50kΩ
Mute
2
IN2
C2=1uF
Mute
50kΩ
Mute
4
Mute
50kΩ
Mute
7
100kΩ
Gain Select
6dB/8dB
100kΩ
RL=47kΩ
28
RL=47kΩ
27
RL=47kΩ
Bias
9
V +A
V+
25
+
MUTE _TC
C8=1uF
V -IN
C9=1uF
C10=10uF
24
V -OUT
CN
10
23
RegCNT
GND
11
22
Negative
Voltage
Regulator
R2=680kΩ
NC
12
NC
C7=1uF
21
NC
NC
13
20
CLK
CP
14
19
V +Reg
C6=1uF
29
26
Pop Noise
Suppression
8
V+
RL=47kΩ
GND
MUTE
C5=1uF
30
OUT3B
6
GAIN
RL=47kΩ V
OUT3A
5
REF3
31
OUT2B
IN3
C3=1uF
RL=47kΩ V
OUT2A
3
REF2
32
OUT1B
FB
15
18
NC
NC
16
17
V -OUT [Pin 10]
„TEST CIRCUIT (CS)
IN1
C1=1uF
OUT1A
Mute
1
REF1
50kΩ
Mute
2
IN2
C2=1uF
Mute
50kΩ
Mute
4
Mute
50kΩ
Mute
6
100kΩ
Gain Select
6dB/8dB
100kΩ
V-IN
V
Bias
V -OUT
11
R2=680kΩ
NC
12
NC
13
CLK
14
V +Reg
C6=1uF
RL=47kΩ
28
RL=47kΩ
27
RL=47kΩ
V+A
V+
25
+
MUTE _TC
C8=1uF
C9=1uF
C10=10uF
24
CN
10
23
RegCNT
+
29
26
Pop Noise
Suppression
8
C5=1uF
RL=47kΩ
GND
7
9
30
OUT3B
MUTE
GAIN
RL=47kΩ V
OUT3A
5
REF3
31
OUT2B
IN3
C3=1uF
RL=47kΩ V
OUT2A
3
REF2
32
OUT1B
GND
Negative
Voltage
Regulator
22
NC
21
C7=1uF
NC
20
CP
19
FB
15
18
NC
NC
16
17
V -OUT [Pin 10]
–7–
NJW1241
„APPLICATION CIRCUIT
IN1
C1=1uF
OUT1A
Mute
1
REF1
50kΩ
IN2
50kΩ
IN3
Mute
50kΩ
Mute
7
GAIN
100kΩ
Gain Select
6dB/8dB
100kΩ
-
V IN
9
R1=10Ω
C5=1uF
Bias
-
V OUT
10
11
R2=680kΩ
NC
12
V+
25
+
MUTE _TC
C8=1uF
C9=1uF
C10=100uF
24
23
GND
Negative
Voltage
Regulator
22
NC
21
NC
20
V+Reg
RL=47kΩ
V+A
13
14
RL=47kΩ
27
NC
CLK
C6=1uF
28
CN
RegCNT
V+
RL=47kΩ
26
Pop Noise
Suppression
8
C4=1uF
29
GND
MUTE
R3=1kΩ
RL=47kΩ
OUT3B
6
3V~V+
30
OUT3A
5
REF3
RL=47kΩ
OUT2B
Mute
4
C3=1uF
31
OUT2A
Mute
3
REF2
RL=47kΩ
OUT1B
Mute
2
C2=1uF
32
C7=1uF
CP
19
FB
15
18
NC
NC
16
17
V-OUT [Pin 10]
[CAUTION]
The specifications on this databook are only
given for information , without any guarantee
as regards either mistakes or omissions. The
application circuits in this databook are
described only to show representative usages
of the product and not intended for the
guarantee or permission of any right including
the industrial rights.
–8–