ON NUS2045MNT1G Overvoltage protection ic with integrated mosfet Datasheet

NUS2045MN, NUS3045MN
Overvoltage Protection IC
with Integrated MOSFET
These devices represent a new level of safety and integration by
combining the NCP345 overvoltage protection circuit (OVP) with a
20 V P−channel power MOSFET (NUS2045MN) or with a 30 V
P−channel power MOSFET (NUS3045MN). They are specifically
designed to protect sensitive electronic circuitry from overvoltage
transients and power supply faults. During such hazardous events, the
IC quickly disconnects the input supply from the load, thus protecting
the load before any damage can occur.
The OVP ICs are optimized for applications using an external
AC−DC adapter or a car accessory charger to power a portable product
or recharge its internal batteries. They have a nominal overvoltage
threshold of 6.85 V which makes them ideal for single cell Li−Ion as
well as 3/4 cell NiCD/NiMH applications.
Features
•
•
•
•
•
•
•
•
•
OvervoltageTurn−Off Time of Less Than 1.0 ms
Accurate Voltage Threshold of 6.85 V, Nominal
Undervoltage Lockout Protection; 2.8 V, Nominal
Control Input Compatible with 1.8 V Logic Levels
−20 V or −30 V Integrated P−Channel Power MOSFET
Low RDS(on) = 71 mW @ −4.5 V for NUS2045MN
Low RDS(on) = 66 mW @ −4.5 V for NUS3045MN
Low Profile 3.3 x 3.3 mm DFN Package Suitable for Portable
Applications
Maximum Solder Reflow temperature @ 235°C for MNT1 suffix and
260°C for MNT1G suffix
Pb−Free Packages are Available
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MARKING DIAGRAM
8
1
1
DFN8
CASE 506AL
x045
AYWWG
G
x045
= Device Code
x
= 2 or 3
A
= Assembly Location
Y
= Year
WW
= Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
PIN ASSIGNMENT
VCC
8
OUT
7
GATE
6
SRC
5
GND
10
DRAIN
9
1
IN
2
GND
3
CNTRL
4
DRAIN
(Bottom View)
Benefits
ORDERING INFORMATION
• Provide Battery Protection
• Integrated Solution Offers Cost and Space Savings
• Integrated Solution Improves System Reliability
NUS2045MNT1
Applications
NUS2045MNT1G
• Portable Computers and PDAs
• Cell Phones and Handheld Products
• Digital Cameras
NUS3045MNT1
Device
NUS3045MNT1G
Package
Shipping†
DFN8
3000 Tape & Reel
DFN8
(Pb−Free)
3000 Tape & Reel
DFN8
3000 Tape & Reel
DFN8
(Pb−Free)
3000 Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2006
June, 2006 − Rev. 4
Publication Order Number:
NUS2045MN/D
NUS2045MN, NUS3045MN
Schottky
Diode
AC/DC Adapter of
Accessory Charger
VCC
P−CH
IN
Undervoltage
Lock Out
+
Logic
−
GATE
+
C1
FET
Driver
LOAD
OUT
Vref
NUSx045
CNTRL
GND
Microprocessor Port
Figure 1. Simplified Schematic
PIN FUNCTION DESCRIPTIONS
Pin #
Symbol
Pin Description
1
IN
This pin senses an external voltage point. If the voltage on this input rises above the overvoltage threshold
(VTH), the OUT pin will be driven to within 1.0 V of VCC, thus disconnecting the FET. The nominal threshold level
is 6.85 V and this threshold level can be increased with the addition of an external resistor between IN and VCC.
2, 10
GND
3
CNTRL
This logic signal is used to control the state of OUT and turn−on/off the P−channel MOSFET. A logic High
results in the OUT signal being driven to within 1.0 V of VCC which disconnects the FET. If this pin is not used,
the input should be connected to ground.
4, 9
DRAIN
Drain pin of the power MOSFET
Circuit Ground
5
SRC
Source pin of the power MOSFET
6
GATE
Gate pin of the power MOSFET
7
OUT
This signal drives the gate of a P−channel MOSFET. It is controlled by the voltage level on IN or the logic state
of the CNTRL input. When an overvoltage event is detected, the OUT pin is driven to within 1.0 V of VCC in less
than 1.0 _sec provided that gate and stray capacitance is less than 12 nF.
8
VCC
Positive Voltage supply. If VCC falls below 2.8 V (nom), the OUT pin will be driven to within 1.0 V of VCC, thus
disconnecting the P−channel FET.
OVERVOLTAGE PROTECTION CIRCUIT TRUTH TABLE
IN
CNTRL
OUT
<Vth
L
GND
<Vth
H
VCC
>Vth
L
VCC
>Vth
H
VCC
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NUS2045MN, NUS3045MN
MAXIMUM RATINGS (TA = 25°C unless otherwise stated)
Pin
Rating
Symbol
Min
Max
Unit
OUT Voltage to GND
7
VO
−0.3
30
V
Input and CNTRL Pin Voltage to GND
1
3
Vinput
VCNTRL
−0.3
−0.3
30
13
V
VCC Maximum Range
8
VCC(max)
−0.3
30
V
Maximum Power Dissipation (Note 1)
−
PD
−
1.0
W
−
RθJA
−
108.6
104.3
°C/W
Junction Temperature
−
TJ
−
150
°C
Operating Ambient Temperature
−
TA
−40
85
°C
VCNTRL Operating Voltage
3
−
0
5.0
V
−
Tstg
−65
150
°C
1,2,3,7,8,10
−
2.5
−
kV
Thermal Resistance Junction−to−Air (Note 1)
OVP IC
P−Channel FET
Storage Temperature Range
ESD Performance (HBM) (Note 2)
Drain−to−Source Voltage
VDSS
V
NUS2045MN
NUS3045MN
−20
−30
Gate−to−Source Voltage
VGS
NUS2045MN
NUS3045MN
V
−8
−20
Continuous Drain Current, Steady State, TA = 25°C (Note 1)
NUS2045MN
NUS3045MN
8
20
ID
A
−1.0
−1.0
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Surface−mounted on FR4 board using 1 inch sq pad size (Cu area = 1.127 in sq [1 oz] including traces).
2. Human body model (HBM): MIL STD 883C Method 3015−7, (R = 1500 W, C = 100 pF, F = 3 pulses delay 1 s).
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3
NUS2045MN, NUS3045MN
ELECTRICAL CHARACTERISTICS (TA= 25°C, Vcc = 6.0 V, unless otherwise specified)
Symbol
Pin
Min
VCC(opt)
8
3.0
4.8
25
V
−
1, 8
−
0.75
1.0
mA
Input Threshold (VInput connected to VCC; VInput increasing)
VTh
1
6.65
6.85
7.08
V
Input Hysteresis (VInput connected to VCC; VInput decreasing)
VHyst
1
50
100
200
mV
Input Impedance (Input = VTh)
Rin
1
70
150
−
kW
CNTRL Voltage High
Vih
3
1.5
−
−
V
CNTRL Voltage Low
Vil
3
−
−
0.5
V
CNTRL Current High (Vih = 5.0 V)
Iih
3
−
95
200
mA
CNTRL Current Low (Vil = 0.5 V)
Iil
3
−
10
20
mA
Undervoltage Lockout (VCC decreasing)
VLock
3
2.5
2.8
3.0
V
Output Sink Current (VCC < VTh, VOUT = 1.0 V)
ISink
7
10
33
50
mA
Output Voltage High (VCC = Vin = 8.0 V; ISource = 10 mA)
Output Voltage High (VCC = Vin = 8.0 V; ISource = 0.25 mA)
Output Voltage High (VCC = Vin = 8.0 V; ISource = 0 mA)
Voh
7
VCC−1.0
VCC−0.25
VCC−0.1
−
−
V
Output Voltage Low
(Input < 6.5 V; ISink = 0 mA; VCC = 6.0 V, CNTRL = 0 V)
Vol
7
−
−
0.1
V
Turn ON Delay − Input (Note 3)
(VInput connected to VCC; VInput step down signal from 8.0 to
6.0 V; measured to 50% point of OUT)*
TON IN
7
−
−
10
ms
Turn OFF Delay − Input (VInput connected to VCC; VInput step
up signal from 6.0 to 8.0 V; CL = 12 nF Output > VCC − 1.0 V)
TOFF IN
7
−
0.5
1.0
ms
Turn ON Delay − CNTRL (CNTRL step down signal from 2.0
to 0.5 V; measured to 50% point of OUT) (Note 3)
TON CT
7
−
−
10
ms
Turn OFF Delay − CNTRL (CNTRL step up signal from 0.5 to
2.0 V; CL = 12 nF Output > VCC −1.0 V)
TOFF CT
7
−
1.0
2.0
ms
Characteristic
VCC Operating Voltage Range
Supply Current (ICC + IInput; VCC = 6.0 V Steady State)
3. Guaranteed by design.
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4
Typ
Max
Unit
NUS2045MN, NUS3045MN
P−CHANNEL MOSFET
Parameter
Symbol
Drain to Source On Resistance
VGS = −4.5 V, ID = 600 mA
VGS = −4.5 V, ID = 1.0 A
VGS = −4.5 V, ID = 600 mA
VGS = −4.5 V, ID = 1.0 A
NUS2045MN
NUS2045MN
NUS3045MN
NUS3045MN
Zero Gate Voltage Drain Current
VGS = 0 V, VDS = −16 V
VGS = 0 V, VDS = −24 V
NUS2045MN
NUS3045MN
Turn On Delay (Note 4)
VGS = −4.5 V
VGS = −4.5 V
NUS2045MN
NUS3045MN
Turn Off Delay (Note 4)
VGS = −4.5 V
VGS = −4.5 V
NUS2045MN
NUS3045MN
Input Capacitance (Note 3)
VGS = 0 V, f = 1.0 MHz, VDS = −10 V
VGS = 0 V, f = 1.0 MHz, VDS = −15 V
NUS2045MN
NUS3045MN
Gate to Source Leakage Current
VGS = ±8.0 V, VDS = 0 V
VGS = ±20 V, VDS = 0 V
NUS2045MN
NUS3045MN
Drain to Source Breakdown Voltage
VGS = 0 V, ID = −250 mA
Gate Threshold Voltage
VGS = VDS, ID = −250 mA
Min
Typ
Max
71
71
66
66
95
95
110
110
RDS(on)
mW
mA
IDSS
−1.0
−1.0
ton
ns
7.5
11
toff
ns
30.2
28
Cin
pF
675
750
IGSS
nA
±10
±10
V(BR)DSS
V
20
30
NUS2045MN
NUS3045MN
V(GS)th
NUS2045MN
NUS3045MN
4. Switching characteristics are independent of operating junction temperature.
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5
Units
V
−1.2
−3.0
−0.4
−1.0
NUS2045MN, NUS3045MN
TYPICAL PERFORMANCE CURVES
(TA= 25°C, unless otherwise specified)
OVERVOLTAGE PROTECTION IC
7.05
1.0
7.00
0.9
I supply (mA)
Voltage (V)
6.95
6.90
6.85
0.8
0.7
6.80
0.6
6.75
6.70
−40
−25
−10
5
20
35
50
65
80
0.5
−40
95
−25
−10
5
20
35
50
65
80
95
Temperature (°C)
Ambient Temperature (°C)
Figure 2. Typical Vth Threshold Variation vs.
Temperature
Figure 3. Typical Supply Current vs. Temperature
Icc ) Iin, VCC + 6 V
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NUS2045MN, NUS3045MN
TYPICAL PERFORMANCE CURVES
(TA= 25°C, unless otherwise specified)
−ID, DRAIN CURRENT (AMPS)
12
−4.5 V −4.2 V
−10V
11
10
9
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
30 V, P−CHANNEL MOSFET
−4 V
−8 V
−6 V
8
7
−3.8 V
−5.5 V
−5 V
6
−3.6 V
5
4
3
−3.4 V
−3.2 V
2
1
0
−3 V
TJ = 25°C
0
0.4
0.8
1.2
1.6
2
2.4
2.8
3.2
3.6
4
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
TJ = 25°C
ID = −3.7 A
0.2
0.1
0
2
5
6
7
8
9
10
−VGS, GATE VOLTAGE (VOLTS)
Figure 4. On−Region Characteristics
Figure 5. On−Resistance vs. Gate−to−Source
Voltage
100000
10
−IS, SOURCE CURRENT (AMPS)
VGS = 0 V
−IDSS, LEAKAGE CURRENT (nA)
4
3
TJ = 150°C
10000
1000
TJ = 100°C
100
5
25
10
15
20
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
VGS = 0 V
TJ = 150°C
1
TJ = 100°C
TJ = 25°C
0.1
0.3
30
TJ = −55°C
0.4
0.5
0.6
0.7
0.8
0.9
1.0
−VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 7. Diode Forward Voltage vs. Current
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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7
1.1
NUS2045MN, NUS3045MN
TYPICAL PERFORMANCE CURVES
(TA= 25°C, unless otherwise specified)
10
TJ = 25°C
VGS = −10 V − −2.4 V
−ID, DRAIN CURRENT (AMPS)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
20 V, P−CHANNEL MOSFET
−2.2 V
8
−2.0 V
6
−1.8 V
4
.
−1.6 V
2
0
0
2
1
3
5
4
6
7
8
0.1
VGS = −5.0 V
0.09
0.08
T = 25°C
0.07
0.06
T = −55°C
0.05
0.04
0.03
0.02
0.01
0
1
3
7
5
−ID, DRAIN CURRENT (AMPS)
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 8. On−Region Characteristics
9
Figure 9. On−Resistance vs. Drain Current and
Temperature
100000
5
10000
−IS, SOURCE CURRENT (AMPS)
VGS = 0 V
−IDSS, LEAKAGE (nA)
T = 125°C
TJ = 150°C
1000
TJ = 125°C
100
10
1.0
VGS = 0 V
TJ = 25°C
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
0
2
4
6
8
10
12
14
16
0
0.2
0.4
0.6
0.8
1.0
−VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 10. Drain−to−Source Leakage Current
vs. Voltage
Figure 11. Diode Forward Voltage vs. Current
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NUS2045MN, NUS3045MN
TYPICAL APPLICATION CIRCUITS & OPERATION WAVEFORMS
(TA= 25°C, unless otherwise specified)
20 V, P−CHANNEL MOSFET
VCC
P−CH
IN
Undervoltage
Lock Out
+
Logic
−
GATE
12 W
FET
Driver
OUT
Vref
6 Vdc
8 Vdc
NUSx045
GND
CNTRL
Figure 12. Test Circuit for TON IN and TOFF IN
Input Voltage
TON IN
Output Voltage
TON IN Test
TA=25°C
Figure 13. TON IN Waveforms
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NUS2045MN, NUS3045MN
TOFF IN
Input Voltage
TOFF IN Test
TA=25°C
Output Voltage
Figure 14. TOFF IN Waveforms
VCC
P−CH
IN
Undervoltage
Lock Out
+
Logic
−
GATE
12 W
FET
Driver
OUT
Vref
6 Vdc
8 Vdc
NUSx045
GND
CNTRL
Figure 15. Test Circuit for TON CT and TOFF CT
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NUS2045MN, NUS3045MN
TON CT
CNTR signal
Input Voltage
TON CT Test
TA=25°C
Output Voltage
Figure 16. TON CT Waveforms
TOFF CT
CNTR signal
Input Voltage
TOFF CT Test
TA=25°C
Output Voltage
Figure 17. TOFF CT Waveforms
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NUS2045MN, NUS3045MN
PACKAGE DIMENSIONS
DFN8
CASE 506AL−01
ISSUE A
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.25 AND
0.30mm.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
A
D
B
PIN ONE
REFERENCE
2X
0.15 C
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
E
DIM
A
A1
A3
b
D
D2
E
E2
e
K
L
TOP VIEW
2X
0.15 C
A
(A3)
0.10 C
MILLIMETERS
MIN
NOM MAX
0.80
0.90
1.00
0.00
0.03
0.05
0.20 REF
0.35
0.40
0.45
3.30 BSC
0.95
1.05
1.15
3.30 BSC
1.80
1.90
2.00
0.80 BSC
0.21
−−−
−−−
0.30
0.40
0.50
SOLDERING FOOTPRINT*
8X
0.08 C
SEATING
PLANE
SIDE VIEW
A1
D2
8X
L
C
1
D2
1
e
4
ÇÇ
ÇÇ
ÇÇ
ÇÇ
ÇÇ
ÇÇ
3.60
2.95
2X
0.45
1.20
2X
E2
ÇÇ
ÇÇ
ÇÇ
ÇÇ
ÇÇ
ÇÇ
8X
0.55
1.95
0.80
PITCH
2X
DIMENSIONS: MILLIMETERS
8X
K
8
5
8X
b
0.10 C A B
BOTTOM VIEW
0.05 C
NOTE 3
0.60
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
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NUS2045MN/D