OPA333 OPA2333 SBOS351 − MARCH 2006 1.8V, microPOWER CMOS OPERATIONAL AMPLIFIERS Zerj-Drift Series FEATURES DESCRIPTION D D D D D D D D The OPA333 series of CMOS operational amplifiers uses a proprietary auto-calibration technique to simultaneously provide very low offset voltage (10µV max) and near-zero drift over time and temperature. These miniature, high-precision, low quiescent current amplifiers offer high-impedance inputs that have a common-mode range 100mV beyond the rails and rail-to-rail output that swings within 50mV of the rails. Single or dual supplies as low as +1.8V (±0.9V) and up to +5.5V (±2.75V) may be used. They are optimized for low-voltage, single-supply operation. LOW OFFSET VOLTAGE: 10µV (max) ZERO DRIFT: 0.05µV/°C (max) 0.01Hz to 10Hz NOISE: 1.1µVPP QUIESCENT CURRENT: 17µA SINGLE-SUPPLY OPERATION SUPPLY VOLTAGE: 1.8V to 5.5V RAIL-TO-RAIL INPUT/OUTPUT microSIZE PACKAGES: SC70 and SOT23 APPLICATIONS D D D D D D TRANSDUCER APPLICATIONS TEMPERATURE MEASUREMENTS ELECTRONIC SCALES MEDICAL INSTRUMENTATION BATTERY-POWERED INSTRUMENTS HANDHELD TEST EQUIPMENT The OPA333 family offers excellent CMRR without the crossover associated with traditional complementary input stages. This design results in superior performance for driving analog-to-digital converters (ADCs) without degradation of differential linearity. The OPA333 (single version) is available in the SC70-5, SOT23-5, and SO-8 packages. The OPA2333 (dual version) is offered in DFN-8 (3mm x 3mm, available Q2 ’06) and SO-8 packages. All versions are specified for operation from −40°C to +125°C. OPA333 0.1Hz TO 10Hz NOISE 1 V− 2 +IN 3 500nV/div OUT 5 V+ 4 −IN SOT23−5 OPA333 +IN 1 V− 2 −IN 3 5 V+ 4 OUT 1s/div SC70−5 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. Copyright 2006, Texas Instruments Incorporated ! ! www.ti.com """ #""" www.ti.com SBOS351 − MARCH 2006 This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ABSOLUTE MAXIMUM RATINGS(1) Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7V Signal Input Terminals, Voltage(2) . . . . . . . . . −0.3V to (V+) + 0.3V Signal Input Terminals, Voltage(2) . . . . . . . . . . . . . . . . . . . . ±10mA Output Short-Circuit(3) . . . . . . . . . . . . . . . . . . . . . . . . . Continuous Operating Temperature . . . . . . . . . . . . . . . . . . . . . −40°C to +150°C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . −65°C to +150°C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +150°C ESD Rating Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4000V Charged Device Model . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000V (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not supported. (2) Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.3V beyond the supply rails should be current limited to 10mA or less. (3) Short-circuit to ground, one amplifier per package. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION(1) PRODUCT PACKAGE-LEAD PACKAGE DESIGNATOR PACKAGE MARKING OPA333 SOT23-5 DBV OAXQ OPA333 SC70-5 DCK BQY OPA333 SO-8 D O333A O2333A OPA2333 SO-8 D OPA2333 DFN-8(2) DRB BQZ (1) For the most current specification and package information see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. (2) Available Q2 ’06. PIN CONFIGURATIONS OPA333 OUT 1 V− 2 +IN 3 OPA333 5 4 V+ −IN OPA2333 NC(1) 1 8 NC(1) −IN 2 7 V+ +IN 3 6 OUT +IN A 3 V− 4 5 NC(1) V− 4 OUT A 1 −IN A 2 B SOT23−5 OPA333 +IN 1 V− 2 −IN 3 4 SC70−5 (1) NC denotes no internal connection. (2) Connect thermal die pad to V−. (3) Available Q2 ’06. 2 OPA2333 SO−8 5 8 V+ 7 OUT B 6 −IN B 5 +IN B A V+ OUT OUT A 1 −IN A 2 +IN A 3 V− 4 Exposed Thermal Die Pad on Underside(2) DFN−8(3) SO−8 8 V+ 7 OUT B 6 −IN B 5 +IN B """ #""" www.ti.com SBOS351 − MARCH 2006 ELECTRICAL CHARACTERISTICS: VS = +1.8V to +5.5V Boldface limits apply over the specified temperature range, TA = −40°C to +125°C. At TA = +25°C, RL = 10kΩ connected to VS/2, VCM = VS/2, and VOUT = VS/2, unless otherwise noted. OPA333, OPA2333 PARAMETER OFFSET VOLTAGE Input Offset Voltage VOS vs Temperature dVOS/dT vs Power Supply PSRR Long-Term Stability(1) Channel Separation, dc INPUT BIAS CURRENT Input Bias Current IB over Temperature Input Offset Current IOS NOISE Input Voltage Noise, f = 0.01Hz to 1Hz Input Voltage Noise, f = 0.1Hz to 10Hz Input Current Noise, f = 10Hz in INPUT VOLTAGE RANGE Common-Mode Voltage Range VCM Common-Mode Rejection Ratio CMRR INPUT CAPACITANCE Differential Common-Mode OPEN-LOOP GAIN Open-Loop Voltage Gain AOL FREQUENCY RESPONSE Gain-Bandwidth Product GBW Slew Rate SR OUTPUT Voltage Output Swing from Rail over Temperature Short-Circuit Current ISC Capacitive Load Drive CL Open-Loop Output Impedance POWER SUPPLY Specified Voltage Range VS Quiescent Current Per Amplifier IQ over Temperature Turn-On Time TEMPERATURE RANGE Specified Range Operating Range Storage Range Thermal Resistance qJA SOT23-5 SO-8 DFN-8 SC70-5 TEST CONDITIONS MIN VS = +5V VS = +1.8V to +5.5V TYP MAX UNIT 2 0.02 1 See Note (1) 0.1 10 0.05 5 µV µV/°C µV/V ±70 ±150 ±140 ±200 µV/V ±400 µVPP µVPP fA/√Hz 0.3 1.1 100 130 V dB 2 4 pF pF 130 dB CL = 100pF G = +1 350 0.16 kHz V/µs RL = 10kΩ RL = 10kΩ 30 (V−) − 0.1V < VCM < (V+) + 0.1V (V−) + 100mV < VO < (V+) − 100mV, RL = 10kΩ (V−) − 0.1 106 pA pA pA 106 (V+) + 0.1 50 70 ±5 See Typical Characteristics 2 f = 350kHz, IO = 0 1.8 IO = 0 17 VS = +5V 100 −40 −40 −65 200 150 50 250 mV mV mA kΩ 5.5 25 28 V µA µA µs +125 +150 +150 °C °C °C °C/W °C/W °C/W °C/W °C/W (1) 300-hour life test at +150°C demonstrated randomly distributed variation of approximately 1µV. 3 """ #""" www.ti.com SBOS351 − MARCH 2006 TYPICAL CHARACTERISTICS At TA = +25°C, VS = +5V, and CL = 0pF, unless otherwise noted. OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION 0 0.0025 0.0050 0.0075 0.0100 0.0125 0.0150 0.0175 0.0200 0.0225 0.0250 0.0275 0.0300 0.0325 0.0350 0.0375 0.0400 0.0425 0.0450 0.0475 0.0500 −10 −9 −8 −7 −6 −5 −4 −3 −2 −1 0 1 2 3 4 5 6 7 8 9 10 Population Population OFFSET VOLTAGE PRODUCTION DISTRIBUTION Offset Voltage (µV) Offset Voltage Drift (µV/_ C) COMMON−MODE REJECTION RATIO vs FREQUENCY 140 100 200 120 80 150 100 60 100 40 50 20 0 40 −50 20 −100 0 0 −20 10 100 1k 10k 100k CMRR (dB) 250 Phase (_ ) AOL (dB) OPEN−LOOP GAIN vs FREQUENCY 120 80 60 1M 10 1 100 Frequency (Hz) 1k 10k 100k POWER−SUPPLY REJECTION RANGE vs FREQUENCY OUTPUT VOLTAGE SWING vs OUTPUT CURRENT 120 3 VS = ±2.75V VS = ±0.9V +PSRR 2 −PSRR Output Swing (V) PSRR (dB) 100 80 60 40 +25_C +125_C 0 +25_C −40_ C −1 +125_C +25_C −40_ C −3 0 10 100 1k Frequency (Hz) 4 −40_C 1 −2 20 1 1M Frequency (Hz) 10k 100k 1M 0 1 2 3 4 5 6 Output Current (mA) 7 8 9 10 """ #""" www.ti.com SBOS351 − MARCH 2006 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VS = +5V, and CL = 0pF, unless otherwise noted. INPUT BIAS CURRENT vs COMMON−MODE VOLTAGE INPUT BIAS CURRENT vs TEMPERATURE 100 200 80 60 VS = 5V −IB 50 IB (pA) 20 0 −20 0 +IB −50 −40 −100 −60 +IB −80 −200 0 1 +I B −150 −100 2 3 4 5 −50 −25 0 QUIESCENT CURRENT vs TEMPERATURE 50 75 100 125 LARGE−SIGNAL STEP RESPONSE 25 G=1 RL = 10kΩ Output Voltage (1V/div) 20 VS = 5.5V 15 VS = 1.8V 10 5 −50 −25 0 25 50 75 100 125 Time (50µs/div) Temperature (_C) POSITIVE OVER−VOLTAGE RECOVERY SMALL−SIGNAL STEP RESPONSE 2V/div G = +1 RL = 10kΩ Output Voltage (50mV/div) 0 Input Output 1 0k Ω +2 .5V 1V/div IQ (µA) 25 Temperature (_ C) Common−Mode Voltage (V) 0 VS = 5.5V VS = 1.8V −IB 100 40 IB (pA) 150 −IB 1 kΩ 0 OPA3 33 − 2.5V Time (5µs/div) Time (50µs/div) 5 """ #""" www.ti.com SBOS351 − MARCH 2006 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VS = +5V, and CL = 0pF, unless otherwise noted. SETTLING TIME vs CLOSED−LOOP GAIN NEGATIVE OVER−VOLTAGE RECOVERY 600 4V Step 500 Settling Time (µs) 1V/div 2V/div Input 0 0 10 kΩ + 2.5V 1kΩ 400 300 200 0.001% Output O PA 333 100 0.01% − 2.5 V 0 1 Time (50µs/div) 10 Gain (dB) 0.1Hz TO 10Hz NOISE SMALL−SIGNAL OVERSHOOT vs LOAD CAPACITANCE 40 35 25 500nV/div Overshoot (%) 30 20 15 10 5 0 10 100 1000 1s/div Load Capacitance (pF) CURRENT AND VOLTAGE NOISE SPECTRAL DENSITY vs FREQUENCY 1000 Continues with no 1/f (flicker) noise. Current Noise 100 100 Voltage Noise 10 10 1 10 100 Frequency (Hz) 6 1k 10k Current Noise (fA//Hz) Voltage Noise (nV//Hz) 1000 100 """ #""" www.ti.com SBOS351 − MARCH 2006 APPLICATIONS INFORMATION The OPA333 and OPA2333 are unity-gain stable and free from unexpected output phase reversal. They use a proprietary auto-calibration technique to provide low offset voltage and very low drift over time and temperature. For lowest offset voltage and precision performance, circuit layout and mechanical conditions should be optimized. Avoid temperature gradients that create thermoelectric (Seebeck) effects in the thermocouple junctions formed from connecting dissimilar conductors. These thermally-generated potentials can be made to cancel by assuring they are equal on both input terminals. Other layout and design considerations include: D Use low thermoelectric-coefficient conditions (avoid dissimilar metals). D Thermally isolate components from power supplies or other heat sources. D Shield op amp and input circuitry from air currents, such as cooling fans. Following these guidelines will reduce the likelihood of junctions being at different temperatures, which can cause thermoelectric voltages of 0.1µV/°C or higher, depending on materials used. INPUT VOLTAGE The OPA333 and OPA2333 input common-mode voltage range extends 0.1V beyond the supply rails. The OPA333 is designed to cover the full range without the troublesome transition region found in some other rail-to-rail amplifiers. Normally, input bias current is about 70pA; however, input voltages exceeding the power supplies can cause excessive current to flow into or out of the input pins. Momentary voltages greater than the power supply can be tolerated if the input current is limited to 10mA. This limitation is easily accomplished with an input resistor, as shown in Figure 1. Current−limiting resistor required if input voltage exceeds supply rails by ≥ 0.5V. +5V IOVERLOAD 10mA max OPA333 VOUT VIN 5kΩ OPERATING VOLTAGE The OPA333 and OPA2333 op amps operate over a power-supply range of +1.8V to +5.5V (±0.9V to ±2.75V). Supply voltages higher than +7V (absolute maximum) can permanently damage the device. Parameters that vary over supply voltage or temperature are shown in the Typical Characteristics section of this data sheet. Figure 1. Input Current Protection INTERNAL OFFSET CORRECTION The OPA333 and OPA2333 op amps use an auto-calibration technique with a time-continuous 350kHz op amp in the signal path. This amplifier is zero-corrected every 8µs using a proprietary technique. Upon power-up, the amplifier requires approximately 100µs to achieve specified VOS accuracy. This design has no aliasing or flicker noise. 7 """ #""" www.ti.com SBOS351 − MARCH 2006 ACHIEVING OUTPUT SWING TO THE OP AMP NEGATIVE RAIL The OPA333 and OPA2333 have an output stage that allows the output voltage to be pulled to its negative supply rail, or slightly below, using the technique previously described. This technique only works with some types of output stages. The OPA333 and OPA2333 have been characterized to perform with this technique; however, the recommended resistor value is approximately 20kΩ. Note that this configuration will increase the current consumption by several hundreds of microamps. Accuracy is excellent down to 0V and as low as −2mV. Limiting and nonlinearity occurs below−2mV, but excellent accuracy returns as the output is again driven above −2mV. Lowering the resistance of the pull-down resistor will allow the op amp to swing even further below the negative rail. Resistances as low as 10kΩ can be used to achieve excellent accuracy down to −10mV. Some applications require output voltage swings from 0V to a positive full-scale voltage (such as +2.5V) with excellent accuracy. With most single-supply op amps, problems arise when the output signal approaches 0V, near the lower output swing limit of a single-supply op amp. A good single-supply op amp may swing close to single-supply ground, but will not reach ground. The output of the OPA333 and OPA2333 can be made to swing to ground, or slightly below, on a single-supply power source. To do so requires the use of another resistor and an additional, more negative, power supply than the op amp negative supply. A pull-down resistor may be connected between the output and the additional negative supply to pull the output down below the value that the output would otherwise achieve, as shown in Figure 2. GENERAL LAYOUT GUIDELINES Attention to good layout practices is always recommended. Keep traces short and, when possible, use a printed circuit board (PCB) ground plane with surface-mount components placed as close to the device pins as possible. Place a 0.1µF capacitor closely across the supply pins. These guidelines should be applied throughout the analog circuit to improve performance and provide benefits such as reducing the EMI (electromagnetic-interference) susceptibility. V+ = +5V VOUT OPA333 VIN RP = 20kΩ Op Amp V− = Gnd Operational amplifiers vary in their susceptibility to radio frequency interference (RFI). RFI can generally be identified as a variation in offset voltage or dc signal levels with changes in the interfering RF signal. The OPA333 has been specifically designed to minimize susceptibility to RFI and demonstrates remarkably low sensitivity compared to previous generation devices. Strong RF fields may still cause varying offset levels.. −5V Additional Negative Supply Figure 2. For VOUT Range to Ground 4.096V REF3140 +5V 0.1µF + R9 150kΩ R1 6.04kΩ R5 31.6kΩ D1 +5V 0.1µF + − R2 2.94kΩ − + + K−Type Thermocouple 40.7µV/_ C R2 549Ω O PA333 R6 200Ω R4 6.04kΩ R3 60.4Ω Zero Adj. Figure 3. Temperature Measurement 8 VO """ #""" www.ti.com SBOS351 − MARCH 2006 Figure 4 shows the basic configuration for a bridge amplifier. VS A low-side current shunt monitor is shown in Figure 5. RN are operational resistors used to isolate the ADS1100 from the noise of the digital I2C bus. Since the ADS1100 is a 16-bit converter, a precise reference is essential for maximum accuracy. If absolute accuracy is not required, and the 5V power supply is sufficiently stable, the REF3130 may be omitted. R1 +5V R R R R OPA333 VOUT R1 VREF Figure 4. Single Op Amp Bridge Amplifier 3V +5V REF3130 Load R1 4.99kΩ R2 4.99kΩ R6 71.5kΩ V ILOAD RSHUNT 1Ω R3 4.99kΩ RN 56Ω OPA333 R4 48.7kΩ Stray ground−loop reistance. ADS1100 R7 1.18kΩ RN 56Ω I2C (PGA Gain = 4) FS = 3.0V 1% resistors provide adequate common−mode rejection at small ground−loop errors. Figure 5. Low-Side Current Monitor 9 """ #""" www.ti.com SBOS351 − MARCH 2006 RG zener(1) RSHUNT R1(2) 10kΩ V+ MOSFET rated to stand−off supply voltage such as BSS84 for up to 50V. OPA333 V+ +5V Two zener biasing methods are shown.(3) Output Load RBIAS RL Notes: (1) zener rated for op amp supply capability (that is, 5.1V for OPA333). (2) Current−limiting resistor. (3) Choose zener biasing resistor or dual NMOSFETS (FDG6301N, NTJD4001N, or Si1034) Figure 6. High-Side Current Monitor V1 −In 1MΩ 3V 1MΩ 60kΩ NTC Thermistor INA152 OPA333 R2 100kΩ R1 OPA333 2 5 6 3 V2 +In Figure 7. Thermistor Measurement 10 VO R2 1 OPA333 VO = (1 + 2R2/R1) (V2 − V1) Figure 8. Precision Instrumentation Amplifier """ #""" www.ti.com SBOS351 − MARCH 2006 DFN PACKAGE The OPA2333 is offered in an DFN-8 package (also known as SON). The DFN is a QFN package with lead contacts on only two sides of the bottom of the package. This leadless package maximizes board space and enhances thermal and electrical characteristics through an exposed pad. DFN packages are physically small, have a smaller routing area, improved thermal performance, and improved electrical parasitics. Additionally, the absence of external leads eliminates bent-lead issues. The DFN package can be easily mounted using standard printed circuit board (PCB) assembly techniques. See Application Note QFN/SON PCB Attachment (SLUA271) and Application Report Quad Flatpack No-Lead Logic Packages (SCBA017), both available for download at www.ti.com. DFN LAYOUT GUIDELINES The exposed leadframe die pad on the DFN package should be soldered to a thermal pad on the PCB. A mechanical drawing showing an example layout is attached at the end of this data sheet. Refinements to this layout may be necessary based on assembly process requirements. Mechanical drawings located at the end of this data sheet list the physical dimensions for the package and pad. The five holes in the landing pattern are optional, and are intended for use with thermal vias that connect the leadframe die pad to the heatsink area on the PCB. Soldering the exposed pad significantly improves board-level reliability during temperature cycling, key push, package shear, and similar board-level tests. Even with applications that have low-power dissipation, the exposed pad must be soldered to the PCB to provide structural integrity and long-term reliability. The exposed leadframe die pad on the bottom of the package should be connected to V− or left unconnected. 11 PACKAGE OPTION ADDENDUM www.ti.com 14-Mar-2006 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty OPA2333AID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM OPA2333AIDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM OPA2333AIDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM OPA2333AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM OPA333AID ACTIVE SOIC D 8 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM OPA333AIDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM OPA333AIDBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM OPA333AIDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM OPA333AIDBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM OPA333AIDCKR ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM OPA333AIDCKRG4 ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM OPA333AIDCKT ACTIVE SC70 DCK 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM OPA333AIDCKTG4 ACTIVE SC70 DCK 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM OPA333AIDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM OPA333AIDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM OPA333AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 75 Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 14-Mar-2006 (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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