Version1.0 PD024OX8 FOR MORE INFORMATION: AZ DISPLAYS, INC. 75 COLUMBIA, ALISO VIEJO, CA, 92656 Http://www.AZDISPLAYS.com The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page 1 PD024OX8 TECHNICAL SPECIFICATION CONTENTS NO. ITEM PAGE - Cover 1 - Contents 2 1 Application 3 2 Features 3 3 Mechanical Specifications 3 4 Mechanical Drawing of TFT-LCD Module 4 5 6 7 Input / Output Terminals Absolute Maximum Ratings Electrical Characteristics 5 7 7 8 Pixel Arrangement 8 9 Display Color and Gary Scale Reference 9 10 Power On/Off Sequence 10 11 Register Description 12 12 AC Characteristics 21 13 Waveform 24 14 Optical Characteristics 32 15 Handling Cautions 35 16 Reliability Test 36 17 Packing Diagram 37 - Revision History 39 The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page 2 PD024OX8 1. Application This technical specification applies to a 2.36” color TFT-LCD panel. This is designed for printer application and other electronic products which require high quality flat panel display. 2. Features . Pixel in delta configuration . Enables an approximately 16,190,000 color display by approximate 8-bit function. . Provide a 3-wire clock synchronous serial interface for various operation mode settings. . Built-in TCON, and support serial RGB mode, YUV mode, CIR656 mode. . Image reversion : Up/Down and Left/Right. . Built-in control circuit for LED driving. . Built-in power-save functions such as the stand-by mode. . Built-in Vcom amplitude voltage output circuit. 3. Mechanical Specifications Parameter Screen Size Display Format Display colors Active Area Pixel Pitch Pixel Configuration Outline Dimension Weight Back-light Specifications 2.36 (diagonal) 160( RGB )234 262,144 48.0(H)35.685(V) 0.3(H)0.1525 (V) Delta 55.20(W)47.55 (V)2.91(D)(typ.) 121.5 Three LED Surface Treatment Display model Anti – Glare Normally white Unit inch dot mm mm mm g The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page 3 PD024OX8 PI TAPE NO BENDING AREA 4. Mechanical Drawing of TFT-LCD Module The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page 4 PD024OX8 5. Input / Output Terminals FPC Down Connect , 40Pins , Pitch : 0.5 mm Pin No 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 Symbol VCOM N/C VGL C4P C4N VGH FRP VCAC VSD C3P C3N VDDA C2P C2N VINT C1P C1N PGND PVDD DRV VLED NC FB VCC GND VCC CS SDA SCL HSYNC VSYNC DCLK D7 D6 D5 D4 D3 D2 D1 D0 I/O I I C C I O C I C C I C C I C C I I O I I I I I I I I I I I I I I I I I I I PGND=GND=0V Remark Note 5-1 Description Common electrode voltage Negative power supply for gate driver Pins to connect capacitance for power circuitry Pins to connect capacitance for power circuitry Positive power supply for gate driver Frame polarity output for VCOM Define the amplitude of the VCOM swing Voltage for Source Driver and Reference Voltage Pins to connect capacitance for power circuitry Pins to connect capacitance for power circuitry Voltage for Source Driver and Reference Voltage Pins to connect capacitance for power circuitry Pins to connect capacitance for power circuitry Voltage for Source Driver and Reference Voltage Pins to connect capacitance for power circuitry Pins to connect capacitance for power circuitry Charge Pump Power GND Charge Pump Power VDD Gate signal for the power transistor of the boost converter Supply voltage for LED backlight Main boost regulator feedback input Digital power supply Digital GND Digital power supply Serial interface chip select signal Serial interface data input signal Serial interface transmission clock Horizontal sync input Vertical sync input Clock input Data input Data input Data input Data input Data input Data input Data input Data input Note 5-2 Note 5-3 Note 5-4 Note 5-5 Note 5-3 Note 5-3 The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page 5 Note 5-1: VCOM = +5.0 Vp-p. (Typ.) Note 5-2: The external capacitor is required on those pins as following. PD024OX8 Cap No. Pin name Capacitor value.(µF) Recommand breakdown voltage C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C1P/C1N C2P/C2N C3P/C3N C4P/C4N VINT VGH VGL VDDA VSD VCAC FRP 1 1 1 1 1 1 1 1 1 1 1 16V 16V 25V 25V 16V 25V 25V 16V 16V 16V 16V The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page 6 PD024OX8 Note 5-3: PVDD, VCC = +3.3 V (Typ.) Note 5-4: Outputs the control signal of switching regulator for LED. Duty cycle varies according to FB input voltage. Note 5-5: Feedback signal of switching signal for LED. It controls DRV output duty cycle with 0.6V input level sense. 6. Absolute Maximum Ratings The followings are maximum values, which if exceeded, may cause faulty operation or damage to the unit. PGND=GND=0V , Ta = 25 Parameter Symbol MIN. MAX. Unit Remark Vcc -0.3 7 V Power Supply Voltage -0.3 7 V PVDD Input Signal Voltage Digital Input Voltage Maximum clock frequency Vcom VIN Fmax -0.5 -0.3 - 6.375 V Vcc+0.3 V 30 MHz 7. Electrical Characteristics 7-1 Operation condition PGND=GND=0V , Ta = 25 Parameter Supply Voltage for Source Driver Supply Voltage for Gate Driver Digital input voltage Digital output voltage VCOM Symbol Vcc PVDD VGH VGL VIH VIL VOH VOL Min. 3.0 3.0 14.5 -10.5 0.7 VCC 0 0.7 VCC 0 Typ. 3.3 3.3 15.5 -9.5 - Max. 3.6 3.6 16.5 -8.5 VCC 0.3 VCC VCC 0.3 VCC Unit VCOM AC - +5.0 - VP-P VCOM DC - 1.5 - V Remark V V V V V V V Note 7-1 Note 7-1 AC Component of VCOM Note 7-2 Note 7-1: VGH and VGL supplied by internal setup-up circuit. Note 7-2: PVI strongly suggests that the VCOM DC level shall be adjustable , and the adjustable level range is 1.51V , every module’s VCOM DC level shall be carefully adjusted to show a best image performance. The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page 7 PD024OX8 7-2 Power consumption Parameter Supply voltage of LED backlight Supply current of LED backlight Backlight Power Consumption Symbol VLED ILED PLED Min 9.0 180 TYP 10.0 20 200 MAX 11.5 230 Unit V mA mW Remark ILED = 20 mA Note 7-3 Note 7-4 Note 7-3: LED B/L applied information, please refer to the appendix at the end. Note 7-4: PLED = VLED* ILED VLED Parameter Supply current for IC driver Total power consumption GLED Symbol Conditions TYP. MAX. Unit ICC mA 5.5 7 VCC +3.3V PVDD PVDD1+3.3V 15 mA 20 mW 68 90 Remark 8. Pixel arrangement The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page 8 PD024OX8 9. Display Color and Gray Scale Reference Color Basic Colors Red Green Blue Black Red (255) Green (255) Blue (255) Cyan Magenta Yellow White Red (00) Red (01) Red (02) Darker Brighter Red (253) Red (254) Red (255) Green (00) Green (01) Green (02) Darker Brighter Green (253) Green (254) Green (255) Blue (00) Blue (01) Blue (02) Darker Brighter Blue (253) Blue (254) Blue (255) Input Color Data Green Red Blue R7 R6 R5 R4 R3 R2 R1 R0 G7 G6 G5 G4 G3 G2 G1 G0 B7 B6 B5 B4 B3 B2 B1 B0 0 1 0 0 0 1 1 1 0 0 0 0 1 0 0 0 1 1 1 0 0 0 0 1 0 0 0 1 1 1 0 0 0 0 1 0 0 0 1 1 1 0 0 0 0 1 0 0 0 1 1 1 0 0 0 0 1 0 0 0 1 1 1 0 0 0 0 1 0 0 0 1 1 1 0 0 1 0 1 0 0 0 1 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 0 0 0 1 0 1 0 1 1 0 0 0 0 0 1 0 1 0 1 1 0 0 0 0 0 1 0 1 0 1 1 0 0 0 0 0 1 0 1 0 1 1 0 0 0 0 0 1 0 1 0 1 1 0 0 0 0 0 1 0 1 0 1 1 0 0 0 0 0 1 0 1 0 1 1 0 0 0 0 0 0 1 1 1 0 1 0 0 0 0 0 0 1 1 1 0 1 0 0 0 0 0 0 1 1 1 0 1 0 0 0 0 0 0 1 1 1 0 1 0 0 0 0 0 0 1 1 1 0 1 0 0 0 0 0 0 1 1 1 0 1 0 0 0 0 0 0 1 1 1 0 1 0 0 0 0 0 0 1 1 1 0 1 0 0 0 1 1 1 0 0 0 1 1 1 0 0 0 1 1 1 0 0 0 1 1 1 0 0 0 1 1 1 0 0 0 1 1 1 0 0 0 0 1 1 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 1 1 1 0 0 0 1 1 1 0 0 0 1 1 1 0 0 0 1 1 1 0 0 0 1 1 1 0 0 0 0 1 1 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 1 The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page 9 1 0 1 PD024OX8 10. Power On/Off Sequence Specially take care that the large current may cause a permanent damage to the IC when voltage is applied to the charge pump power supply in the condition that the logic power supply is floating. Please refer to the following timing and command setting, concerning the power supply ON and the power supply OFF. VCC Power on sequence timing diagram VCC Driver IC will write 3 VSYNC Black pattern to the LCD panel after STB mode. Power off sequence timing diagram The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page 10 PD024OX8 No DCLK Valid data D Valid data Source output Gate output VGL 0 V During No DCLK , Hsync and Vsync can be stopped. But in all other cases Hysnc and Vsync must be active. The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page 11 PD024OX8 11.Register Description Function Description D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 SHDB SHCB Data Register Address R00 0 0 0 0 GRB STB R01 0 0 1 0 reserved reserved reserved DITB R02 0 1 0 0 reserved reserved reserved FPOL UD SHL R03 0 1 1 0 PALM PAL SEL2 SEL1 SEL0 R04 1 0 0 0 DDL4 DDL3 DDL2 DDL1 DDL0 R05 1 0 1 0 HDL3 HDL2 HOL1 HDL0 R06 1 1 0 0 VDV 1 VDV 0 LPC1 LPC0 VSCL2 VSCL1 VSCL0 R07 1 1 1 0 DCKS1 DCKS0 reserved Register Description Note(1) D12 must be low. (2) All the SPI register settings will active at the falling edge of the VSYNC except GRB STB and SEL20bits. The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page 12 PD024OX8 11-1 Function Control Register (R00h) R00 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 0 0 D4 D3 D2 D1 D0 Data Register Address 0 D5 0 GRB STB SHDB SHCB 1 1 0 1 The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page 13 PD024OX8 11-2 Function Control Register (R01h) D15 D14 D13 D12 D11 D10 R01 D9 D8 D7 D6 0 1 D4 D3 D2 D1 D0 Data Register Address 0 D5 0 reserved reserved reserved 1 0 0 DITB reserved 0 1 The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page 14 PD024OX8 11-3 Function Control Register (R02h) R02 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 1 0 D4 D3 D2 D1 D0 FPOL UD SHL 0 1 1 Data Register Address 0 D5 0 reserved 0 reserved reserved 0 0 The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page 15 PD024OX8 11-4 Function Control Register (R03h) D15 D14 D13 D12 D11 D10 R03 D9 D8 D7 D6 1 1 D4 D3 D2 D1 D0 Data Register Address 0 D5 0 PALM PAL SEL2 SEL1 SEL0 0 0 0 0 0 000. Note : SEL [2:0] =000,010,011,101, only NTSC mode, no support PAL mode. The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page 16 PD024OX8 11-5 Function Control Register (R04h) D15 D14 D13 D12 D11 D10 R04 D9 D8 D7 D6 0 0 D4 D3 D2 D1 D0 Data Register Address 1 D5 0 DDL4 DDL3 DDL2 DDL1 DDL0 0 0 0 0 0 Select the data delay timing, Default Setting=00000. DDL4 DDL3 DDL2 DDL1 DDL0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 1 1 0 0 1 0 0 0 0 1 0 1 0 0 1 1 0 0 0 1 1 1 0 1 0 0 0 0 1 0 0 1 0 1 0 1 0 0 1 0 1 1 0 1 1 0 0 0 1 1 0 1 0 1 1 1 0 0 1 1 1 1 1 0 0 0 0 1 0 0 0 1 1 0 0 1 0 1 0 0 1 1 1 0 1 0 0 1 0 1 0 1 1 0 1 1 0 1 0 1 1 1 1 1 0 0 0 1 1 0 0 1 1 1 0 1 0 1 1 0 1 1 1 1 1 0 0 1 1 1 0 1 1 1 1 1 0 1 1 1 1 1 Delay 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 -1 -2 -3 -4 -5 -6 -7 -8 -9 -10 -11 -12 -13 -14 -15 -16 Unit DCLK Period The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page 17 PD024OX8 11-6 Function Control Register (R05h) R05 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 0 1 D4 D3 D2 D1 D0 Data Register Address 1 D5 0 HDL3 HDL2 HOL1 HDL0 0 0 0 0 Select the first active line delay timing, Default Setting=00000. DDL3 DDL2 DDL1 DDL0 Delay 0 0 0 0 0 0 0 0 1 1 0 0 1 0 2 0 0 1 1 3 0 1 0 0 4 0 1 0 1 5 0 1 1 0 6 0 1 1 1 7 1 0 0 0 8 1 0 0 1 -1 1 0 1 0 -2 1 0 1 1 -3 1 1 0 0 -4 1 1 0 1 -5 1 1 1 0 -6 1 1 1 1 -7 Unit HSYNC. Period. The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page 18 PD024OX8 11-7 Function Control Register (R06h) R06 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 1 1 0 D5 D4 D3 D2 D1 D0 Data Register Address 0 VDV 1 VDV 0 LPC1 LPC0 VSCL2 VSCL1 VSCL0 0 0 0 0 0 1 1 The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page 19 PD024OX8 11-8 Function Control Register (R07h) R07 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 1 1 D4 D3 D2 D1 D0 Data Register Address 1 D5 0 DCKS1 DCKS0 0 0 The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page 20 PD024OX8 12.AC Characteristics 12-1 Timing conditions Parameter Symbol Thc Twh Th Tvst Tvhd Thst Thhd Tdsu Tdhd Twv Twv Tv Tv Min. 1 60 12 12 12 12 12 12 2 1.5 - Typ. 32 63.5 4 1.5 262.5 312.5 Max. 1 67 6 5.5 - Unit DCLK DCLK s ns ns ns ns ns ns Th Th Th Th Hsync to Vsync time for ODD field THV_O -4 0 +4 DCLK Hsync to Vsync time for EVEN field THV_E 0 0.5 - Th Symbol Min. Typ. Max. Unit Tsck Tscw Tssw Tist Tihd Tcst Tchd Tcd Tcv 320 40 120 120 120 120 120 1 1 50 - 60 - ns % s ns ns ns ns s s Delay between Hsync and DCLK Hysnc width Hysnc period Vsync setup time Vsync hold time Hsync setup time Hsync hold time Data set-up time Data hold time Vsync width for RGB mode Vsync width for YUV mode Vsync period NTSC Vsync period PAL Serial communication Parameter Serial clock period Serial clock duty cycle Serial clock width Serial data setup time Serial data hold time SPENB setup time SPENB data hold time Chip select distinguish Delay between SPCK and Vsync The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page 21 PD024OX8 12-2 Operating mode dependent AC characteristic Serial RGB Mode, SEL2:0=000 Parameter DCLK frequency DCLK period DCLK duty cycle Delay from Hsync to 1,st data input Delay from Vsync to 1,st data input DRV output frequency Symbol Fclk Tcph Tcw Ths Tstv Min. 40 84 9 - Typ. 9.7 103 50 100 16 303.1 Max. 60 115 24 - Unit Mhz ns %Tcph DCLK Th KHz Symbol Fclk Tcph Tcw Min. 40 Typ. 24.54/27 40.7/37 50 Max. 60 Unit Mhz ns %Tcph Tstv 13 20 28 Th Tstv 16 23 31 Th Tstv 20 27 35 Th - 383.4/ 421.9 - KHz 12-3 Operating mode dependent AC characteristic YUV Mode, SEL2:0=011~110 Parameter DCLK frequency DCLK period DCLK duty cycle Delay from Vsync to 1,st data input (NTSC) Delay from Vsync to 1,st data input (PAL 288Lines) Delay from Vsync to 1,st data input (PAL280Lines) DRV output frequency 12-4 Operating mode dependent AC characteristic CCIR656 Mode,SEL2:0=111 Parameter DCLK frequency DCLK period DCLK duty cycle Delay from V to 1,st data input (NTSC) Delay from V to 1,st data input (PAL 288Lines) Delay from V to 1,st data input (PAL280Lines) DRV output frequency Symbol Fclk Tcph Tcw Min. 40 Typ. 27 37 50 Max. 60 Unit Mhz ns %Tcph Tstv 18 25 33 Th Tstv 20 27 35 Th Tstv 24 31 39 Th - - 421.9 - KHz The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page 22 PD024OX8 12-5 Operating mode dependent AC characteristic CCIR656 Mode,SEL2:0=010 Parameter Symbol Fclk DCLK frequency Tcph DCLK period Tcw DCLK duty cycle Delay form V to 1, st data input (NTSC) Tstv DRV output frequency - Min. 40 18 - Typ. 24.54 40.7 50 25 383.4 Max. 60 33 - Unit Mhz ns %Tcph Th KHz The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page 23 PD024OX8 13.Waveform 13-1 Timing formatSerial communication timing SPI Timing Diagram TCV TCST TIST TIHD TCHD TCD TSSW TSSW TSCK SPI Timing Diagram V.S. Vsync The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page 24 PD024OX8 13-2 Clock and Data Input Timing Diagram Tcwh 70% Tdsu Tcwl 70% 30% 70% 70% Last Tdhd 70% 30% 30% 70% Tvst Tvhd 30% 30% Thhd 30% 30% Thst 70% 30% Th Last Thc 30% Clock and Data Input Timing Diagram The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page 25 PD024OX8 13-3 Input Data Format Timing 13-3-1 Serial RGB Data Format Serial RGB Mode Horizontal Timing Td Th TWH ODD Line Data SWD=000 ODD Line Data SWD=000 Invalid data Invalid data Invalid data Invalid data 480Td THS Serial RGB Mode Vertical Timing – NTSC TWV ODD Field = Tv TSTV D[70] EVEN Field = Tv TWV D[70] TSTV The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page 26 PD024OX8 13-3-2 YUV mode Data Format YUV mode A Horizontal timing – 24.54MHz HSYNC TWH Th Td DCLK D[70] Invalid data Cb1 Y1 Cr1 Y2 Cb320 Y639 Cr320 Y640 Invalid data Cb360 Y719 Cr360 Y720 Invalid data Cr320 Y639 Cb320 Y640 Invalid data Cr360 Y719 Cb360 Y720 1280Td YUV mode A Horizontal timing – 27MHz HSYNC TWH Th Td DCLK D[70] Invalid data Cb1 Y1 Cr1 Y2 1440Td YUV mode B Horizontal timing – 24.54MHz HSYNC TWH Th Td DCLK D[70] Invalid data Cr1 Y1 Cb1 Y2 1280Td YUV mode B Horizontal timing – 27MHz HSYNC TWH Th Td DCLK D[70] Invalid data Cr1 Y1 Cb1 Y2 Invalid data 1440Td The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page 27 PD024OX8 YUV Mode Vertical Timing 24.54MHz & 27MHz - NTSC EVEN field Line1 Line2 Line3 Line4 ODD field = Tv Line5 Line6 Line20 Line7 Line21 Line22 Line23 Line24 Line25 Line26 DL1 DL4 DL239 DL240 Line283 Line284 Line285 Line286 Line287 Line288 Line289 Line524 Line525 Line261 Line262 VSYNC HSYNC TSTV D[70] ODD field DL2 DL3 EVEN field = Tv Line264 Line265 Line266 Line267 L ine268 Line269 Line270 VSYNC HSYNC D[70] TSTV+1 DL1 YUV Mode Vertical Timing 27MHz – PAL 288Lines EVEN field Line1 Line2 Line3 Line4 Line5 Line6 Line7 Line20 DL2 DL3 DL4 DL239 DL240 ODD field = Tv Line21 Line22 Line23 Line24 Line25 Line26 DL1 DL4 Line309 Line310 VSYNC HSYNC TSTV D[70] DL2 DL3 DL287 DL288 EVEN field = Tv ODD field Line313 Line314 Line315 Line316 L ine317 Line318 Line319 Line333 Line334 Line335 Line336 Line33 7 Line338 Line339 Line622 Line623 VSYNC HSYNC TSTV+1 D[70] DL1 YUV Mode Vertical Timing 27MHz – PAL 280Lines EVEN field Line1 Line2 Line3 Line4 Line5 Line6 Line7 Line24 DL2 DL3 DL4 DL287 DL288 ODD field = Tv Line25 Line26 Line27 Line28 Line29 Line30 Line305 DL1 DL4 DL279 DL280 Line306 VSYNC HSYNC TSTV D[70] DL2 DL3 EVEN field = Tv ODD field Line313 Line314 Line315 Line316 L ine317 Line318 Line319 Line33 7 Line338 Line339 Line340 Line341 Line342 Line343 Line618 Line619 VSYNC HSYNC D[70] TSTV+1 DL1 DL2 DL3 DL4 DL279 DL280 The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page 28 PD024OX8 13-3-3 CCIR656 Data Format CCIR656 27MHz , NTSC Td DCLK D[70] FF 00 00 EAV Invalid Data FF 00 00 SAV Cb1 Y1 Cr1 Y2 Cb360 Y719 Cr360 Y720 FF 00 00 EAV Invalid Data 720 CCIR encoded data(1440Td) 276Td Th=1716Td CCIR656 27MHz , PAL Td DCLK D[70] FF 00 00 EAV Invalid Data FF 288Td 00 00 SAV Cb1 Y1 Cr1 Y2 Cb360 Y719 Cr360 Y720 FF 00 00 EAV Cr1 Y2 Cb320 Y639 Cr320 Y640 FF 00 00 EAV 720 CCIR encoded data(1440Td) Invalid Data Th=1728Td CCIR656 24.54MHz , NTSC Td DCLK D[70] FF 00 00 EAV Invalid Data 280Td DL238 DL239 DL240 DL239 DL240 FF 00 00 SAV Cb1 Y1 640 CCIR encoded data(1280Td) Invalid Data Th=1560Td DL1 DL1 DL2 DL2 DL3 DL3 DL4 DL4 The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page 29 PD024OX8 D[70] DL283 DL284 DL285 DL286 DL287 DL288 D[70] DL283 DL284 DL285 DL286 DL287 DL288 D[70] DL278 DL280 D[70] DL279 DL280 TSTV DL1 DL2 DL3 DL4 DL5 DL6 DL7 DL8 TSTV + 1 TSTV TSTV + 1 DL1 DL2 DL3 DL4 DL5 DL6 DL7 DL1 DL2 DL3 DL4 DL1 DL2 DL3 The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page 30 13-4 The HSYNC & VSYNC timing of the ODD/EVEN field PD024OX8 Define the HSYNC to VSYNC timing for serial RGB mode The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page 31 PD024OX8 14.Optical Characteristics 14-1 Specification Parameter Viewing Angle Symbol Vertical Contrast Ratio Response time Condition Horizontal 21, 22 CR Rise Fall Uniformity Brightness White Chromaticity LED Life Time CR10 11 12 Tr Tf U At optimized Viewing angle L X Y Ta = 25 MIN. TYP. MAX. Unit Remarks 45 50 --deg 30 35 --deg Note 14-1 10 15 --deg 200 400 --- ----70 6 15 75 12 30 --- =0 -- =0 =0 =0 --- 200 250 --0.28 0.31 0.34 0.30 0.33 0.36 --- 10000 --- Note 14-2 ms ms % Note 14-3 Note 14-4 cd/ Note 14-5 Note 14-5 hrs Note 14-6 Note 14-1 : The definitions of viewing angles Note 14-2 : CR Luminance when Testing point is White Luminance when Testing point is Black Contrast ratio is measured in optimum common electrode voltage. The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page 32 PD024OX8 Note 14-3 : The definition of response time : White Black W hite 100% 90% Brightness 10% 0% Tr Tf Note 14-4 : The uniformity of LCD is defined as U= The Minimum Brightness of the 9 testing Points The Maximum Brightness of the 9 testing Points Luminance meter : BM-7 fast (TOPCON) Measurement distance : 500 mm +/- 50 mm Ambient illumination : < 1 Lux Measuring direction : Perpendicular to the surface of module The test pattern is white 1 /6 2 /6 2 /6 1 /6 1 /6 2 /6 2 /6 1 /6 Note 14-5 : Topcon BM-7(fast) luminance meter 1.0 field of view is used in the testing (use PVI backlight after 5 minutes operating), ILED = 20mA. Note 14-6 : Constant current 20mA for each loop , and the center brightness must more than 50% of initial brightness value . The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page 33 PD024OX8 14-2 Testing configuration BM-7(fast) Caution: 1. Environmental illumination 1 lux 2. Before test CR, Vcom voltage must be adjusted carefully to get the best 500mm CR. R,G,B signal input Pattern generator LCD Backlight LCD Display Testing Point Pattern A R, G, B Waveform of Pattern A at Testing Point 63.6 s Testing Point Pattern B RGB waveform Vcom 63.6 s Vw=1.3V +/- 0.2V R, G, B Waveform of Pattern B at Testing Point 63.6 s 63.6 s RGB waveform Vcom Vb=5.0V +/- 0.2V The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page 34 PD024OX8 15. Handling Cautions 15-1) Mounting of module a) Please power off the module when you connect the input/output connector. b) Please connect the ground surely. If the connection is not perfect, some following problems may happen possibly. 1.The noise from the backlight unit will increase. 2.In some cases a part of module will heat. c) Polarizer which is made of soft material and susceptible to flaw must be handled carefully. d) Protective film (Laminator) is applied on surface to protect it against scratches and dirt. It is recommended to peel off the laminator before use and taking care of static electricity. 15-2) Precautions in mounting a) Wipe off water drops or finger grease immediately. Long contact with water may cause discoloration or spots. b) TFT-LCD module uses glass which breaks or cracks easily if dropped or bumped on hard surface. Please handle with care. c) Since CMOS LSI is used in the module. So take care of static electricity and earth yourself when handling. 15-3) Others a) Do not expose the module to direct sunlight or intensive ultraviolet rays for many hours. b) Store the module at a room temperature place. c) The voltage of beginning electric discharge may over the normal voltage because of leakage current from approach conductor by to draw lump read lead line around. d) If LCD panel breaks, it is possibly that the liquid crystal escapes from the panel. Avoid putting it into eyes or mouth. When liquid crystal sticks on hands, clothes or feet. Wash it out immediately with soap. e) Observe all other precautionary requirements in handling general electronic components. The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page 35 PD024OX8 16. Reliability Test No. 1 2 3 4 Test Item High Temperature Storage Test Low Temperature Storage Test High Temperature Operation Test Low Temperature Operation Test High Temperature & High Humidity Operation Test Thermal Cycling Test (non-operating) 5 6 7 Vibration Test (non-operating) 8 Shock Test (non-operating) 9 Electrostatic Discharge Test (non-operating) Test Condition Ta = +70 , 240 hrs Ta = -20 , 240 hrs Ta = +60 , 240 hrs Ta = 0 , 240 hrs Ta = +60 , 90%RH , 240 hrs -20 +70, 200 Cycles 30 min 30 min Frequency : 10 ~ 55 HZ Amplitude : 1.0 mm Sweep time : 11 mins Test Period : 6 Cycles for each direction of X, Y, Z 100G , 6ms Direction : X , Y , Z Cycle : 3 times 200pF , 0 200V 1 time / each terminal Ta: ambient temperature Note : The protective film must be removed before temperature test. [Criteria] 1. Main LCD should normally work under the normally condition no defect of function, screen quality and appearance. (including : mura ,line defect ,no image) 2. After the temperature and humidity test, the luminance and CR (Contrast ratio), should not be lower than minimum of specification. 3. After the vibration and shock test, can’t be found chip broken. The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page 36 17. Packing Diagram PD024OX8 The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page 37 PD024OX8 The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page 38 Revision History Rev. Issued Date Revised 1.0 June. 7, 2006 New PD024OX8 Contents The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page 39