PI6C10804 1.8V/2.5V, 250MHz, 1:4 Networking Clock Buffer Features Description • High-speed, low-noise, non-inverting 1:4 buffer The PI6C10804 is a 1.8V or 2.5V high-speed, low-noise 1:4 non-inverting clock buffer. The key goal in designing the PI6C10804 is to target networking applications that require lowskew, low-jitter, and high-frequency clock distribution. • Maximum Frequency up to 250 MHz • Low output skew < 150ps • Low propagation delay < 3.0ns • Packages (Pb-free & Green available): -8-pin SOIC (W) Providing output-to-output skew as low as 150ps, the PI6C10804 is an ideal clock distribution device for synchronous systems. Designing synchronous networking systems requires a tight level of skew from a large number of outputs. Block Diagram Pin Configuration • 1.8V or 2.5V supply voltage �� ���� ����� ������ � � �� ���� � � ��� ���� � � ��� ���� � � ���� ������ ���� ���� Pin Description Pin Name BUF_IN CLK [0:3] GND VDD OE 06-0035 1 Description Input Outputs Ground Power Output Enable PS8822B 04/03/06 PI6C10804 1.8V/2.5V, 250MHz, 1:4 Networking Clock Buffer 2.5V Absolute Maximum Ratings (Above which the useful life may be impaired. For user guidelines only, not tested.) Storage Temperature...........................................................–65°C to +150°C VDD Voltage ..........................................................................–0.5V to +3.6V Output Voltage (max. 3.6V) .......................................... –0.5V to VDD+0.5V Input Voltage (max 3.6V).............................................. –0.5V to VDD+0.5V Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2.5V DC Characteristics (Over Operating Range: VDD = 2.5V ± 0.2V, TA = -40° to 85°C) Test Conditions(1) Parameters Description Min. Typ. (2) Max. Units 2.3 2.5 2.7 V VDD Supply Voltage VIH Input HIGH Voltage Logic HIGH level 1.7 3.6 VIL Input LOW Voltage Logic LOW level -0.3 0.7 Input Current VDD = Max, Vin = VDD or GND II VOH Output High Voltage VOL VDD = Min., VIN = VIH or VIL Output LOW Voltage VDD = Min., VIN - VIH or VIL Notes: 1. For Max. or Min. conditions, use appropriate operating range values. 2. Typical values are at VCC = 2.5V, +25°C ambient and maximum loading. I/O pins 15 non I/O pins 5 IOH = -1mA 2.0 IOH = -2mA 1.7 IOH = -8mA 1.5 V µA V IOL = 1mA 0.4 IOL = 2mA 0.7 IOL = 8mA 0.7 V 2.5V AC Characteristics (Over Operating Range: VDD = 2.5V ± 0.2V, TA = -40° to 85°C) Parameters FIN Test Conditions(1) Description Min. Input Frequency tR/tF tPLH, tPHL Max. Units 250 MHz 1.0 ns 1.5 2.0 ns 100 150 100 200 0 CLKn Rise/Fall Time (2) Typ 20% to 80% Propagation Delay BUF_IN to CLKn 1.0 tSK(O)(3) Output to Output Skew between any two outputs of the same device @ same transition tSK(P)(3) Pulse Skew between opposite transitions (tPHL-tPLH) of the same output tSK(T)(3) Part to Part Skew between two identical outputs of different parts on the same board(4) tdc_in Duty Cycle In @ 1ns edge rate 40 60 tdc_out Duty Cycle Out 40 60 CL = 5pF, 125 MHz Outputs are measured @ Vdd/2 ps 300 % Notes: 1. See test circuit and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. Skew measured at worse cast temperature (max. temp). 4. Identical conditions: loading, transitions, supply voltage, temperature, package type and speed grade. 06-0035 2 PS8822B 04/03/06 PI6C10804 1.8V/2.5V, 250MHz, 1:4 Networking Clock Buffer 1.8V Absolute Maximum Ratings (Above which the useful life may be impaired. For user guidelines only, not tested.) Storage Temperature...........................................................–65°C to +150°C VDD Voltage ..........................................................................–0.5V to +2.5V Output Voltage (max 2.5V) .......................................... –0.5V to VDD+0.5V Input Voltage (max 2.5V) ............................................. –0.5V to VDD+0.5V Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 1.8V DC Characteristics (Over Operating Range: VDD = 1.8V ± 0.15V, TA = -40° to 85°C) Parameters Description Test Conditions(1) Min. Typ. (2) Max. Units 1.65 1.8 1.95 V VDD Supply Voltage VIH Input HIGH Voltage Logic HIGH level 0.65*Vdd 2.7 VIL Input LOW Voltage Logic LOW level -0.3 0.35*Vdd Input Current(3) VDD = Max, Vin = VDD or GND Output High Voltage VDD = Min., VIN = VIH or VIL II VOH VOL Output LOW Voltage VDD = Min., VIN - VIH or VIL I/O pins 15 non I/O pins 5 IOH = -2mA 1.3 IOH = -8mA 1.2 IOL = 2mA 0.45 IOL = -8mA 0.45 Notes: 1. For Max. or Min. conditions, use appropriate operating Vdd and Ta values. 2. Typical values are at VCC = 1.8V, +25°C ambient and maximum loading. 3. This parameter is determined by device characterization but is not production tested. V µA V 1.8V AC Characteristics (Over Operating Range: VDD = 1.8V ± 0.15V, TA = -40° to 85°C) Parameters FIN Test Conditions(1) Description Min. Input Frequency tR/tF tPLH, tPHL Max. Units 180 MHz 1.0 ns 2.0 3.0 ns 100 150 200 275 0 CLKn Rise/Fall Time (2) Typ 20% to 80% Propagation Delay BUF_IN to CLKn 1.0 tSK(O)(3) Output to Output Skew between any two outputs of the same device @ same transition tSK(P)(3) Pulse Skew between opposite transitions (tPHL-tPLH) of the same output tSK(T)(3) Part to Part Skew between two identical outputs of different parts on the same board(4) tdc_in Duty Cycle In @ 1ns edge rate 40 60 tdc_out Duty Cycle Out 40 60 CL = 5pF, 125 MHz Outputs are measured @ Vdd/2 ps 300 % Notes: 1. See test circuit and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. Skew measured at worse cast temperature (max. temp). 4. Identical conditions: loading, transitions, supply voltage, temperature, package type and speed grade. 06-0035 3 PS8822B 04/03/06 PI6C10804 1.8V/2.5V, 250MHz, 1:4 Networking Clock Buffer Power Supply Characteristics Parameters IDDQ IDD_TOT ∆ICC Test Conditions(1) Description Quiescent Power Supply Current VDD = 2.7V Total Power Supply Current VDD = 2.7V Min. Typ. (2) 10 VIN = GND or VDD VDD = 1.95V VDD = 1.95V Static Supply Current VDD = 2.7V per inputs @ High VDD = 1.95V Level Max. µA 10 All Outputs Toggling, CL = 5pF, FIN = 125MHz 20 VINx = Vdd - 0.6V (3) 200 VINx = Vdd - 0.6V (3) 200 Units mA 15 µA Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics. 2. Typical values are at VCC = 1.8V or 2.5V, and +25°C ambient. 3. Per TTL driven input (VIN = VDD - 0.6V); all other inputs at VCC or GND. Capacitance (TA = 25°C, f = 1 MHz) Parameters(1) Description Test Conditions Typ Max. CIN Input Capacitance VIN = 0V 2.0 4 COUT Output Capacitance VOUT = 0V 1.7 6 Note: 1. Units pF This parameter is determined by device characterization but is not production tested. Test Circuits for All Outputs ��� ����� ���������� ���������� ��� 06-0035 ������ ������ ��� ��� Definitions: CL = Load capacitance: includes jig and probe capacitance. 4 PS8822B 04/03/06 PI6C10804 1.8V/2.5V, 250MHz, 1:4 Networking Clock Buffer Switching Waveforms Pulse Skew – tSK(P) Propagation Delay ��� ��� ����� ����� ����� ���� ��� ���� �� ��� ������ ����� �� �� ���� ���� ��� ������ ����� ����� ��� ��� ������������������������ Output Skew – tSK(O) Package Skew – tSK(T) Vdd Input Vdd Vdd/2 tPLHx Input 0V tPHLx tPLH1 VOH CLKx VOL tSK(O) VOH CLKy tSK(O) = | tPLHy - tPLHx | 06-0035 tPHLy or VOH Vdd/2 tSK(T) tSK(T) Part #2 Output Vdd/2 tPLHy 0V tPHL1 Part #1 Output Vdd/2 tSK(O) Vdd/2 VOL tSK(T) = | tPLH2 - tPLH1 | 5 VOH Vdd/2 tPLH2 | tPHLy - tPHLx | VOL tPHL2 or VOL | tPHL2 - tPHL1 | PS8822B 04/03/06 PI6C10804 1.8V/2.5V, 250MHz, 1:4 Networking Clock Buffer Packaging Mechanical: 8-Pin SOIC (W) � ���� ���� ���� ���� ����� ����� � ���� ���� ���� ����� ���� ����� ����� ���� ���� ���� ����� ���� ����� ����� ���� ���� ���� ���� ���� ���� ���� ���� ���� ���� ������������� ��� ���� ��� ���� ����� ����� ���� ���� ����� ���� ����� ���� ���� ����� ���� ����� ���� ������������������ ���� �������������� Ordering Information(1,2,3) Ordering Code Package Code PI6C10804WE W Package Type Pb-free & Green, 8-pin 153-mil wide SOIC Notes: 1. Thermal Characteristics can be found on the web at www.pericom.com/packaging/ 2. E = Pb-free and Green 3. X suffix = Tape/Reel Pericom Semiconductor Corporation • 1-800-435-2336 • www.pericom.com 06-0035 6 PS8822B 04/03/06