ETC PI74ALVCH16260A

PI74ALVCH16260
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12-Bit To 24-Bit Multiplexed D-Type Latch
with 3-State Outputs
Product Description
Product Features
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Pericom Semiconductor’s PI74ALVCH series of logic circuits are
produced using the Company’s advanced 0.5 micron CMOS
technology, achieving industry leading speed.
PI74ALVCH16260 is designed for low voltage operation
VCC = 2.3V to 3.6V
Hysteresis on all inputs
Typical VOLP (Output Ground Bounce)
< 0.8V at VCC = 3.3V, TA = 25°C
Typical VOHV (Output VOH Undershoot)
< 2.0V at VCC = 3.3V, TA = 25°C
Bus Hold retains last active bus state during 3-State,
eliminating the need for external pullup resistors
Industrial operation at –40°C to +85°C
Packages available:
– 56-pin 240 mil wide plastic TSSOP (A)
– 56-pin 300 mil wide plastic SSOP (V)
The PI74ALVCH16260 is a 12-bit to 24-bit multiplexed D-type latch
designed for 2.3V to 3.6 VCC operation. It is used in applications
where two separate datapaths must be multiplexed onto, or
demultiplexed from, a single data path.
Typical applications include multiplexing and/or demultiplexing
address and data information in microprocessor or bus-interface
and in memory-interleaving.
Three 12-bit I/O ports (A1-A12, 1B1-1B12, and 2B1-2B12) are available
for address and/or data transfer. The output-enable (OE1B, OE2B,
and OEA) inputs control bus transceiver functions. The OE1B and
OE2B control signals also allow bank control in the A-to-B direction.
Address and/or data information can be stored using the internal
storage latches. The latch-enable (LE1B, LE2B, LEA1B, and LEA2B)
inputs are used to control data storage. When the latch-enable input
is HIGH, the latch is transparent. When the latch-enable input goes
LOW, the data present at the inputs is latched and remains latched
until the latch-enable input is returned HIGH.
To ensure high-impedance state during power up or power down,
OE should be tied to VCC through a pullup resistor whose minimum
value is determined by the current-sinking capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating
data inputs at a valid logic level.
Logic Block Diagram
LE1B 2
LE2B 27
30
LEA1B
LEA2B 55
OE2B
OE1B
OEA
56
29
1
SEL 28
G1
A1
8
C1
23
1
1B1
1D
1
C1
1D
6
2B1
C1
1D
C1
1D
TO 11 OTHER CHANNELS
1
PS8089C
04/17/01
PI74ALVCH16260
12-Bit To 24-Bit Multiplexed D-Type Latch
with 3-State Outputs
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Truth Tables(1)
B to A (OEB = H)
Product Pin Description
Pin Name
OE
SEL
LE
A,1B,2B
A,1B,2B
GND
V CC
Inputs
Description
Output Enable Input (Active LOW)
Select
Latch Enable
Data Inputs
3-State Outputs
Ground
Power
1B
2B
SEL
LE1B
LE2B
OEA
Output
A
H
X
H
H
X
L
H
L
X
H
H
X
L
L
X
X
H
L
X
L
A0
X
H
L
X
H
L
H
X
L
L
X
H
L
L
X
X
L
X
L
L
A0
X
X
X
X
X
H
Z
Product Pin Configuration
A to B (OEA = H)
Inputs
OEA
LE1B
1
2
56
55
OE2B
LEA2B
A
H
H
H
2B3
GND
2B2
3
4
5
54
53
52
2B4
GND
2B5
L
H
H
H
H
2B1
VCC
6
7
8
51
50
49
2B6
VCC
L
9
10
48
47
2B7
2B8
X
L
L
X
X
X
X
X
X
X
X
X
X
A1
A2
A3
GND
A4
A5
A6
A7
A8
A9
GND
A10
A11
A12
VCC
1B1
1B2
GND
1B3
LE2B
SEL
11 56-Pin 46
12 A, V 45
13
44
14
15
16
43
42
41
17
18
40
39
19
20
21
38
37
36
22
23
24
35
34
33
25
26
32
31
27
28
30
29
2B9
GND
2B10
2B11
2B12
1B12
1B11
1B10
GND
1B9
1B8
1B7
VCC
1B6
1B5
GND
1B4
LEA1B
OE1B
Outputs
LEA1B LEA2B OE1B
OE2B
1B
2B
L
L
H
H
L
L
L
L
L
L
L
H
2B0
H
L
L
L
L
2B0
H
L
H
L
L
1B0
H
L
L
H
L
L
1B0
L
L
L
1B0
2B0
H
H
Z
Z
L
H
Active
Z
X
H
L
Z
Active
X
L
L
Active
Active
Note:
1. H = High Signal Level
L = Low Signal Level
X = Irrelevant
Z = High Impedance
2
PS8089C
04/17/01
PI74ALVCH16260
12-Bit To 24-Bit Multiplexed D-Type Latch
with 3-State Outputs
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Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature ................................................. –65°C to +150°C
Ambient Temperature with Power Applied ................. –40°C to +85°C
Input Voltage Range, VIN ............................................ –0.5V to VCC +0.5V
Output Voltage Range, VOUT ..................................... –0.5V to VCC +0.5V
DC Input Voltage .......................................................... –0.5V to +5.0V
DC Output Current ....................................................................100mA
Power Dissipation ........................................................................ 1.0W
Note:
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the device.
This is a stress rating only and functional operation of the
device at these or any other conditions above those
indicated in the operational sections of this specification
is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
DC Electrical Characteristics (Over the Operating Range, TA = –40°C to +85°C, VCC = 3.3V ± 10%)
Parame te rs
De s cription
VCC
Supply Voltage
VIH(3)
Input HIGH Voltage
VIL(3)
(3)
Input LOW Voltage
Te s t Conditions (1)
M in.
2.3
VCC = 2.3V to 2.7V
1.7
VCC = 2.7V to 3.6V
2.0
Typ.(2)
M ax.
3.6
VCC = 2.3V to 2.7V
0.7
VCC = 2.7V to 3.6V
0.8
Input Voltage
0
VCC
VOUT(3)
Output Voltage
0
VCC
VOH
Output HIGH Voltage
VIN
VOL
IOH(3)
IOL(3)
Output LOW Voltage
Output HIGH Current
Output LOW Current
IOH = - 100µA, VCC = Min. to Max.
VCC - 0.2
VIH = 1.7V, IOH = –6mA, VCC = 2.3V
2.0
VIH = 1.7V, IOH = –12mA, VCC = 2.3V
1.7
VIH = 2.0V, IOH = –12mA, VCC = 2.7V
2.2
VIH = 2.0V, IOH = –12mA, VCC = 3.0V
2.4
VIH = 2.0V, IOH = –24mA, VCC = 3.0V
2.0
V
IOL = 100µA, VIL = Min. to Max.
0.2
VIL = 0.7V, IOL = 6mA, VCC = 2.3V
0.4
VIL = 0.7V, IOL = 12mA, VCC = 2.3V
0.7
VIL = 0.8V, IOL = 12mA, VCC = 2.7V
0.4
VIL = 0.8V, IOL = 24mA, VCC = 3.0V
0.55
VCC = 2.3V
–12
VCC = 2.7V
–12
VCC = 3.0V
–24
VCC = 2.3V
12
VCC = 2.7V
12
VCC = 3.0V
24
3
Units
mA
PS8089C
04/17/01
PI74ALVCH16260
12-Bit To 24-Bit Multiplexed D-Type Latch
with 3-State Outputs
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DC Electrical Characteristics-Continued (Over the Operating Range, TA = –40°C to +85°C, VCC = 3.3V ±10%)
Te s t Conditions (1)
Parame te rs D e s cription
M in.
IIN
Input Current
VIN = VCC or GND, VCC = 3.6V
IIN (HOLD)
Input Hold Current
VIN = 0.7V, VCC = 2.3V
45
VIN = 1.7V, VCC = 2.3V
–45
VIN = 0.8V, VCC = 3.0V
75
VIN = 2.0V, VCC = 3.0V
–75
Typ.(2)
M ax.
Units
±5
VIN = 0 to 3.6V, VCC = 3.6V
±500
IOZ
O utput Current (3- State O utputs)
VOUT = VCC or GND, VCC = 3.6V
±10
ICC
Supply Current
VCC = 3.6V, IOUT = 0µA,
VIN = GND or VCC
40
∆ICC
Supply Current per Input @ TTL HIGH
VCC = 3.0V to 3.6V
O ne Input at VCC – 0.6V
O ther Inputs at VCC or GND
750
CI
Control Inputs
VIN = VCC or GND, VCC = 3.3V
3.5
CO
O utputs
VO = VCC or GND, VCC = 3.3V
9
µA
pF
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 3.3V, +25°C ambient and maximum loading.
3. Unused Control Inputs must be held HIGH or LOW to prevent them from floating.
Timing Requirements over Operating Range
Parame te rs
De s cription
VCC = 2.5V ± 0.2V
M in.
M ax.
VCC = 2.7V
M in.
M ax.
VCC = 3.3V ± 0.3V
M in.
tW
Pulse duration, LE1B, LE2B,
LEA1B, or LEA2B High
3.3
3.3
3.3
tSU
Setup time, data before LE1B,
LE2B, LEA1B, or LEA2B
1.4
1.1
1.1
tH
Hold time, data after LE1B,
LE2B, LEA1B or LEA2B
1.6
1.9
1.5
∆t/∆v(1)
Input Transition Rise or Fall
0
10
0
10
0
M ax.
Units
ns
10
ns/V
Note:
1. Unused control inputs must be held HIGH or LOW to prevent them from floating.
4
PS8089C
04/17/01
PI74ALVCH16260
12-Bit To 24-Bit Multiplexed D-Type Latch
with 3-State Outputs
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Switching Characteristics over Operating Range(1)
Parame te rs
From (Input)
To (Output)
A or B
VCC = 2.5V ± 0.2V
M in.(2)
M ax.
B or A
1.2
LE
A or B
SEL
tEN
tDIS
tPD
VCC = 2.7V
M in.(2)
VCC = 3.3V ± 0.3V
M ax.
M in.(2)
M ax.(2)
6.0
5.1
1.2
4.3
1.0
6.2
5.2
1.0
4.4
A
1.2
7.5
6.6
1.1
5.6
OE
A or B
1.0
7.2
6.4
1.0
5.4
OE
A or B
1.7
5.9
5.0
1.3
4.6
Units
ns
Notes:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
Operating Characteristics, TA = 25ºC
Parame te r
CPD Power Dissipation Capacitance
Te s t Conditions
Outputs Enabled
Outputs Disabled
CL = 50pF,
f = 10 MHz
VCC = 2.5V ± 0.2V
VCC = 3.3V ± 0.3V
Typical
87
120
80.5
118
Units
pF
Power Supply Characteristics
Parame te rs
Te s t Conditions (1)
D e s cription
M in.
Typ(2)
M ax.
Units
µA
ICC
Q uiescent Power Supply Current
VCC = Max., Iout = 0V, Vin = GND or VCC
40
∆ICC
Supply Current per
Input @TTL HIGH
VCC = 3.0V to 3.6V, O ne input at VCC – 0.6V
O ther inputs at VCC or GND
750
Note:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device.
Pericom Semiconductor Corporation
2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com
5
PS8089C
04/17/01