PI74AVC+16836 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 2.5V 20-Bit Universal Bus Driver with 3-State Outputs Product Description Product Features • PI74AVC+16836 is designed for low voltage operation, Pericom Semiconductor’s PI74AVC+ series of logic circuits are produced using the Company’s advanced 0.35 micron CMOS technology, achieving industry leading speed. The 20-bit PI74AVC+16836 universal bus driver is designed for 1.65V to 3.6V Vcc operation. VCC = 1.65V to 3.6V • True ±24mA Balanced Drive @ 3.3V • IOFF supports partial power-down operation • 3.6V I/O Tolerant inputs and outputs Data flow from A to Y is controlled by the Output Enable (OE) input. The device operates in the transparent mode when the latch-enable (LE) input is LOW. When LE is HIGH, the A data is latched if the clock (CLK) input is held at a high or low logic level. If LE is HIGH, the A data is stored in the latch/flip-flop on the low-to-high transition of CLK. When OE is HIGH, the outputs are in the highimpedance state, but all the inputs are enabled and data is capable of being stored in the register. • Meets PC133 SDRAM Registered DIMM Specifications • All outputs contain a patented DDC (Dynamic Drive Control) circuit that reduces noise without degrading propagation delay • Industrial operation at –40°C to +85°C • Available Packages: – 56-pin 240 mil wide plastic TSSOP (A) – 56-pin 173 mil wide plastic TVSOP (K) To ensure the high-impedance state during power up or power down, OE should be tied to Vcc through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Logic Block Diagram 1 OE LE A1 56 29 55 1D C1 2 Y1 CLK V CLK TO 19 OTHER CHANNELS 1 PS8511A 02/06/01 PI74AVC+16836 2.5V 20-Bit Universal Bus Driver with 3-State Outputs 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Product Pin Description Pin Name Truth Table(1) De s cription OE Output Enable Input (Active LOW) LE Latch Enable (Active LOW) CLK Inputs Outputs Y OE LE CLK A Clock Input H X X X Z A Data Input L L X L L Y Data Output L L X H H GND Ground L H ↑ L L Vcc Power L H ↑ H H L H L or H X Yo( 2 ) Pin Configuration OE Y1 1 2 56 55 CLK A1 Y2 GND 3 4 5 54 53 52 A2 GND A3 51 A4 VCC Y5 6 7 8 Y6 Y7 9 10 48 47 A6 A7 GND Y8 Y9 11 12 13 46 GND A8 A9 Y10 Y11 14 15 16 56-Pin 43 A, K 42 A10 A11 41 A12 17 18 40 A13 39 GND 19 20 21 38 A14 A15 22 23 24 35 34 33 VCC 32 31 GND Y19 25 26 Y20 NC 27 28 30 29 A20 LE Y3 Y4 VCC Y12 Y13 GND Y14 Y15 Y16 VCC Y17 Y18 GND 50 49 45 44 37 36 Note: 1 H = High Signal Level L = Low Signal Level Z = High Impedance ↑ = Transition LOW-to-HIGH X = Irrelevant 2. Output level before the indicated steady-state input conditions were established. A5 A16 A17 A18 A19 2 PS8511A 02/06/01 PI74AVC+16836 2.5V 20-Bit Universal Bus Driver with 3-State Outputs 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested.) Supply voltage range, VCC ............................................................................................ –0.5V to +4.6V Input voltage range, VI .................................................................................................... –0.5V to +4.6V Voltage range applied to any output in the high-impedance or power-off state, VO(1) ............................................................ –0.5V to +4.6V Voltage range applied to any output in the high or low state, VO(1,2) ........................................................................................ –0.5V to VCC +0.5V Input clamp current, IIK (VI <0) ............................................................................ –50mA Output clamp current, IOK (VO <0) ...................................................................... –50mA Continuous output current, IO ...................................................................................................... ±50mA Continuous current through each VCC or GND ................................................. ±100mA Package thermal impedance, θJA(3): package A .................................................... 64°C/W package K ................................................... 48°C/W Storage Temperature range, Tstg .............................................................................. –65°C to 150°C Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Notes: 1. Input & output negative-voltage ratings may be exceeded if the input and output curent rating are observed. 2. Output positive-voltage rating may be exceeded up to 4.6V maximum if theoutput current rating is observed. 3. The package thermal impedance is calculated in accordance with JESD 51. Recommended Operating Conditions(1) VCC M in. M ax. Operating 1.65 3.6 Data retention only 1.2 Supply Voltage VCC VCC = 1.2V VIH High- level Input Voltage VCC = 1.65V to 1.95V 0.65 x VCC VCC = 2.3V to 2.7V 1.7 2 VCC = 3V to 3.6V Gnd VCC = 1.2V VIL Low- level Input Voltage VI Input Voltage VO Output Voltage IOH High- level output current IOL Low- level output current ∆t∆v Input transition rise or fall rate TA Units V 0.35 x VCC VCC = 1.65V to 1.95V VCC = 2.3V to 2.7V 0.7 VCC = 3V to 3.6V 0.8 0 3.6 Active State 0 VCC 3- State 0 3.6 VCC = 1.65V to 1.95V –6 VCC = 2.3V to 2.7V – 12 VCC = 3V to 3.6V – 24 mA VCC = 1.65V to 1.95V 6 VCC = 2.3V to 2.7V 12 VCC = 3V to 3.6V 24 VCC = 1.65V to 3.6V 5 ns/V 85 °C –40 Operating free- air temperature Notes: 1. All unused inputs must be held at VCC or GND to ensure proper device operation. 3 PS8511A 02/06/01 PI74AVC+16836 2.5V 20-Bit Universal Bus Driver with 3-State Outputs 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 DC Electrical Characteristics (Over the Operating Range, TA = –40°C +85°C) Parame te rs VO H VO L II IO F F IO Z IC C Control Inputs Te s t Conditions (1) IO H = –100µA IO H = –6mA VIH = 1.07V VIH = 1.7V IO H = –12mA IO H = –24mA VIH = 2V IO L = 100µA VIH = 0.57V IO L = 6mA VIH = 0.7V IO L = 12mA IO L = 24mA VIH = 0.8V VI = VC C or GND VI or VO = 3.6V VI = VC C or GND VO = VC C or GND IO = 0 Control Inputs VI = VC C or GND CI Data Inputs CO Outputs VO = VC C or GND VCC M in. 1.65V to 3.6V 1.65V 2.3V 3V 1.65V to 3.6V 1.65V 2.3V 3V 3.6V 0 3.6V 3.6V 2.5V 3.3V 2.5V 3.3V 2.5V 3.3V VC C –0.2V 1. 2 1.75 2.0 M ax. 0.2 0.45 0.55 0.8 ±2.5 ±10 ±10 40 4 4 6 6 8 8 Units V µA pF Note: Typical values are measured at TA = 25°C. 4 PS8511A 02/06/01 PI74AVC+16836 2.5V 20-Bit Universal Bus Driver with 3-State Outputs 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Timing Requirements (Over recommended operating free-air temperature range, unless otherwise noted, see Figures 1 thru 4) Vcc = 1.2V Vcc = 1.5V ±0.1V M in. M ax. M in. M ax. Vcc = 1.8V ±0.15V M in. M ax. Vcc = 2.5V ±0.2V M in. M a x. M in. fclock Clock Frequency tw Pulse Duration LE Low 2.0 1. 2 1.0 CLK High or Low 2.0 1.2 1.0 Data before CLK↑ 1.4 1. 2 1. 0 Data before CLK High LE↑ CLK Low 1. 4 1.2 1.0 1.4 1. 2 1.0 Data after CLK↑ 1. 0 0.8 0.6 Data after LE↑ 1. 0 0.8 0.6 tsu Setup Time th Hold Time 180 Vcc = 3.3V ±0.3V CLK High or Low M a x. Units 18 0 MHz 18 0 ns Switching Characteristics over recommended operating free-air temperature range (unless otherwise noted, see Figures 1 thru 4) Parame te rs From (Input) To (Output) VCC = 1.2V VCC = 1.5V ±0.1V M in. M ax. M in. M ax. fmax tpd VCC = 1.8V ±0.15V M in. M ax. 180 VCC = 2.5V ±0.2V M in. M a x. 180 VCC = 3.3V ±0.3V M in. M ax. 180 MHz A 1. 0 4.5 0.8 3.0 0.7 2.4 LE 1. 0 5.0 0.8 3.3 0.7 2.5 1. 0 4.5 0.8 3.0 0.7 2.5 CLK Y Units ten OE 1. 5 5.5 1.0 4.5 1.0 4.0 tdis OE 1. 5 5.0 1.0 4.5 1.0 4.0 ns Operating Characteristics, TA= 25°C Te s t Conditions Parame te rs Outputs Enabled Cpd Power Dissipation Capacitance Outputs Disabled CL = 0pF, f = 10 MHz 5 VCC = 1.8V ±0.1V VCC = 2.5V ±0.2V VCC = 3.3V ±0.3V Typical Typical Typical 48 50 55 25 28 32 Units pF PS8511A 02/06/01 PI74AVC+16836 2.5V 20-Bit Universal Bus Driver with 3-State Outputs 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 PARAMETER MEASUREMENT INFORMATION VCC = 1.2V AND 1.5V ± 0.1V S1 2Ω From Output Under Test CL = 15pF 2xVCC Open GND 2Ω (See Note A) Te s t S1 tpd tPLZ/tPZL tPHZ/tPZH Open 2 x VCC GND Load Circuit VCC Timing Input VCC/2 tW 0V tsu VCC VCC/2 Input th 0V VCC Data Input VCC/2 VCC/2 Voltage Waveforms Pulse Duration 0V Voltage Waveforms Setup and Hold Times Output Control (Low Level Enabling) VCC Input VCC/2 VCC/2 tPLH tPHL VOH VCC /2 VCC VCC/2 Output Waveform 2 S1 at GND (see Note B) VCC/2 VOL Voltage Waveforms Propagation Delay Times VCC/2 0V tPZL Output Waveform 1 S1 at 2 x VCC (see Note B) t PZH 0V Output VCC/2 tPLZ VCC VCC/2 VOL +0.1V VOL tPHZ VCC/2 VOH –0.1V VOH 0V Voltage Waveforms Enable and Disable Times Figure 1. Load Circuit and Voltage Waveforms Notes: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input impulses are supplied by generators having the following characteristics: PRR ≤10 MHz, ZO = 50Ω, tR ≤2.0ns, tF ≤2.0ns. D. The outputs are measured one at a time with one transition per measurement. E. tPLZ and tPHZ are the same as tdis F. tPZL and tPZH are the same as ten G. tPLH and tPHL are the same as tpd 6 PS8511A 02/06/01 PI74AVC+16836 2.5V 20-Bit Universal Bus Driver with 3-State Outputs 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 PARAMETER MEASUREMENT INFORMATION VCC = 1.8V ±0.15V S1 12ΩkΩ From Output Under Test CL = 30 15pF 2xVCC Open GND 2Ω 1 kΩ (See Note A) Te s t S1 tpd tPLZ/tPZL tPHZ/tPZH Open 2 x VCC GND Load Circuit VCC Timing Input VCC/2 tW 0V tsu VCC VCC/2 Input th 0V VCC Data Input VCC/2 VCC/2 Voltage Waveforms Pulse Duration 0V Voltage Waveforms Setup and Hold Times Output Control (Low Level Enabling) VCC Input VCC/2 VCC/2 tPLH tPHL VOH VCC /2 VCC VCC/2 Output Waveform 2 S1 at GND (see Note B) VCC/2 VOL Voltage Waveforms Propagation Delay Times VCC/2 0V tPZL Output Waveform 1 S1 at 2 x VCC (see Note B) t PZH 0V Output VCC/2 tPLZ VCC VCC/2 VOL +0.1V 0.15V VOL tPHZ VCC/2 VOH –0.1V 0.15V VOH 0V Voltage Waveforms Enable and Disable Times Figure 2. Load Circuit and Voltage Waveforms Notes: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input impulses are supplied by generators having these characteristics: PRR ≤10 MHz, ZO = 50Ω, tR ≤2.0ns, tF ≤2.0ns. D. The outputs are measured one at a time with one transition per measurement. E. tPLZ and tPHZ are the same as tdis F. tPZL and tPZH are the same as ten G. tPLH and tPHL are the same as tpd 7 PS8511A 02/06/01 PI74AVC+16836 2.5V 20-Bit Universal Bus Driver with 3-State Outputs 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 PARAMETER MEASUREMENT INFORMATION VCC = 2.5V ± 0.2V S1 500Ω 2Ω From Output Under Test CL =30 15pF 2xVCC Open GND 500Ω 2Ω (See Note A) Te s t S1 tpd tPLZ/tPZL tPHZ/tPZH Open 2 x VCC GND Load Circuit VCC Timing Input VCC/2 tW 0V tsu VCC VCC/2 Input th 0V VCC Data Input VCC/2 VCC/2 Voltage Waveforms Pulse Duration 0V Voltage Waveforms Setup and Hold Times Output Control (Low Level Enabling) VCC Input VCC/2 VCC/2 tPLH tPHL VOH VCC /2 VCC VCC/2 Output Waveform 2 S1 at GND (see Note B) VCC/2 VOL Voltage Waveforms Propagation Delay Times VCC/2 0V tPZL Output Waveform 1 S1 at 2 x VCC (see Note B) t PZH 0V Output VCC/2 tPLZ VCC VCC/2 VOL +0.15V VOL tPHZ VCC/2 VOH –0.15V VOH 0V Voltage Waveforms Enable and Disable Times Figure 3. Load Circuit and Voltage Waveforms Notes: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input impulses are supplied by generators having these characteristics: PRR ≤10 MHz, ZO = 50Ω, tR ≤2.0ns, tF ≤2.0ns. D. The outputs are measured one at a time with one transition per measurement. E. tPLZ and tPHZ are the same as tdis F. tPZL and tPZH are the same as ten G. tPLH and tPHL are the same as tpd 8 PS8511A 02/06/01 PI74AVC+16836 2.5V 20-Bit Universal Bus Driver with 3-State Outputs 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 PARAMETER MEASUREMENT INFORMATION VCC = 3.3V ± 0.3V S1 500Ω 2Ω From Output Under Test CL = 30 15pF 2xVCC Open GND 500Ω 2Ω (See Note A) Te s t S1 tpd tPLZ/tPZL tPHZ/tPZH Open 2 x VCC GND Load Circuit VCC Timing Input VCC/2 tW 0V tsu VCC VCC/2 Input th 0V VCC Data Input VCC/2 VCC/2 Voltage Waveforms Pulse Duration 0V Voltage Waveforms Setup and Hold Times Output Control (Low Level Enabling) VCC Input VCC/2 VCC/2 tPLH tPHL VOH VCC /2 VCC VCC/2 Output Waveform 2 S1 at GND (see Note B) VCC/2 VOL Voltage Waveforms Propagation Delay Times VCC/2 0V tPZL Output Waveform 1 S1 at 2 x VCC (see Note B) t PZH 0V Output VCC/2 tPLZ VCC VCC/2 VOL +0.1V 0.3V VOL tPHZ VCC/2 VOH –0.1V 0.3V VOH 0V Voltage Waveforms Enable and Disable Times Figure 4. Load Circuit and Voltage Waveforms Notes: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input impulses are supplied by generators having these characteristics: PRR ≤10 MHz, ZO = 50Ω, tR ≤2.0ns, tF ≤2.0ns. D. The outputs are measured one at a time with one transition per measurement. E. tPLZ and tPHZ are the same as tdis F. tPZL and tPZH are the same as ten G. tPLH and tPHL are the same as tpd Pericom Semiconductor Corporation 2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com 9 PS8511A 02/06/01