ETC PI74FCT162344ATV

PI74FCT162344T
Address/Clock
Driver
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PI74FCT162344T
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Fast CMOS
Address/Clock Driver
Product Features
Product Description
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Pericom Semiconductor’s PI74FCT series of logic circuits are
produced in the Company’s advanced 0.6 micron CMOS
technology, achieving industry leading speed grades.
Ideal for address line driving and clock distribution
Eight banks with 1:4 fanout with 3-state control
Typical tSK(O) output skew < 500ps
Balanced output drivers: ±24mA
Hysteresis on all inputs
Packages available:
– 56-pin 240-mil wide plastic TSSOP (A)
– 56-pin 300-mil wide plastic SSOP (V)
The PI74FCT162344T is an address/clock driver designed to
provide the ability to fanout to memory arrays. Eight banks, each
with a fanout of four, and 3-state control, provide efficient address
distribution. One or more banks may be used for clock distribution.
The PI74FCT162344T has balanced output drivers. It is designed
with current limiting resistors at its outputs to control the output
edge rate resulting in lower ground bounce and undershoot. This
eliminates the need for external terminating resistors for most
interface applications.
Logic Block Diagram
OE1
OE3
B11
B51
A1
A5
B14
B54
B21
B61
A2
A6
B24
B64
OE2
OE4
B31
B71
A3
A7
B34
B74
B41
B81
A4
A8
B44
B84
1
PS2047B
03/22/99
PI74FCT162344T
Address/Clock
Driver
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Product Pin Description
Product Pin Configuration
OE1
B11
B12
GND
B13
B14
VCC
A1
B21
B22
GND
B23
B24
A2
A3
1
2
3
4
5
6
7
8
9
10
56
OE4
55
54
53
52
51
B81
B82
50
49
48
47
VCC
A8
B71
B72
GND
B73
11
46
12
45
56-PIN
13
44
A56
14
43
V56
15
42
GND
B83
B84
GND
B33
19
38
B63
B34
A4
20
21
22
37
36
35
34
B64
A5
33
B41
B42
GND
B43
B44
OE2
23
24
OEX
L
L
H
A7
B61
B62
VCC
Inputs
A6
41
40
39
Description
3-State Output Enable Inputs (Active LOW)
Inputs
3-State Outputs
Ground
Power
Truth Table(1)
B74
16
17
18
B31
B32
Pin Name
OEx
Ax
Bxx
GND
VCC
Note: 1. H
L
X
Z
GND
AX
L
H
X
=
=
=
=
Outputs
Bxx
L
H
Z
High Voltage Level
Low Voltage Level
Don’t Care
High Impedance
VCC
B51
25
26
32
31
B52
GND
B53
27
28
30
29
OE3
B54
Capacitance (TA = 25°C, f = 1 MHz)
Parameters(1)
Description
Test Conditions
Typ
Max.
Units
CIN
Input Capacitance
VIN = 0V
3.5
6.0
pF
COUT
Output Capacitance
VOUT = 0V
3.5
8.0
pF
Note:
1. This parameter is determined by device characterization but is not production tested.
2
PS2047B
03/22/99
PI74FCT162344T
Address/Clock
Driver
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Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Note:
Storage Temperature .......................................................... –65°C to +150°C
Stresses greater than those listed under
Ambient Temperature with Power Applied ..............................0°C to +70°C
MAXIMUM RATINGS may cause permanent damage
to the device. This is a stress rating only and functional
Supply Voltage to Ground Potential ..................................... –0.5V to +7.0V
operation of the device at these or any other conditions
DC Input Voltage .................................................................. –0.5V to +7.0V
above those indicated in the operational sections of
this specification is not implied. Exposure to absolute
DC Output Current ............................................................... –60 to +120mA
maximum rating conditions for extended periods may
Power Dissipation ................................................................................0.5W
affect reliability.
Operating Range
Ambient Temperature = –40°C to +85°C
Vcc = 5.0V ±10%
DC Electrical Characteristics (Over the Operating Range, TA = –40°C to +85°C, VCC = 5.0V ±10%)
Test Conditions(1)
Parameters Description
Min.
Typ(2)
Max.
Units
VOH
Output HIGH Voltage
VCC = Min, VIN = VIH or VIL
IOH = – 24mA
2.4
3.3
—
V
VOL
Output LOW Voltage
VCC = Min., VIN = VIH or VIL
IOL = 24mA
—
0.3
0.55
V
VIH
Input HIGH Voltage
Guaranteed Logic HIGH Level
2.0
—
—
V
VIL
Input LOW Voltage
Guaranteed Logic LOW Level
—
—
0.8
V
IIH
Input HIGH Current
VCC = Max.
VIN = VCC (Input Pins)
—
—
±1
µA
IIL
Input LOW Current
VCC = Max.
VIN = GND (Input & I/O Pins)
—
—
±1
µA
IOZH
High Impedance
VCC = Max.
VOUT = 2.7V
—
—
±1
µA
IOZL
Output Current
(3-State Output Pins)
VOUT = 0.5V
—
—
±1
VIK
Clamp Diode Voltage
VCC = Min., IIN = –18mA
—
–0.7
–1.2
V
–60
–115
–150
mA
60
115
150
mA
(3)
IODH
Output HIGH Current
VCC = 5V, VIN =VIH or VIL, VOUT = 1.5V
IODL
Output LOW Current
VCC = 5V, VIN =VIH or VIL, VOUT = 1.5V(3)
IOS
Short Circuit Current(4) VCC = Max., VOUT = GND(4)
–80
–140
–225
mA
IOUT
Output Drive Current
–50
—
–180
mA
VH
Input Hysteresis
—
100
—
mV
VCC = Max., VOUT = 2.5V(3)
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25°C ambient and maximum loading.
3. This parameter is determined by device characterization but is not production tested.
4. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
3
PS2047B
03/22/99
PI74FCT162344T
Address/Clock
Driver
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Power Supply Characteristics
Parameters Description
Test Conditions(1)
Min.
Typ(2)
Max.
Units
ICC
Quiescent Power
Supply Current
VCC = Max.
VIN = GND or VCC
0.1
500
µA
∆ICC
Supply Current per
Input @ TTL HIGH
VCC = Max.
VIN = 3.4 V(3)
0.5
1.5
mA
ICCD
Supply Current per
Input per MHz(4)
VCC = Max.,
Outputs Open
OEX = GND
One Bit Toggling
50% Duty Cycle
VIN = VCC
VIN = GND
170
220
µA/
MHz
IC
Total Power Supply
Current(6)
VCC = Max.,
Outputs Open
fI = 10 MHZ
50% Duty Cycle
OEX = GND
One Bit Toggling
VIN = VCC
VIN = GND
1.7
2.7(5)
mA
VIN = 3.4 V
VIN = GND
2.0
3.5(5)
VCC = Max.,
Outputs Open
fI = 2.5 MHZ
50% Duty Cycle
OEX = GND
16 Bits Toggling
VIN = VCC
VIN = GND
3.4
4.9(5)
VIN = 3.4 V
VIN = GND
5.4
10.9(5)
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device.
2. Typical values are at Vcc = 5.0 V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4 V); all other inputs at Vcc or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the Icc formula. These limits are guaranteed but not tested.
6. IC =IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fCP/2 + fiNi)
ICC = Quiescent Current
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4 V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
fi = Input Frequency
Ni = Number of Inputs at fi
All currents are in milliamps and all frequencies are in megahertz.
4
PS2047B
03/22/99
PI74FCT162344T
Address/Clock
Driver
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Switching Characteristics over Operating Range
162344AT
162344CT
Com.
Parameters
162344ET
Com.
Com.
Description
Conditions(1)
Min
Max
Min
Max
Min
Max
Unit
tPLH
tPHL
Propagation Delay
AX to BX
CL = 50pF
RL = 500Ω
1.5
4.8
1.5
4.3
1.5
3.8
ns
tPZH
tPZL
Output Enable Time
OEX to BX
1.5
6.2
1.5
5.8
1.5
5.0
ns
tPHZ
tPLZ
Output Disable Time
OEX to BX
1.5
5.6
1.5
5.2
1.5
4.6
ns
tSK1(o)(3,5)
Output Skew
—
0.5
—
0.35
—
0.25
ns
tSK2(o)
Output Skew
—
0.5
—
0.5
—
0.3
ns
(4,5)
Notes:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Skew between outputs of the same bank and same package, switching in the same transition.
4. Skew between outputs of all banks of the same package with A1 through A8 tied together, switching in the same transition.
5. This parameter is guaranteed but not production tested.
Switch Position
Tests Circuits For All Outputs(1)
VCC
7.0V
Test
Switch
Disable LOW
Enable LOW
7V
All Other Tests
Open
500Ω
VIN
DEFINITIONS:
CL = Load capacitance: includes jig and probe
capacitance.
RT = Termination resistance: should be equal to
ZOUT of the Pulse Generator.
VOUT
Pulse
Generator
D.U.T.
50pF
RT
CL
500Ω
5
PS2047B
03/22/99
PI74FCT162344T
Address/Clock
Driver
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SWITCHING WAVEFORMS
Propagation Delay
Output Skew – tSK1(o), tSK2(o)
3V
3V
Input
Input
1.5V
0V
0V
tPHLx
tPLHx
tPHL
tPLH
1.5V
VOH
VOH
Output
Ox
1.5V
1.5V
VOL
VOL
tSK(o)
tSK(o)
VOH
Oy
Enable and Disable Times
Enable
VOL
tPLHy
OE
Note:
1.5V
tSK1(o) = Ox and Oy are in the same bank.
tSK21(o) = Ox and Oy are in a different bank on the same port.
0V
tPLZ
tPZL
3.5V
Switch
Closed
Switch
Open
3.5V
1.5V
0.3V
VOL
tPHZ
tPZH
Output
Normally
High
tPHLy
tSK(o) = | tPLHy – tPLHx | or | tPHLy – tPHLx |
Disable
3V
Output
Normally
Low
1.5V
0.3V
VOH
1.5V
0V
0V
Pericom Semiconductor Corporation
2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com
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PS2047B
03/22/99