SSDI SFF25P20S2ITXV

Solid State Devices, Inc.
SFF25P20 Series
14701 Firestone Blvd * La Mirada, Ca 90638
Phone: (562) 404-4474 * Fax: (562) 404-1773
[email protected] * www.ssdi-power.com
DESIGNER’S DATA SHEET
25 AMP / 200 Volts
150 mΩ typical
P-Channel MOSFET
Part Number/Ordering Information 1/
SFF25P20 ___ ___
│
└ Screening 2/
│
│
│
│
└
__ = Not Screened
TX = TX Level
TXV = TXV
S = S Level
Package
2/
S2I = SMD2 Isolated
M = TO-254
Features:
•
•
•
•
•
•
•
•
Maximum Ratings
polySi gate cell structure
Low ON-resistance
UIS (unclamped inductive switching) rated
Hermetically Sealed, Isolated Package
Low package inductance
Stress relief provided by flexible leads –
several options available
Improved (RDS(ON) QG) figure of merit
TX, TXV, S-Level screening available
Symbol
Value
Units
VDSS
-200
V
Continuous
transient
VGS
±20
±30
V
Max. Continuous Drain Current
@ TC = 25ºC
ID1
25
A
Max. Instantaneous Drain Current (Tj limited)
@ TC = 25ºC
ID3
95
A
Max. Avalanche current
IAR
25
A
Repetitive Avalanche Energy
EAR
30
mJ
PD
250
W
T OP & TSTG
-55 to +150
ºC
R0JC
0.83
0.6 typical
ºC/W
Drain - Source Voltage
Gate – Source Voltage
Total Power Dissipation
@ TC = 25ºC
Operating & Storage Temperature
Maximum Thermal Resistance
NOTES:
Junction to Case
SMD 2 Isolated
TO-254
1/ For ordering information, price, operating curves, and
availability- Contact factory.
2/ Screening based on MIL-PRF-19500. Screening flows
available on request.
3/ Unless otherwise specified, all electrical characteristics
@25ºC.
NOTE: SEE DASH# DEFINITION TABLE
FOR AVAILABLE LEAD FORMING
CONFIGURATION
NOTE: All specifications are subject to change without notification.
SCD's for these devices should be reviewed by SSDI prior to release.
DATA SHEET #: FT0009B
DOC
SFF25P20
series
Solid State Devices, Inc.
14701 Firestone Blvd * La Mirada, Ca 90638
Phone: (562) 404-7855 * Fax: (562) 404-1773
[email protected] * www.ssdi-power.com
Electrical Characteristics (@25oC, unless otherwise specified)
Symbol
Min
Typ
Max
Units
BVDSS
200
––
––
V
VGS = 10V, ID = 12A, Tj= 25 C
o
VGS = 10V, ID = 25A, Tj= 25 C
RDS(on)
––
––
125
150
150
––
mΩ
Gate Threshold Voltage
VDS = VGS, ID = 250μA
VGS(th)
3.0
––
5.0
V
Gate to Source Leakage
VGS = ±20V
IGSS
––
––
±100
nA
VDS = 160V, VGS = 0V, Tj = 25 C
o
VDS = 160V, VGS = 0V, Tj = 125 C
IDSS
––
––
––
––
25
1
μA
mA
VDS = 10V, ID = 24A, Tj = 25oC
gfs
5
12
––
Mho
Total Gate Charge
Gate to Source Charge
Gate to Drain Charge
VGS = 10V
VDS = 100V
ID = 12A
Qg
Qgs
Qgd
––
––
––
150
35
70
––
––
nC
Turn on Delay Time
Rise Time
Turn off Delay Time
Fall Time
Diode Forward Voltage
VGS = 10V
VDS = 100V
ID = 12A
RG = 4.7Ω
IF = 25A, VGS = 0V
td(on)
tr
td(off)
tf
––
––
––
––
––
35
30
70
30
2.0
––
––
––
––
3.0
Drain to Source Breakdown Voltage
VGS = 0V, ID = 250μA
o
Drain to Source On State Resistance
o
Zero Gate Voltage Drain Current
Forward Transconductance
Diode Reverse Recovery Time
Peak Reverse Recovery Current
Reverse Recovery Charge
IF = 24A, di/dt = 100A/usec
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
VGS = 0V
VDS = 25V
f = 1 MHz
VSD
trr
Ciss
Coss
Crss
––
––
––
––
250
4200
850
350
––
––
––
––
nsec
V
nsec
pF
NOTES: Pulse Test: Pulse Width = 300µsec, Duty Cycle = 2%.
NOTE: All specifications are subject to change without notification.
SCD's for these devices should be reviewed by SSDI prior to release.
DATA SHEET #: FT0009B
DOC
SFF25P20
series
Solid State Devices, Inc.
14701 Firestone Blvd * La Mirada, Ca 90638
Phone: (562) 404-7855 * Fax: (562) 404-1773
[email protected] * www.ssdi-power.com
TO-254 (M)
SMD2 Isolated
.50 MIN
.920
.50 MIN
2
1
.610
.290
3
.014
.006
.190
.160
A
3x .11±.02
.160
MAX
2x .050
.220
.570
.510
.610
TOLERANCES:
(UNLESS OTHERWISE SPECIFIED)
.XX ± .02
.XXX ± .010
LEAD FORMING CONFIGURATIONS
SMD1I dash#
-01
-02
-03
A
0.062”
0.000”
0.097”
NOTE: All specifications are subject to change without notification.
SCD's for these devices should be reviewed by SSDI prior to release.
.880
Package
SMD1I
PIN ASSIGNMENT (Standard)
Drain
Source
Pin 1
Pin 2
DATA SHEET #: FT0009B
Gate
Pin 3
DOC