SSM03N70GP-H
N-channel Enhancement-mode Power MOSFET
PRODUCT SUMMARY
BVDSS
700V
R DS(ON)
4.4Ω
ID
2.5A
DESCRIPTION
The SSM03N70GP-H achieves fast switching performance
with low gate charge without a complex drive circuit. It
is suitable for high voltage applications such as AC/DC
converters, SMPS and general off-line switching circuits.
Pb-free; RoHS-compliant TO-220
The SSM03N70GP-H is in TO-220 for through-hole
mounting where a small footprint is required on the board,
and/or an external heatsink is to be attached.
G
D
These devices are manufactured with an advanced process,
providing improved on-resistance and switching performance.
S
TO-220 (suffix P)
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Units
VDS
Drain-source voltage
700
V
VGS
Gate-source voltage
±30
V
ID
Continuous drain current, TC = 25°C
2.5
A
1.6
A
8
A
54
W
0.44
W/°C
32
mJ
2.5
A
TC = 100°C
1
IDM
Pulsed drain current
PD
Total power dissipation, TC = 25°C
Linear derating factor
3
EAS
Single pulse avalanche energy
IAR
Avalanche current
TSTG
Storage temperature range
-55 to 150
°C
TJ
Operating junction temperature range
-55 to 150
°C
THERMAL CHARACTERISTICS
Symbol
Parameter
Value
Units
RΘ JC
Maximum thermal resistance, junction-case
2.3
°C/W
RΘ JA
Maximum thermal resistance, junction-ambient
62
°C/W
Notes:
1. Pulse width must be limited to avoid exceeding the safe operating area.
2. Pulse width <300us, duty cycle <2%.
3. Starting Tj = 25°C, VDD=50V , L=1mH , RG=25Ω , IAS= 2.5A.
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SSM03N70GP-H
ELECTRICAL CHARACTERISTICS
Symbol
(at Tj = 25°C, unless otherwise specified)
Parameter
Test Conditions
Min.
Typ.
Max. Units
700
-
-
V
-
V/°C
BVDSS
Drain-source breakdown voltage
VGS=0V, ID= 1mA
∆ BV DSS/∆ Tj
Breakdown voltage temperature coefficient
Reference to 25°C, ID=1mA
-
0.6
RDS(ON)
Static drain-source on-resistance
VGS=10V, ID=1.6A
-
-
4.4
Ω
VGS(th)
Gate threshold voltage
VDS=VGS, ID=250uA
2
-
4
V
gfs
Forward transconductance
VDS=10V, ID=1.6A
-
2
-
S
IDSS
Drain-source leakage current
VDS=600V, VGS=0V
-
-
10
uA
VDS=480V ,VGS=0V, Tj = 150°C
-
-
100
uA
VGS=±30V
-
-
±100
nA
ID=1A
-
12
20
nC
IGSS
Gate-source leakage current
2
Qg
Total gate charge
Qgs
Gate-source charge
VDS=480V
-
3
-
nC
Qgd
Gate-drain ("Miller") charge
VGS=10V
-
4
-
nC
VDS=300V
-
8.5
-
ns
2
td(on)
Turn-on delay time
tr
Rise time
ID=2.5A
-
6
-
ns
td(off)
Turn-off delay time
RG=10Ω , VGS=10V
-
19
-
ns
tf
Fall time
RD=120Ω
-
8
-
ns
Ciss
Input capacitance
VGS=0V
-
590
950
pF
Coss
Output capacitance
VDS=25V
-
50
-
pF
Crss
Reverse transfer capacitance
f=1.0MHz
-
6
-
pF
Rg
Gate resistance
f=1.0MHz
-
3.4
5.1
Ω
Min.
Typ.
Source-Drain Diode
Symbol
Parameter
Test Conditions
Max. Units
VSD
Forward voltage 2
IS= 2.5A, VGS=0V
-
-
1.5
V
trr
Reverse recovery time
Is=2.5A, VGS=0V,
-
407
-
ns
Q rr
Reverse recovery charge
-
2110
-
nC
dI/dt=100A/µs
Notes:
1.Pulse width must be limited to avoid exceeding the maximum junction temperature of 150°C.
2.Pulse width <300us, duty cycle <2%.
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SSM03N70GP-H
4
3
10V
6.0V
o
T C =25 C
o
10V
5.0V
T C =150 C
2
ID , Drain Current (A)
ID , Drain Current (A)
3
2
5.0V
1
4.5V
2
4.5V
1
4.0V
1
V G =3.5V
V G =4.0V
0
0
0
5
10
15
20
25
0
5
Fig 1. Typical Output Characteristics
15
20
25
Fig 2. Typical Output Characteristics
1.2
3.0
I D =2.5A
V G =10V
Normalized RDS(ON)
1.1
Normalized BVDSS (V)
10
V DS , Drain-to-Source Voltage (V)
V DS , Drain-to-Source Voltage (V)
1.0
2.0
1.0
0.9
0.8
0.0
-50
0
50
100
150
-50
Fig 3. Normalized BVDSS vs. Junction
Temperature
10
4
IS (A)
VGS(th) (V)
5
T j = 25 o C
1
100
150
3
2
0.1
1
0.01
0.1
0.3
0.5
0.7
0.9
1.1
-50
1.3
Fig 5. Forward Characteristic of
Reverse Diode
0
50
100
150
T j , Junction Temperature ( o C)
V SD , Source-to-Drain Voltage (V)
9/29/2006 Rev.3.1
50
Fig 4. Normalized On-Resistance
vs. Junction Temperature
100
T j = 150 o C
0
T j , Junction Temperature ( o C)
T j , Junction Temperature ( o C)
f
Fig 6. Gate Threshold Voltage vs.
Junction Temperature
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SSM03N70GP-H
f=1.0MHz
10000
I D =1A
V DS =480V
12
C iss
C (pF)
VGS , Gate to Source Voltage (V)
16
8
100
C oss
4
C rss
0
1
0
5
10
15
1
5
9
13
17
21
25
29
V DS , Drain-to-Source Voltage (V)
Q G , Total Gate Charge (nC)
Fig 7. Gate Charge Characteristics
Fig 8. Typical Capacitance Characteristics
10
Normalized Thermal Response (Rthjc)
1
100us
1
ID (A)
1ms
10ms
100ms
DC
0.1
o
T c =25 C
Single Pulse
0.01
Duty factor=0.5
0.2
0.1
0.1
0.05
0.02
PDM
0.01
t
T
Single Pulse
Duty factor = t/T
Peak Tj = PDM x Rthjc + T C
0.01
1
10
100
1000
10000
0.00001
0.0001
V DS , Drain-to-Source Voltage (V)
Fig 9. Maximum Safe Operating Area
0.001
0.01
0.1
1
10
t , Pulse Width (s)
Fig 10. Effective Transient Thermal Impedance
VG
VDS
90%
QG
10V
QGS
QGD
10%
VGS
td(on) tr
td(off) tf
Fig 11. Switching Time Waveform
9/29/2006 Rev.3.1
Charge
Q
Fig 12. Gate Charge Waveform
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SSM03N70GP-H
PHYSICAL DIMENSIONS - TO-220
E
A
Millimeters
SYMBOLS
φ
L2
L5
c1
D
L4
b1
L3
MIN
NOM
MAX
A
4.25
4.48
4.70
b
b1
c
c1
0.65
0.80
0.90
1.15
1.38
1.60
0.40
0.50
0.60
1.00
1.20
1.40
E
9.70
10.00
10.40
e
----
2.54
----
L
12.70
13.60
14.50
L1
2.60
2.80
3.00
L2
1.00
1.40
1.80
L3
2.6
3.10
3.6
L4
14.70
15.50
16
L5
6.30
6.50
6.70
φ
3.50
3.60
3.70
D
8.40
8.90
9.40
L1
L
1. All dimensions are in millimeters.
2. Dimensions do not include mold protrusions.
c
b
e
PART MARKING - TO-220
PACKING:
Moisture sensitivity level MSL3
1000pcs in tubes packed inside a
moisture barrier bag (MBB).
03N70GP-H
PART NUMBER: 03N70GP-H = SSM03N70GP-H
YWWSSS
DATE/LOT CODE:
Y = last digit of the year
WW = work week (01 -> 52)
SSS = lot code sequence
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no
guarantee or warranty, expressed or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no
responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its
use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including
without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to
the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of
Silicon Standard Corporation or any third parties.
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