TRF7610 SILICON MOSFET POWER AMPLIFIER IC FOR GSM SLWS059B – MAY 1997 – REVISED AUGUST 1998 D D D D D D D D D D D D D Single Positive Power Supply (No Negative Voltage Required) Advanced Silicon RFMOS Technology 4.8-V Operation for GSM Applications 35-dBm Typical Output Power 30-dB Typical Power Gain 40% Typical PAE with 5-dBm Input Power 45% Typical PAE with 8-dBm Input Power Output Power Control Few External Components Required for Operation Thermally Enhanced Surface-Mount Package for Small Circuit Footprint Rugged, Sustains 20:1 Load Mismatch 800-MHz to 1000-MHz Wide Operational Frequency Range Low Standby Current (< 10 µA) PWP PACKAGE (TOP VIEW) VG2 VG3 VPC VG1 NC RFIN RFIN NC VG1 VPC VG3 VG2 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 VD1/VD2 GND RFOUT/VD3 RFOUT/VD3 RFOUT/VD3 RFOUT/VD3 RFOUT/VD3 RFOUT/VD3 RFOUT/VD3 RFOUT/VD3 GND VD1/VD2 NC – No internal connection description The TRF7610 is a silicon MOSFET power amplifier IC for 900-MHz applications, tailored specifically for global systems for mobile communications (GSM). It uses Texas Instruments RFMOS process and consists of a three-stage amplifier with output power control. Few external components are required for operation. The TRF7610 amplifies the RF signal from a preceding modulator and the upconverter stages in an RF section of a transmitter to a level that is sufficient for connection to the antenna. The RF input port, RFIN, and the RF output port, RFOUT, require simple external matching networks. A control signal applied to the VPC input can ramp the RF output power up or down to meet ramp and spurious emission specifications for time-division multiple-access (TDMA) systems. The power control signal causes a change in output power as the voltage applied to VPC varies between 0 V and 3 V. With the RF input power applied to RFIN at 5 dBm, adjusting VPC from 0 V to 3 V increases the output power from a typical value of – 43 dBm at VPC = 0 V to a typical value of 35 dBm at VPC = 3 V. Forward isolation with the RF input power applied to RFIN at 5 dBm, VPC = 0 V, is typically 48 dB. The TRF7610 is available in a thermally enhanced, surface-mount, 24-pin PowerPAD (PWP) thin-shrink small-outline package (TSSOP). It is characterized for operation from – 40°C to 85°C operating free-air temperature. In order to maintain acceptable thermal operating conditions, the device should be operated in pulse applications such as the GSM standard 1/8 duty cycle. The package has a solderable pad that improves the package thermal performance by bonding the pad to an external thermal plane. The pad also acts as a low-inductance electrical path to ground and must be electrically connected to the printed circuit-board (PCB) ground plane as a continuation of the regular package terminals that are designated GND. These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. RFMOS and PowerPAD are trademarks of Texas Instruments Incorporated. Copyright 1998, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 TRF7610 SILICON MOSFET POWER AMPLIFIER IC FOR GSM SLWS059B – MAY 1997 – REVISED AUGUST 1998 schematic VD1/VD2 13, 24 15 – 22 6, 7 RFOUT/VD3 RFIN 3 or 10 VPC 4 or 9 1, 12 VG1 VG2 2 or 11 VG3 Terminal Functions TERMINAL NAME GND NC RFIN NO. I/O DESCRIPTION 14, 23 Analog ground for all internal circuits. All signals are referenced to the ground terminals. 5, 8 No internal connection. It is recommended that all NC terminals be connected to ground. 6, 7 I 15, 16, 17, 18, 19, 20, 21, 22 I/O VG1 4, 9 I First-stage gate bias set by resistor. Either terminal may be used or both may be connected externally. VG2 1, 12 I Second-stage gate bias set by resistor. These terminals must be connected externally. VG3 2, 11 I Third-stage gate bias set by resistor. Either terminal may be used or both may be connected externally. VPC 3, 10 I Voltage power control. VPC is a signal between 0 V and 3 V that adjusts the output power from a typical value of – 43 dBm to 35 dBm. Either terminal may be used, or both may be connected externally. VD1/ VD2 13, 24 I First- and second-stage drain bias. These terminals must be connected externally. RFOUT/ VD3 RF input. RFIN accepts signals between 800 MHz and 1000 MHz. RF output and third-stage drain bias. RFOUT requires an external matching network. absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VDD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.6 V to 8 V Input voltage range, VPC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.6 V to 4 V Input power at RFIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 dBm Thermal resistance, junction to case, RθJC (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.5°C/W Junction temperature, TJmax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 85°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. Voltage values are with respect to GND. 2. No air flow and with infinite heatsink 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TRF7610 SILICON MOSFET POWER AMPLIFIER IC FOR GSM SLWS059B – MAY 1997 – REVISED AUGUST 1998 recommended operating conditions PARAMETER Supply voltage VDD (see Note 1 and Note 3) MIN NOM MAX 3.5 4.8 6 UNIT V °C Operating free-air temperature, TA – 40 85 Operating frequency range (see Note 4) 800 1000 MHz MAX UNIT NOTES: 1. Voltage values are with respect to GND. 3 .Performance varies with drain voltage, see Figure 8. 4. External matching network dependent. electrical characteristics over full range of recommended operating conditions supply current, VDD = 4.8 V PARAMETER IDD Supply current TEST CONDITIONS Operating at maximum output power Operating with no RF input power † Typical values are at TA = 25°C MIN TYP† VPC = 3 V 2 A VPC = 0 V < 10 µA GSM operation, VDD = 4.8 V, VPC = 3 V, PI = 5 dBm, TA = 25°C (unless otherwise noted)‡ PARAMETER TEST CONDITIONS Operating frequency range MIN TYP 870 VPC = 3 V Output power 34 VPC = 0 V 35 MAX UNIT 925 MHz 36 – 43 dBm 40% Power added efficiency (PAE) Input return loss (externally matched, small signal) 2f0 3f0 Harmonics Noise power in 30-kHz bandwidth PI = 8 dBm PI = – 20 dBm 45% With external matching – 28 With external matching – 40 10 20 MHz above f0 – 88 10 MHz above f0 – 88 Frequency = 900 MHz, Load VSWR = 20:1, All phase angles Ruggedness test dB dBc dBm § ‡ Specific applications circuit § No degradation in output power after test. stability, GSM operation PARAMETER TEST CONDITIONS Output VSWR¶ < 6:1 all phases, VDD < 6 V, PI = 5 dBm, PO ≤ 35 dBm, Output frequency band: 200 MHz – 1200 MHz Stability MIN TYP MAX UNIT No parasitic oscillations (all spurious < –70 dBc) ¶ VSWR = voltage standing wave ratio switching characteristics GSM operation PARAMETER ton toff TEST CONDITIONS MIN TYP MAX UNIT Switching time, RF output OFF to ON VPC stepped from 0 V to 3 V 2 µs Switching time, RF output ON to OFF VPC stepped from 3 V to 0 V 2 µs POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 TRF7610 SILICON MOSFET POWER AMPLIFIER IC FOR GSM SLWS059B – MAY 1997 – REVISED AUGUST 1998 APPLICATION INFORMATION In all cases, a capacitor must be connected from the positive power supply to ground as close to the terminals as possible for power-supply bypassing. The dc-blocking capacitors are required on the RF input and RF output. A list of components and their functions is shown in Table 1. TRF7610 1 VG2 VD1/VD2 24 2 VG3 GND VPC RFOUT/VD3 VG1 RFOUT/VD3 VD1/VD2 + C11 C4 23 R1 3 4 22 21 VD3 5 NC RFOUT/VD3 20 C5 + C10 6 RFIN RFOUT/VD3 C3 L2 19 50 Ω 245 mil RFIN RFOUT C1 7 R4 L1 8 RFIN RFOUT/VD3 NC RFOUT/VD3 VG1 RFOUT/VD3 VPC RFOUT/VD3 VG3 GND VG2 VD1/VD2 18 C8 17 C2 9 16 C6 R2 10 VPC C12 15 R5 11 12 14 13 C7 R3 Figure 1. Typical GSM Cellular Telephone Application 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 C9 TRF7610 SILICON MOSFET POWER AMPLIFIER IC FOR GSM SLWS059B – MAY 1997 – REVISED AUGUST 1998 Table 1. External Component Selection COMPONENT DESIGNATION TYPICAL VALUE C1 100 pF DC blocking capacitor C2 100 pF Matching capacitor C3 330 µF Drain-bias decoupling capacitor C4 0.033 µF Drain-bias decoupling capacitor C5, C6 FUNCTION 22 pF High-Q matching capacitor 0.033 µF C7 Drain-bias decoupling capacitor C8 11 pF C9 100 pF High-Q matching capacitor DC blocking capacitor C10 100 pF Drain-bias decoupling capacitor C11 100 µF Drain-bias decoupling capacitor C12 100 pF Decoupling capacitor R1 2200 Ω Gate-bias setting resistor R2, R3 5100 Ω Gate-bias setting resistor 3.9 Ω Matching resistor R5 51 Ω Vpc termination resistor L1 2.7 nH Matching inductor L2 18.5 nH high-current inductor or λ /4 microstrip line† Drain bias inductor R4 † On a FR4 substrate with ∈r of 4.3, a λ /4 50 Ω line is 40 mm. design philosophy The TRF7610 is a three-stage integrated power amplifier for use in cellular phone handsets. The device and applications board are optimized to operate under 900-MHz, 4.8-V GSM conditions. External matching networks provide design flexibility in centering the frequency response from 800 to 1000 MHz. Typical performance at 900 MHz, driven by a 5-dBm GSM signal, is 30 dB of power gain, 35 dBm output power, and 40 percent PAE. Discrete component selection was made to optimize output power, gain, pulse flatness in the GSM pulse window, and PAE. Where possible, size and cost goals were considered: the smallest, least expensive components available were included in the applications board design. Some of the components, however, were chosen for their ability to increase performance. The following sections explain the design options and compromises to consider when substituting parts of differents types and values. output matching network The output matching network provides the majority of the design flexibility. First, the shunt capacitors, C5, C6, and C8 are American Technical Ceramics high-Q capacitors, which increase performance. The ATC capacitors achieve a 0.4-dB increase in output power and a 3-percent increase in PAE compared to the performance achieved using 0402-sized capacitors. However, if size and cost are more important, 0402-sized capacitors can be used, while sacrificing the performance gains achieved using the high-Q capacitors. Second, the dc bias network on the amplifier output stage, designed using a Coilcraft 18.5 nH high-current inductor (L 2), minimizes the board layout area. An alternative to this high-current inductor is a quarter-wave stub with a bias decoupling capacitor to ground (C10, C3). On the FR4 board with ∈r = 4.3, a quarter-wave stub at 900 MHz is 40 mm in length. One advantage that the quarter-wave stub offers over the inductor is improved second harmonic suppression. The inductor offers a much smaller footprint; however, it does sacrifice 10 dB POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 TRF7610 SILICON MOSFET POWER AMPLIFIER IC FOR GSM SLWS059B – MAY 1997 – REVISED AUGUST 1998 of second harmonic suppression. The PAE is only slightly affected: it is reduced by approximately 1 percent compared to the quarter-wave stub. The system designer must decide if size or performance is of greatest concern. The 330 µF bias decoupling capacitors, C3 and C11, provide pulse flatness in the GSM application. These surface mount capacitors provide a gain slope of – 0.4 dB over the duration of the GSM duty cycle. If that is not acceptable, the performance can be improved by adding a larger value capacitor in parallel with the two existing capacitors. Measured results, using a standard 4700 µF electrolytic taken from a cellular phone, is – 0.1 dB of gain slope for the duration of the GSM duty cycle. Capacitor size considerations must be decided by the system designer. dc bias network The dc bias network consists of resistors R1, R2, R3, and R5, which set the gate bias voltage of the device. R1, R2, and R3 are used as voltage divider resistors which set the gate voltages at approximately 1.7 V. Resistor R5 is a 51 Ω termination resistor that is needed only for a 50 Ω pulse generator. When a high-impedance pulse generator is used, the 51 Ω resistor can be omitted as it is not necessary for device function. 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TRF7610 SILICON MOSFET POWER AMPLIFIER IC FOR GSM SLWS059B – MAY 1997 – REVISED AUGUST 1998 TYPICAL CHARACTERISTICS POWER ADDED EFFICIENCY vs INPUT POWER POWER ADDED EFFICIENCY vs FREQUENCY 50 50 PAE – Power Added Efficiency – % PAE – Power Added Efficiency – % 45 55 Frequency = 900 MHz VDD = 4.8 V VPC = 3 V Pulsed 40 35 TA = –40°C 30 25 TA = 25°C 20 TA = 85°C 15 10 5 TA = –40°C 45 TA = 25°C 40 35 30 TA = 85°C 25 20 15 PI = 5 dBm VDD = 4.8 V VPC = 3 V Pulsed 10 0 –20 –10 –15 –5 0 5 5 850 860 870 880 890 900 910 920 930 940 950 10 f – Frequency – MHz PI – Input Power – dBm Figure 3 Figure 2 POWER ADDED EFFICIENCY vs DRAIN VOLTAGE POWER ADDED EFFICIENCY vs POWER CONTROL VOLTAGE 60 50 Frequency = 900 MHz VDD = 4.8 V PI = 5 dBm 50 PAE – Power Added Efficiency – % PAE – Power Added Efficiency – % 45 TA = –40°C TA = 25°C 40 30 TA = 85°C 20 Frequency = 900 MHz PI = 5 dBm VPC = 3 V Pulsed 10 5 2.5 3 3.5 4 4.5 5 5.5 40 TA = 85°C 35 30 TA = 25°C 25 TA = –40°C 20 15 10 5 0 6 –5 0 0.5 VDD – Drain Voltage – V Figure 4 1.5 2 2.5 1 VPC – Power Control Voltage – V 3 Figure 5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 TRF7610 SILICON MOSFET POWER AMPLIFIER IC FOR GSM SLWS059B – MAY 1997 – REVISED AUGUST 1998 TYPICAL CHARACTERISTICS OUTPUT POWER vs FREQUENCY OUTPUT POWER vs INPUT POWER 40 TA = –40°C TA = –40°C 30 25 TA = 25°C 20 TA = 85°C 15 10 5 0 –20 36 TA = 25°C 35 34 TA = 85°C 33 32 31 –15 –10 –5 0 5 30 850 860 870 880 890 900 910 920 930 940 950 10 f – Frequency – MHz PI – Input Power – dBm Figure 6 Figure 7 OUTPUT POWER vs DRAIN VOLTAGE OUTPUT POWER vs POWER CONTROL VOLTAGE 40 40 Frequency = 900 MHz VDD = 4.8 V VPC = 3 V Pulsed TA = –40°C 30 30 TA = 25°C 25 20 15 10 0 2.5 Frequency = 900 MHz PI = 5 dBm VPC = 3 V Pulsed 20 10 TA = 25°C 0 TA = 85°C –10 –20 –30 3 3.5 4 4.5 5 5.5 6 0 0.5 VDD – Drain Voltage – V 1 1.5 Figure 9 POST OFFICE BOX 655303 2 2.5 VPC – Power Control Voltage – V Figure 8 8 TA = –40°C TA = 85°C PO – Output Power – dBm PO – Output Power – dBm 35 5 PI = 5 dBm VDD = 4.8 V VPC = 3 V Pulsed 37 PO – Output Power – dBm PO – Output Power – dBm 35 38 Frequency = 900 MHz VDD = 4.8 V VPC = 3 V Pulsed • DALLAS, TEXAS 75265 3 TRF7610 SILICON MOSFET POWER AMPLIFIER IC FOR GSM SLWS059B – MAY 1997 – REVISED AUGUST 1998 TYPICAL CHARACTERISTICS INPUT RETURN LOSS vs FREQUENCY 0 S11 – Input Return Loss – dB –2 VDD = 4.8 V VPC = 3 V PI = 5 dBm TA = 25°C Matched Application Board –4 –6 –8 –10 –12 700 800 900 1000 1100 f – Frequency – MHz Figure 10 SMALL SIGNAL GAIN vs FREQUENCY 50 S21 – Small Signal Gain – dB 45 40 TA = –40°C TA = 25°C 35 30 25 TA = 85°C 20 15 10 5 VDD = 4.8 V VPC = 3 V Matched Application Board 0 850 860 870 880 890 900 910 920 930 940 950 f – Frequency – MHz Figure 11 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 TRF7610 SILICON MOSFET POWER AMPLIFIER IC FOR GSM SLWS059B – MAY 1997 – REVISED AUGUST 1998 MECHANICAL DATA PWP (R-PDSO-G**) PowerPAD PLASTIC SMALL-OUTLINE PACKAGE 0,30 0,19 0,65 20 0,10 M Thermal Pad (3,18 (see Note C) 11 2,41 NOM) 0,15 NOM 6,60 6,20 4,50 4,30 Gage Plane 0,25 1 10 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 14 16 20 24 28 A MAX 5,10 5,10 6,60 7,90 9,80 A MIN 4,90 4,90 6,40 7,70 9,60 DIM 4073225/E 03/97 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. The package thermal performance may be enhanced by bonding the thermal pad to an external thermal plane. This solderable pad is electrically and thermally connected to the backside of the die. 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER’S RISK. In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, warranty or endorsement thereof. Copyright 1998, Texas Instruments Incorporated