UA741 GENERAL PURPOSE SINGLE OPERATIONAL AMPLIFIER ■ LARGE INPUT VOLTAGE RANGE ■ NO LATCH-UP ■ HIGH GAIN ■ SHORT-CIRCUIT PROTECTION ■ NO FREQUENCY COMPENSATION ■ REQUIRED N DIP8 (Plastic Package) ■ SAME PIN CONFIGURATION AS THE UA709 DESCRIPTION The UA741 is a high performance monolithic operational amplifier constructed on a single silicon chip. It is intented for a wide range of analog applications. D SO8 (Plastic Micropackage) ■ Summing amplifier ■ Voltage follower ORDER CODE ■ Integrator Package Part Number ■ Active filter ■ Function generator The high gain and wide range of operating voltages provide superior performances in integrator, summing amplifier and general feedback applications. The internal compensation network (6dB/ octave) insures stability in closed loop circuits. Temperature Range UA741C 0°C, +70°C UA741I -40°C, +105°C UA741M -55°C, +125°C Example : UA741CN N D • • • • • • N = Dual in Line Package (DIP) D = Small Outline Package (SO) - also available in Tape & Reel (DT) PIN CONNECTIONS (top view) 1 8 2 7 3 6 4 5 November 2001 1 - Offset null 1 2 - Inverting input 3 - Non-inverting input 4 - VCC5 - Offset null 2 6 - Output 7 - VCC+ 8 - N.C. 1/5 UA741 SCHEMATIC DIAGRAM Non-Inverting input Vcc+ Q8 Q12 Q9 Q13 Inverting input Q1 Q2 C1 30pF Q14 R7 4.5kΩ Q18 Q3 R5 39kΩ Q4 Q15 R9 25Ω R8 7.5kΩ Output R10 50Ω Q16 Q7 Q17 Q20 Q5 Q10 Q6 Q11 Q22 Offset null 1 R3 50kΩ R1 1kΩ R2 1kΩ R4 5kΩ R12 50kΩ R11 50Ω Vcc- Offset null 2 ABSOLUTE MAXIMUM RATINGS Symbol Parameter UA741C Unit Supply voltage ±22 V Vid Differential Input Voltage ±30 V Vi Input Voltage ±15 V 500 mW 1) Power Dissipation Output Short-circuit Duration Toper Operating Free-air Temperature Range Tstg Storage Temperature Range 2/5 UA741I VCC Ptot 1. UA741M Infinite -55 to +125 -40 to +105 -65 to +150 Power dissipation must be considered to ensure maximum junction temperature (Tj) is not exceeded. 0 to +70 °C °C UA741 ELECTRICAL CHARACTERISTICS VCC = ±15V, Tamb = +25°C (unless otherwise specified) Symbol Parameter Min. Typ. Max. Vio Input Offset Voltage (Rs ≤ 10kΩ) Tamb = +25°C Tmin ≤ Tamb ≤ Tmax 1 5 6 Iio Input Offset Current Tamb = +25°C T min ≤ Tamb ≤ Tmax 2 30 70 Iib Input Bias Current Tamb = +25°C Tmin ≤ Tamb ≤ Tmax 10 100 200 Avd Large Signal Voltage Gain (Vo = ±10V, R L = 2kΩ) Tamb = +25°C Tmin ≤ Tamb ≤ Tmax 50 25 200 SVR Supply Voltage Rejection Ratio (Rs ≤ 10kΩ) Tamb = +25°C Tmin ≤ Tamb ≤ Tmax 77 77 90 mV nA nA V/mV dB ICC Supply Current, no load Tamb = +25°C T min ≤ Tamb ≤ Tmax Vicm Input Common Mode Voltage Range Tamb = +25°C Tmin ≤ Tamb ≤ Tmax CMR Common Mode Rejection Ratio (RS ≤ 10kΩ) Tamb = +25°C Tmin ≤ Tamb ≤ Tmax 70 70 90 Output short Circuit Current 10 25 12 10 12 10 14 13 0.25 0.5 IOS Output Voltage Swing Tamb = +25°C ±Vopp SR tr Tmin ≤ Tamb ≤ Tmax mA 1.7 V RL RL RL RL dB = 10kΩ = 2kΩ = 10kΩ = 2kΩ Slew Rate Vi = ±10V, R L = 2kΩ, CL = 100pF, unity Gain 40 mA V V/µs µs Rise Time Vi = ±20mV, R L = 2kΩ, CL = 100pF, unity Gain 0.3 Overshoot Vi = 20mV, RL = 2kΩ, CL = 100pF, unity Gain Ri Input Resistance 0.3 2 GBP Gain Bandwith Product Vi = 10mV, R L = 2kΩ, CL = 100pF, f =100kHz 0.7 1 THD Total Harmonic Distortion f = 1kHz, Av = 20dB, R L = 2kΩ, Vo = 2V pp, C L = 100pF,Tamb = +25°C ∅m 2.8 3.3 ±12 ±12 Kov en Unit % 5 MΩ MHz % 0.06 Equivalent Input Noise Voltage f = 1kHz, Rs = 100Ω 23 nV -----------Hz Phase Margin 50 Degrees 3/5 UA741 PACKAGE MECHANICAL DATA 8 PINS - PLASTIC DIP Millimeters Inches Dim. Min. A a1 B b b1 D E e e3 e4 F i L Z 4/5 Typ. Max. Min. 3.32 0.51 1.15 0.356 0.204 0.020 0.045 0.014 0.008 0.065 0.022 0.012 0.430 0.384 0.313 2.54 7.62 7.62 3.18 Max. 0.131 1.65 0.55 0.304 10.92 9.75 7.95 Typ. 0.100 0.300 0.300 6.6 0260 5.08 3.81 1.52 0.200 0.150 0.060 0.125 UA741 PACKAGE MECHANICAL DATA 8 PINS - PLASTIC MICROPACKAGE (SO) s b1 b a1 A a2 C c1 a3 L E e3 D M 5 1 4 F 8 Millimeters Inches Dim. Min. A a1 a2 a3 b b1 C c1 D E e e3 F L M S Typ. Max. Min. Typ. Max. 0.1 1.75 0.25 1.65 0.004 0.069 0.010 0.065 0.65 0.35 0.19 0.25 0.85 0.48 0.25 0.5 0.026 0.014 0.007 0.010 0.033 0.019 0.010 0.020 4.8 5.8 5.0 6.2 0.189 0.228 0.197 0.244 45° (typ.) 1.27 3.81 3.8 0.4 0.050 0.150 4.0 1.27 0.6 0.150 0.016 0.157 0.050 0.024 8° (max.) Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibil ity for the consequences of use of such information nor for any infring ement of patents or other righ ts of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change witho ut notice. This publ ication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life suppo rt devices or systems withou t express written approval of STMicroelectronics. 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