µA741, µA741Y GENERAL-PURPOSE OPERATIONAL AMPLIFIERS SLOS094B – NOVEMBER 1970 – REVISED SEPTEMBER 2000 D D D D D D D Short-Circuit Protection Offset-Voltage Null Capability Large Common-Mode and Differential Voltage Ranges No Frequency Compensation Required Low Power Consumption No Latch-Up Designed to Be Interchangeable With Fairchild µA741 description The µA741 is a general-purpose operational amplifier featuring offset-voltage null capability. µA741M . . . J PACKAGE (TOP VIEW) NC NC OFFSET N1 IN – IN + VCC – NC OFFSET N1 IN – IN + VCC – The µA741C is characterized for operation from 0°C to 70°C. The µA741I is characterized for operation from – 40°C to 85°C.The µA741M is characterized for operation over the full military temperature range of – 55°C to 125°C. NC OFFSET N1 IN – IN + VCC – 13 3 12 4 11 5 10 6 9 7 8 NC NC NC VCC + OUT OFFSET N2 NC 1 8 2 7 3 6 4 5 NC VCC+ OUT OFFSET N2 µA741M . . . U PACKAGE (TOP VIEW) symbol 1 10 2 9 3 8 4 7 5 6 NC NC VCC + OUT OFFSET N2 µA741M . . . FK PACKAGE (TOP VIEW) NC OFFSET N1 NC NC NC OFFSET N1 + OUT IN – 14 2 µA741M . . . JG PACKAGE µA741C, µA741I . . . D, P, OR PW PACKAGE (TOP VIEW) The high common-mode input voltage range and the absence of latch-up make the amplifier ideal for voltage-follower applications. The device is short-circuit protected and the internal frequency compensation ensures stability without external components. A low value potentiometer may be connected between the offset null inputs to null out the offset voltage as shown in Figure 2. IN + 1 – OFFSET N2 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 NC VCC + NC OUT NC NC VCC– NC OFFSET N2 NC NC IN – NC IN + NC NC – No internal connection Copyright 2000, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 µA741, µA741Y GENERAL-PURPOSE OPERATIONAL AMPLIFIERS SLOS094B – NOVEMBER 1970 – REVISED SEPTEMBER 2000 AVAILABLE OPTIONS PACKAGED DEVICES SMALL OUTLINE (D) TA CHIP CARRIER (FK) CERAMIC DIP (J) CERAMIC DIP (JG) PLASTIC DIP (P) TSSOP (PW) µA741CPW 0°C to 70°C µA741CD µA741CP – 40°C to 85°C µA741ID µA741IP – 55°C to 125°C µA741MFK µA741MJ µA741MJG FLAT PACK (U) CHIP FORM (Y) µA741Y µA741MU The D package is available taped and reeled. Add the suffix R (e.g., µA741CDR). schematic VCC+ IN – OUT IN+ OFFSET N1 OFFSET N2 VCC – Component Count Transistors Resistors Diode Capacitor 2 POST OFFICE BOX 655303 22 11 1 1 • DALLAS, TEXAS 75265 µA741, µA741Y GENERAL-PURPOSE OPERATIONAL AMPLIFIERS SLOS094B – NOVEMBER 1970 – REVISED SEPTEMBER 2000 µA741Y chip information This chip, when properly assembled, displays characteristics similar to the µA741C. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive epoxy or a gold-silicon preform. BONDING PAD ASSIGNMENTS (7) (6) IN + (3) (2) IN – (8) OFFSET N1 (1) OFFSET N2 (5) VCC+ (7) + (6) OUT – (4) VCC – 45 (5) (1) (4) CHIP THICKNESS: 15 TYPICAL BONDING PADS: 4 × 4 MINIMUM TJmax = 150°C. (2) (3) TOLERANCES ARE ± 10%. ALL DIMENSIONS ARE IN MILS. 36 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 µA741, µA741Y GENERAL-PURPOSE OPERATIONAL AMPLIFIERS SLOS094B – NOVEMBER 1970 – REVISED SEPTEMBER 2000 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† µA741C µA741I µA741M UNIT Supply voltage, VCC+ (see Note 1) 18 22 22 V Supply voltage, VCC – (see Note 1) –18 – 22 – 22 V Differential input voltage, VID (see Note 2) ±15 ±30 ±30 V Input voltage, VI any input (see Notes 1 and 3) ±15 ±15 ±15 V Voltage between offset null (either OFFSET N1 or OFFSET N2) and VCC – ±15 ±0.5 ±0.5 V Duration of output short circuit (see Note 4) unlimited Continuous total power dissipation unlimited unlimited See Dissipation Rating Table 0 to 70 – 40 to 85 – 55 to 125 °C – 65 to 150 – 65 to 150 Operating free-air temperature range, TA – 65 to 150 °C Case temperature for 60 seconds FK package 260 °C Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds J, JG, or U package 300 °C Storage temperature range Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds D, P, or PW package 260 260 °C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, unless otherwise noted, are with respect to the midpoint between VCC+ and VCC – . 2. Differential voltages are at IN+ with respect to IN –. 3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 V, whichever is less. 4. The output may be shorted to ground or either power supply. For the µA741M only, the unlimited duration of the short circuit applies at (or below) 125°C case temperature or 75°C free-air temperature. DISSIPATION RATING TABLE 4 PACKAGE TA ≤ 25°C POWER RATING DERATING FACTOR D 500 mW 5.8 mW/°C DERATE ABOVE TA 64°C 464 mW 377 mW N/A FK 500 mW 11.0 mW/°C 105°C 500 mW 500 mW 275 mW J 500 mW 11.0 mW/°C 105°C 500 mW 500 mW 275 mW JG 500 mW 8.4 mW/°C 90°C 500 mW 500 mW 210 mW P 500 mW N/A N/A 500 mW 500 mW N/A PW 525 mW 4.2 mW/°C 25°C 336 mW N/A N/A U 500 mW 5.4 mW/°C 57°C 432 mW 351 mW 135 mW POST OFFICE BOX 655303 TA = 70°C POWER RATING • DALLAS, TEXAS 75265 TA = 85°C POWER RATING TA = 125°C POWER RATING µA741, µA741Y GENERAL-PURPOSE OPERATIONAL AMPLIFIERS SLOS094B – NOVEMBER 1970 – REVISED SEPTEMBER 2000 electrical characteristics at specified free-air temperature, VCC± = ±15 V (unless otherwise noted) PARAMETER TEST CONDITIONS VIO Input offset voltage VO = 0 ∆VIO(adj) Offset voltage adjust range VO = 0 IIO Input offset current VO = 0 IIB Input bias current VO = 0 VICR Common-mode input voltage range VOM Maximum peak output voltage swing TA† µA741C MIN 25°C 1 Full range 25°C ± 15 25°C 20 Full range 25°C 80 Full range ± 12 RL = 10 kΩ 25°C ± 12 RL ≥ 10 kΩ Full range ± 12 RL = 2 kΩ 25°C ± 10 RL ≥ 2 kΩ Full range ± 10 RL ≥ 2 kΩ VO = ±10 V 25°C 20 Full range 15 25°C 0.3 ri Input resistance ro Output resistance Ci Input capacitance CMRR Common-mode rejection j ratio VIC = VICRmin kSVS Supply y voltage g sensitivity y (∆VIO /∆VCC) VCC = ± 9 V to ± 15 V IOS Short-circuit output current See Note 5 ICC Supply current VO = 0 0, No load PD Total power dissipation VO = 0 0, No load 6 TYP MAX 1 5 6 ± 15 200 20 500 80 ± 13 500 1500 ± 12 ± 13 ± 12 ± 10 nA nA ± 14 ± 12 ± 13 mV V ± 12 ± 14 UNIT mV 200 500 800 ± 12 Large-signal g g differential voltage amplification MIN 300 Full range AVD µA741I, µA741M MAX 7.5 25°C VO = 0, TYP V ± 13 ± 10 200 50 200 V/mV 25 2 0.3 2 MΩ 25°C 75 75 Ω 25°C 1.4 1.4 pF 25°C 70 Full range 70 90 70 90 dB 70 25°C 30 Full range 150 30 150 150 150 25°C ± 25 ± 40 ± 25 ± 40 25°C 1.7 2.8 1.7 2.8 Full range 3.3 25°C 50 Full range 3.3 85 50 100 85 100 µV/V mA mA mW † All characteristics are measured under open-loop conditions with zero common-mode input voltage unless otherwise specified. Full range for the µA741C is 0°C to 70°C, the µA741I is – 40°C to 85°C, and the µA741M is – 55°C to 125°C. NOTE 5: This typical value applies only at frequencies above a few hundred hertz because of the effects of drift and thermal feedback. operating characteristics, VCC± = ±15 V, TA = 25°C PARAMETER tr Rise time Overshoot factor SR Slew rate at unity gain TEST CONDITIONS VI = 20 mV,, CL = 100 pF, RL = 2 kΩ,, See Figure 1 VI = 10 V, CL = 100 pF, RL = 2 kΩ, See Figure 1 POST OFFICE BOX 655303 µA741C MIN • DALLAS, TEXAS 75265 TYP µA741I, µA741M MAX MIN TYP 0.3 0.3 5% 5% 0.5 0.5 MAX UNIT µs V/µs 5 µA741, µA741Y GENERAL-PURPOSE OPERATIONAL AMPLIFIERS SLOS094B – NOVEMBER 1970 – REVISED SEPTEMBER 2000 electrical characteristics at specified free-air temperature, VCC ± = ±15 V, TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS VIO ∆VIO(adj) Input offset voltage IIO IIB Input offset current VICR Common-mode input voltage range VOM Maximum peak output voltage swing AVD ri Large-signal differential voltage amplification ro Output resistance Ci Input capacitance CMRR Common-mode rejection ratio kSVS Supply voltage sensitivity (∆VIO /∆VCC) IOS ICC Short-circuit output current µA741Y MIN VO = 0 VO = 0 Offset voltage adjust range 1 6 80 500 nA ± 12 ± 14 RL = 2 kΩ ± 10 ± 13 RL ≥ 2 kΩ 20 200 0.3 VIC = VICRmin VCC = ± 9 V to ± 15 V VO = 0, VO = 0, 70 No load mV nA RL = 10 kΩ See Note 5 mV 200 ± 13 VO = 0, UNIT 20 ± 12 Input resistance Supply current MAX ± 15 VO = 0 VO = 0 Input bias current TYP V V V/mV 2 MΩ 75 Ω 1.4 pF 90 dB 30 150 µV/V ± 25 ± 40 mA 1.7 2.8 mA PD Total power dissipation No load 50 85 mW † All characteristics are measured under open-loop conditions with zero common-mode voltage unless otherwise specified. NOTE 5: This typical value applies only at frequencies above a few hundred hertz because of the effects of drift and thermal feedback. operating characteristics, VCC ± = ±15 V, TA = 25°C PARAMETER tr TEST CONDITIONS Rise time Overshoot factor SR 6 Slew rate at unity gain POST OFFICE BOX 655303 VI = 20 mV,, CL = 100 pF, RL = 2 kΩ,, See Figure 1 VI = 10 V, CL = 100 pF, RL = 2 kΩ, See Figure 1 • DALLAS, TEXAS 75265 µA741Y MIN TYP 0.3 MAX UNIT µs 5% 0.5 V/µs µA741, µA741Y GENERAL-PURPOSE OPERATIONAL AMPLIFIERS SLOS094B – NOVEMBER 1970 – REVISED SEPTEMBER 2000 PARAMETER MEASUREMENT INFORMATION VI – OUT IN + 0V INPUT VOLTAGE WAVEFDORM CL = 100 pF RL = 2 kΩ TEST CIRCUIT Figure 1. Rise Time, Overshoot, and Slew Rate APPLICATION INFORMATION Figure 2 shows a diagram for an input offset voltage null circuit. IN + + IN – – OUT OFFSET N2 OFFSET N1 10 kΩ To VCC – Figure 2. Input Offset Voltage Null Circuit POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 µA741, µA741Y GENERAL-PURPOSE OPERATIONAL AMPLIFIERS SLOS094B – NOVEMBER 1970 – REVISED SEPTEMBER 2000 TYPICAL CHARACTERISTICS† INPUT OFFSET CURRENT vs FREE-AIR TEMPERATURE INPUT BIAS CURRENT vs FREE-AIR TEMPERATURE ÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏ 400 100 350 I IB – Input Bias Current – nA I IO – Input Offset Current – nA 90 VCC+ = 15 V VCC – = –15 V 80 70 60 50 40 30 300 ÏÏÏÏÏ ÏÏÏÏÏ VCC+ = 15 V VCC – = –15 V 250 200 150 100 20 50 10 0 – 60 – 40 – 20 0 20 60 40 0 – 60 – 40 – 20 80 100 120 140 TA – Free-Air Temperature – °C 0 20 40 60 80 100 120 140 TA – Free-Air Temperature – °C Figure 4 Figure 3 MAXIMUM PEAK OUTPUT VOLTAGE vs LOAD RESISTANCE VOM – Maximum Peak Output Voltage – V ± 14 ± 13 ± 12 VCC+ = 15 V VCC – = –15 V TA = 25°C ± 11 ± 10 ±9 ±8 ±7 ±6 ±5 ±4 0.1 0.2 0.4 0.7 1 2 4 7 10 RL – Load Resistance – kΩ Figure 5 † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 µA741, µA741Y GENERAL-PURPOSE OPERATIONAL AMPLIFIERS SLOS094B – NOVEMBER 1970 – REVISED SEPTEMBER 2000 TYPICAL CHARACTERISTICS OPEN-LOOP SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION vs SUPPLY VOLTAGE MAXIMUM PEAK OUTPUT VOLTAGE vs FREQUENCY ± 16 AVD – Open-Loop Signal Differential Voltage Amplification – V/mV ± 18 400 VCC+ = 15 V VCC – = –15 V RL = 10 kΩ TA = 25°C ± 14 ± 12 ± 10 ±8 ±6 ±4 VO = ±10 V RL = 2 kΩ TA = 25°C 200 100 40 20 ±2 0 100 10 1k 10k 100k 1M 0 2 4 6 8 10 12 14 16 18 20 VCC ± – Supply Voltage – V f – Frequency – Hz Figure 6 Figure 7 OPEN-LOOP LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION vs FREQUENCY 110 VCC+ = 15 V VCC – = –15 V VO = ±10 V RL = 2 kΩ TA = 25°C 100 AVD – Open-Loop Signal Differential Voltage Amplification – dB VOM – Maximum Peak Output Voltage – V ± 20 90 80 70 60 50 40 30 20 10 0 –10 1 10 100 1k 10k 100k 1M 10M f – Frequency – Hz POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 µA741, µA741Y GENERAL-PURPOSE OPERATIONAL AMPLIFIERS SLOS094B – NOVEMBER 1970 – REVISED SEPTEMBER 2000 TYPICAL CHARACTERISTICS COMMON-MODE REJECTION RATIO vs FREQUENCY OUTPUT VOLTAGE vs ELAPSED TIME 28 VCC+ = 15 V VCC– = –15 V BS = 10 kΩ TA = 25°C 90 80 24 VO – Output Voltage – mV CMRR – Common-Mode Rejection Ratio – dB 100 70 60 50 40 30 20 ÏÏ 20 90% 16 12 8 10% 0 10 tr 0 –4 1 100 10k 1M 100M 0 0.5 Figure 9 Figure 8 VOLTAGE-FOLLOWER LARGE-SIGNAL PULSE RESPONSE 8 VCC+ = 15 V VCC– = –15 V RL = 2 kΩ CL = 100 pF TA = 25°C 6 Input and Output Voltage – V 1 t – Time − µs f – Frequency – Hz 4 VO 2 0 VI –2 –4 –6 –8 0 10 20 30 40 50 60 70 t – Time – µs Figure 10 10 VCC+ = 15 V VCC– = –15 V RL = 2 kΩ CL = 100 pF TA = 25°C 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 80 90 1.5 2 2.5 PACKAGE OPTION ADDENDUM www.ti.com 5-Feb-2007 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty UA741CD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM UA741CDE4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM UA741CDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM UA741CDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM UA741CDRE4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM UA741CDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Lead/Ball Finish MSL Peak Temp (3) UA741CJG OBSOLETE CDIP JG 8 TBD Call TI Call TI UA741CJG4 OBSOLETE CDIP JG 8 TBD Call TI Call TI UA741CP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type UA741CPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type UA741CPSR ACTIVE SO PS 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM UA741CPSRE4 ACTIVE SO PS 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM UA741MFKB OBSOLETE LCCC FK 20 TBD Call TI Call TI UA741MJ OBSOLETE CDIP J 14 TBD Call TI Call TI UA741MJB OBSOLETE CDIP J 14 TBD Call TI Call TI UA741MJG OBSOLETE CDIP JG 8 TBD Call TI Call TI UA741MJGB OBSOLETE CDIP JG 8 TBD Call TI Call TI (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 5-Feb-2007 provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 MECHANICAL DATA MCER001A – JANUARY 1995 – REVISED JANUARY 1997 JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE 0.400 (10,16) 0.355 (9,00) 8 5 0.280 (7,11) 0.245 (6,22) 1 0.063 (1,60) 0.015 (0,38) 4 0.065 (1,65) 0.045 (1,14) 0.310 (7,87) 0.290 (7,37) 0.020 (0,51) MIN 0.200 (5,08) MAX Seating Plane 0.130 (3,30) MIN 0.023 (0,58) 0.015 (0,38) 0°–15° 0.100 (2,54) 0.014 (0,36) 0.008 (0,20) 4040107/C 08/96 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a ceramic lid using glass frit. Index point is provided on cap for terminal identification. Falls within MIL STD 1835 GDIP1-T8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MLCC006B – OCTOBER 1996 FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER 28 TERMINAL SHOWN 18 17 16 15 14 13 NO. OF TERMINALS ** 12 19 11 20 10 A B MIN MAX MIN MAX 20 0.342 (8,69) 0.358 (9,09) 0.307 (7,80) 0.358 (9,09) 28 0.442 (11,23) 0.458 (11,63) 0.406 (10,31) 0.458 (11,63) 21 9 22 8 44 0.640 (16,26) 0.660 (16,76) 0.495 (12,58) 0.560 (14,22) 23 7 52 0.739 (18,78) 0.761 (19,32) 0.495 (12,58) 0.560 (14,22) 24 6 68 0.938 (23,83) 0.962 (24,43) 0.850 (21,6) 0.858 (21,8) 84 1.141 (28,99) 1.165 (29,59) 1.047 (26,6) 1.063 (27,0) B SQ A SQ 25 5 26 27 28 1 2 3 4 0.080 (2,03) 0.064 (1,63) 0.020 (0,51) 0.010 (0,25) 0.020 (0,51) 0.010 (0,25) 0.055 (1,40) 0.045 (1,14) 0.045 (1,14) 0.035 (0,89) 0.045 (1,14) 0.035 (0,89) 0.028 (0,71) 0.022 (0,54) 0.050 (1,27) 4040140 / D 10/96 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a metal lid. The terminals are gold plated. Falls within JEDEC MS-004 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MPDI001A – JANUARY 1995 – REVISED JUNE 1999 P (R-PDIP-T8) PLASTIC DUAL-IN-LINE 0.400 (10,60) 0.355 (9,02) 8 5 0.260 (6,60) 0.240 (6,10) 1 4 0.070 (1,78) MAX 0.325 (8,26) 0.300 (7,62) 0.020 (0,51) MIN 0.015 (0,38) Gage Plane 0.200 (5,08) MAX Seating Plane 0.010 (0,25) NOM 0.125 (3,18) MIN 0.100 (2,54) 0.021 (0,53) 0.015 (0,38) 0.430 (10,92) MAX 0.010 (0,25) M 4040082/D 05/98 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS-001 For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. 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