WEDC WMF512K8

White Electronic Designs
WMF512K8-XXX5
512Kx8 MONOLITHIC FLASH, SMD 5962-96692
FEATURES
Access Times of 60, 70, 90, 120, 150ns
Organized as 512Kx8
Packaging
• 32 pin, Hermetic Ceramic, 0.600" DIP
(Package 300)
Commercial, Industrial and Military Temperature
Ranges
5 Volt Programming. 5V ± 10% Supply.
• 32 lead, Hermetic Ceramic, 0.400" SOJ
(Package 101)
Low Power CMOS
Embedded Erase and Program Algorithms
• 32 pin, Rectangular Ceramic Leadless Chip
Carrier (Package 601)
TTL Compatible Inputs and CMOS Outputs
Page Program Operation and Internal Program
Control Time.
• 32 lead Flatpack (Package 220)
1,000,000 Erase/Program Cycles Minimum
Sector Erase Architecture
Note: For programming information refer to Flash Programming 4M5 Application Note.
This product is subject to change without notice.
• 8 equal size sectors of 64K bytes each
• Any combination of sectors can be concurrently
erased. Also supports full chip erase
WE#
VCC
A18
4 3 2 1 32 31 30
A14
A13
A8
A9
A11
OE#
A10
CS#
I/O7
I/O6
I/O5
Pin Description
A0-18
I/O0-7
CS#
OE#
WE#
VCC
VSS
5
29
6
28
7
27
8
26
25
9
10
24
11
23
12
22
13
21
14 15 16 17 18 19 20
I/O4
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O3
VCC
WE#
A17
A14
A13
A8
A9
A11
OE#
A10
CS#
I/O7
I/O6
I/O5
I/O4
I/O3
VSS
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
I/O2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
A16
Top View
A15
32 CLCC
Top View
A12
32 DIP
32 CSOJ
32 Flatpack
I/O1
A18
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
VSS
Pin Configuration For WMF512K8-XCLX5
A17
Pin Configuration For WMF512K8-XXX5
Address Inputs
Data Input/Output
Chip Select
Output Enable
Write Enable
+5.0V Power
Ground
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
November 2005
Rev. 6
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
ABSOLUTE MAXIMUM RATINGS (1)
Parameter
Operating Temperature
Supply Voltage (VCC) (1)
Signal Voltage Range(any pin except A9) (2)
Storage Temperature Range
Lead Temperature (soldering, 10 seconds)
Data Retention Mil Temp
Endurance - erase/program cycles (Mil Temp)
A9 Voltage for sector protect (VID) (3)
-55 to +125
-2.0 to +7.0
-2.0 to +7.0
-65 to +150
+300
20
100,000 min
-2.0 to +14.0
WMF512K8-XXX5
RECOMMENDED OPERATING CONDITIONS
Unit
°C
V
V
°C
°C
years
cycles
V
Parameter
Supply Voltage
Input High Voltage
Input Low Voltage
Operating Temp. (Mil.)
Operating Temp. (Ind.)
A9 Voltage for Sector Protect
Symbol
VCC
VIH
VIL
TA
TA
VID
Min
4.5
2.0
-0.5
-55
-40
11.5
Max
5.5
VCC + 0.5
+0.8
+125
+85
12.5
Unit
V
V
V
°C
°C
V
CAPACITANCE
NOTES:
1. Stresses above the absolute maximum rating may cause permanent damage to the
device. Extended operation at the maximum levels may degrade performance and
affect reliability.
2. Minimum DC voltage on input or I/O pins is -0.5V. During voltage transitions, inputs
may overshoot VSS to -2.0 V for periods of up to 20ns. Maximum DC voltage on
output and I/O pins is VCC + 0.5V. During voltage transitions, outputs may overshoot
to Vcc + 2.0 V for periods of up to 20ns.
3. Minimum DC input voltage on A9 pin is -0.5V. During voltage transitions, A9 may
overshoot Vss to -2V for periods of up to 20ns. Maximum DC input voltage on A9 is
+13.5V which may overshoot to 14.0 V for periods up to 20ns.
TA = +25°C
Parameter
Address Input capacitance
Output Enable capacitance
Write Enable capacitance
Chip Select capacitance
Data I/O capacitance
Symbol
CAD
COE
CWE
CCS
CI/O
Conditions
Max Unit
VI/O = 0 V, f = 1.0 MHz 15 pF
VIN = 0 V, f = 1.0 MHz 15 pF
VIN = 0 V, f = 1.0 MHz 15 pF
VIN = 0 V, f = 1.0 MHz 15 pF
VI/O = 0 V, f = 1.0 MHz 15 pF
This parameter is guaranteed by design but not tested.
DC CHARACTERISTICS — CMOS COMPATIBLE
VCC = 5.0V, VSS = 0V, -55°C ≤ TA ≤ +125°C
Parameter
Input Leakage Current
Output Leakage Current
VCC Active Current for Read (1)
VCC Active Current for Program or Erase (2)
VCC Standby Current
Output Low Voltage
Output High Voltage
Low VCC Lock-Out Voltage
Symbol
ILI
ILOx32
ICC1
ICC2
ICC4
VOL
VOH1
VLKO
Conditions
VCC = 5.5, VIN = GND to VCC
VCC = 5.5, VIN = GND to VCC
CS# = VIL, OE# = VIH, f = 5MHz
CS# = VIL, OE# = VIH
VCC = 5.5, CS# = VIH, f = 5MHz
IOL = 8.0 mA, VCC = 4.5
IOH = -2.5 mA, VCC = 4.5
Min
0.85 x VCC
3.2
Max
10
10
50
60
1.6
0.45
4.2
Unit
µA
µA
mA
mA
mA
V
V
V
NOTES:
1. The ICC current listed includes both the DC operating current and the frequency dependent component (at 5 MHz).
The frequency component typically is less than 2 mA/MHz, with OE# at VIH.
2. ICC active while Embedded Algorithm (program or erase) is in progress.
3. DC test conditions: VIL = 0.3V, VIH = VCC - 0.3V
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
November 2005
Rev. 6
2
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
WMF512K8-XXX5
AC CHARACTERISTICS – WRITE/ERASE/PROGRAM OPERATIONS,CS# CONTROLLED
VCC = 5.0V, VSS = 0V, -55°C ≤ TA ≤ +125°C
Parameter
Symbol
-60
Min
-70
Max
Min
-90
Max
Min
-120
Max
Min
-150
Max
Min
Max
Unit
Write Cycle Time
tAVAV
tWC
60
70
90
120
150
Write Enable Setup Time
tWLEL
tWS
0
0
0
0
0
ns
ns
Chip Select Pulse Width
tELEH
tCP
40
45
45
50
50
ns
Address Setup Time
tAVEL
tAS
0
0
0
0
0
ns
Data Setup Time
tDVEH
tDS
40
45
45
50
50
ns
Data Hold Time
tEHDX
tDH
0
0
0
0
0
ns
Address Hold Time
tELAX
tAH
40
45
45
50
50
ns
Chip Select Pulse Width High
tEHEL
tCPH
20
Duration of Byte Programming Operation (1)
tWHWH1
Sector Erase Time (2)
tWHWH2
Read Recovery Time
tGHEL
20
300
15
0
20
300
15
0
20
300
15
0
20
300
15
0
ns
300
µs
15
sec
0
ns
Chip Programming Time
11
11
11
11
11
sec
Chip Erase Time (3)
64
64
64
64
64
sec
NOTES:
1. Typical value for tWHWH1 is 7µs.
2. Typical value for tWHWH2 is 1sec.
3. Typical value for Chip Erase time is 8sec.
AC Test Conditions
AC TEST CIRCUIT
Parameter
Input Pulse Levels
Input Rise and Fall
Input and Output Reference Level
Output Timing Reference Level
I OL
Current Source
VZ
D.U.T.
1.5V
Unit
V
ns
V
V
Notes:
VZ is programmable from -2V to +7V.
IOL & IOH programmable from 0 to 16mA.
Tester Impedance Z0 = 75 Ω.
VZ is typically the midpoint of VOH and VOL.
IOL & IOH are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
(Bipolar Supply)
C eff = 50 pf
Typ
VIL = 0, VIH = 3.0
5
1.5
1.5
I OH
Current Source
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
November 2005
Rev. 6
3
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
WMF512K8-XXX5
AC CHARACTERISTICS – WRITE/ERASE/PROGRAM OPERATIONS, WE# CONTROLLED
VCC = 5.0V, -55°C ≤ TA ≤ +125°C
Parameter
Symbol
Write Cycle Time
Chip Select Setup Time
Write Enable Pulse Width
Address Setup Time
Data Setup Time
Data Hold Time
Address Hold Time
Write Enable Pulse Width High
Duration of Byte Programming Operation (1)
Sector Erase Time (2)
Read Recovery Time before Write
VCC Set-up Time
Chip Programming Time
Output Enable Setup Time
Output Enable Hold Time (4)
Chip Erase Time (3)
tAVAV
tELWL
tWLWH
tAVWH
tDVWH
tWHDX
tWHAX
tWHWL
tWHWH1
tWHWH2
tGHWL
tWC
tCS
tWP
tAS
tDS
tDH
tAH
tWPH
-60
Min
60
0
40
0
40
0
40
20
-70
Max
Min
70
0
45
0
45
0
45
20
300
15
tVCS
0
50
tOES
tOEH
0
10
-90
Max
Min
90
0
45
0
45
0
45
20
300
15
0
50
11
Min
120
0
50
0
50
0
50
20
300
15
0
50
11
0
10
64
-120
Max
Min
150
0
50
0
50
0
50
20
300
15
0
50
11
0
10
64
-150
Max
300
15
0
50
11
0
10
64
Max
11
0
10
64
64
Unit
ns
ns
ns
ns
ns
ns
ns
ns
µs
sec
ms
µs
sec
ns
ns
sec
NOTES:
1. Typical value for tWHWH1 is 7µs.
2. Typical value for tWHWH2 is 1sec.
3. Typical value for Chip Erase time is 8sec.
4. For Toggle and Data# Polling.
AC CHARACTERISTICS – READ ONLY OPERATIONS
VCC = 5.0V, -55°C ≤ TA ≤ +125°C
-60
Parameter
-70
-90
-120
-150
Unit
Symbol
Min
Max
60
Min
Max
70
Min
Max
Max
Max
tRC
Address Access Time
tAVQV
tACC
60
70
90
120
150
ns
Chip Select Access Time
tELQV
tCE
60
70
90
120
150
ns
Output Enable to Output Valid
tGLQV
tOE
35
35
35
50
55
ns
Chip Select to Output High Z (1)
tEHQZ
tDF
20
20
20
30
35
ns
Output Enable High to Output High Z (1)
tGHQZ
tDF
20
20
20
30
35
ns
Output Hold from Address, CS# or OE# Change,
whichever is First
tAXQX
tOH
0
0
120
Min
tAVAV
0
90
Min
Read Cycle Time
0
150
0
ns
ns
NOTES:
1. Guaranteed by design, but not tested
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
November 2005
Rev. 6
4
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
WMF512K8-XXX5
AC WAVEFORMS FOR READ OPERATIONS
tRC
Addresses
Addresses Stable
tACC
CS#
tDF
tOE
OE#
WE#
tCE
tOH
High Z
Outputs
High Z
Output Valid
WRITE/ERASE/PROGRAM OPERATION, WE# CONTROLLED
Data# Polling
Addresses
5555H
PA
tWC
tAS
PA
tAH
tRC
CS#
tGHWL
OE#
tWP
WE#
tWHWH1
tWPH
tCS
tDH
A0H
Data
tDF
tOE
I/O7#
PD
I/OOUT
tDS
tOH
5.0 V
tCE
NOTES:
1. PA is the address of the memory location to be programmed.
2. PD is the data to be programmed at byte address.
3. I/O7# is the output of the complement of the data written to the device.
4. I/OOUT is the output of the data written to the device.
5. Figure indicates last two bus cycles of four bus cycle sequence.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
November 2005
Rev. 6
5
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
WMF512K8-XXX5
AC WAVEFORMS CHIP/SECTOR ERASE OPERATIONS
tAH
Addresses
5555H
2AAAH
5555H
5555H
2AAAH
SA
tAS
CS#
tGHWL
OE#
tWP
WE#
tWPH
tCS
tDH
Data
AAH
55H
80H
AAH
55H
10H/30H
tDS
VCC
tVCS
NOTES:
1. SA is the Sector Address for Sector Erase.
AC WAVEFORMS FOR DATA# POLLING DURING EMBEDDED
ALGORITHM OPERATIONS
t CH
CS#
t DF
t OE
OE#
tOEH
WE#
tCE
t OH
I/O7 =
Valid Data
I/O7#
I/O7
High Z
tWHWH 1 or 2
Data
I/O0-6
I/O0-7
Valid Data
I/O0-6 = Invalid
t OE
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
November 2005
Rev. 6
6
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
WMF512K8-XXX5
ALTERNATE CS# CONTROLLED PROGRAMMING OPERATION TIMINGS
Data# Polling
Addresses
5555H
PA
tWC
tAS
PA
tAH
WE#
tGHEL
OE#
tCP
CS#
tWHWH1
tCPH
tWS
tDH
A0H
Data
I/O7#
PD
I/OOUT
tDS
5.0 V
Notes:
1. PA represents the address of the memory location to be programmed.
2. PD represents the data to be programmed at byte address.
3. I/O7# is the output of the complement of the data written to the device.
4. I/OOUT is the output of the data written to the device.
5. Figure indicates the last two bus cycles of a four bus cycle sequence.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
November 2005
Rev. 6
7
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
WMF512K8-XXX5
PACKAGE 101: 32 LEAD, CERAMIC SOJ
3.96 (0.156) MAX
21.1 (0.830) ± 0.25 (0.010)
0.89 (0.035)
Radius TYP
0.2 (0.008)
± 0.05 (0.002)
11.3 (0.442)
± 0.30 (0.012)
9.55 (0.376) ± 0.25 (0.010)
1.27 (0.050) ± 0.25 (0.010)
PIN 1 IDENTIFIER
1.27 (0.050) TYP
19.1 (0.750) TYP
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
PACKAGE 220: 32 LEAD, CERAMIC FLATPACK
20.83 (0.820)
± 0.25 (0.010)
PIN 1
IDENTIFIER
2.60 (0.102) MAX
10.41 (0.410)
± 0.13 (0.005)
10.16 (0.400)
± 0.51 (0.020)
0.43 (0.017)
± 0.05 (0.002)
0.127 (0.005)
+ 0.05 (0.002)
– 0.025 (0.001)
1.27 (0.050) TYP
19.05 (0.750) TYP
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
November 2005
Rev. 6
8
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
WMF512K8-XXX5
PACKAGE 300: 32 PIN, CERAMIC DIP, SINGLE CAVITY SIDE BRAZED
42.4 (1.670) ± 0.4 (0.016)
15.04 (0.592)
± 0.3 (0.012)
4.34 (0.171) ± 0.79 (0.031)
PIN 1 IDENTIFIER
3.2 (0.125) MIN
0.84 (0.033)
± 0.4 (0.014)
2.5 (0.100)
TYP
1.27 (0.050)
± 0.1 (0.005)
0.46 (0.018)
± 0.05 (0.002)
0.25 (0.010)
± 0.05 (0.002)
15.25 (0.600)
± 0.25 (0.010)
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
November 2005
Rev. 6
9
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
WMF512K8-XXX5
PACKAGE 601: 32 PIN, RECTANGULAR CERAMIC LEADLESS CHIP CARRIER
7.62 (0.300) TYP
3.81
(0.150) TYP
5.08
(0.200)
TYP
0.56 (0.022)
0.71 (0.028)
10.16
(0.400)
TYP
PIN 1
0.38 (0.015) x 45°
PIN 1 IDENTIFIER
11.25 (0.443)
14.15 (0.557)
1.63 (0.064)
2.54 (0.100)
13.79 (0.543)
14.15 (0.557)
1.02 (0.040) x 45°
3 PLACES
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
November 2005
Rev. 6
10
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
WMF512K8-XXX5
ORDERING INFORMATION
W M F 512K 8 - XXX X X 5 X
WHITE ELECTRONIC DESIGNS CORP.
MONOLITHIC
Flash
ORGANIZATION, 512K x 8
ACCESS TIME (ns)
PACKAGE TYPE:
C = 32 Pin Ceramic DIP (Package 300)
CL = 32 Pin Rectangular Ceramic Leadless Chip Carrier (Package 601)
DE = 32 Lead Ceramic SOJ (Package 101)
FE = 32 Lead Flatpack (Package 220)
DEVICE GRADE:
M = Military Screened
-55°C to +125°C
I = Industrial
-40°C to +85°C
C = Commercial
0°C to +70°C
VPP PROGRAMMING VOLTAGE
5 = 5V
LEAD FINISH:
Blank = Gold plated leads
A = Solder dip leads
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
November 2005
Rev. 6
11
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
DEVICE TYPE SECTOR SIZE
WMF512K8-XXX5
SPEED
PACKAGE
SMD NO.
512K x 8 Flash Monolithic
64KByte
150ns
32 pin DIP (C)
5962-96692 01HXX
512K x 8 Flash Monolithic
64KByte
120ns
32 pin DIP (C)
5962-96692 02HXX
512K x 8 Flash Monolithic
64KByte
90ns
32 pin DIP (C)
5962-96692 03HXX
512K x 8 Flash Monolithic
64KByte
70ns
32 pin DIP (C)
5962-96692 04HXX
512K x 8 Flash Monolithic
64KByte
150ns
32 lead SOJ (DE)
5962-96692 01HYX
512K x 8 Flash Monolithic
64KByte
120ns
32 lead SOJ (DE)
5962-96692 02HYX
512K x 8 Flash Monolithic
64KByte
90ns
32 lead SOJ (DE)
5962-96692 03HYX
512K x 8 Flash Monolithic
64KByte
70ns
32 lead SOJ (DE)
5962-96692 04HYX
512K x 8 Flash Monolithic
64KByte
150ns
32 lead Flatpack (FE)
5962-96692 01HUX
512K x 8 Flash Monolithic
64KByte
120ns
32 lead Flatpack (FE)
5962-96692 02HUX
512K x 8 Flash Monolithic
64KByte
90ns
32 lead Flatpack (FE)
5962-96692 03HUX
512K x 8 Flash Monolithic
64KByte
70ns
32 lead Flatpack (FE)
5962-96692 04HUX
512K x 8 Flash Monolithic
64KByte
150ns
32 lead Flatpack (FF)
5962-96692 01HTX
512K x 8 Flash Monolithic
64KByte
120ns
32 lead Flatpack (FF)
5962-96692 02HTX
512K x 8 Flash Monolithic
64KByte
90ns
32 lead Flatpack (FF)
5962-96692 03HTX
512K x 8 Flash Monolithic
64KByte
70ns
32 lead Flatpack (FF)
5962-96692 04HTX
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
November 2005
Rev. 6
12
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
WMF512K8-XXX5
Document Title
512K x 8 Flash Monolithic
Revision History
Rev #
History
Release Date
Status
Rev 1
Initial Release
Changes (Pg. 1)
1.1 Change status to Final
Changes (Pg. 1)
1.1 Correct typo of Ceramic
Changes (Pg. 10)
1.1 Remove pedestal from Flatpack package drawing
Changes (Pg. 1)
1.1 Change name from ‘FP’ to Flatpack
September 1996
May 1997
Preliminary
Final
February 1998
Final
April 1998
Final
February 1999
Final
Rev 2
Changes (Pg. 1, 2, 3, 4, 13)
2.1 Change number of max program/erases to 1,000,000
2.2 Change temperature of max program/erases to 25C
2.3 Absolute Maximum Ratings Table:
2.3.1 Change Data Retention to 20years
2.3.2 Change Endurance to 100,000 cycles minimum
2.4 Write/Erase/Program Operations Tables:
2.4.1 Change tWHWH1 to 300µs
2.4.2 Add Note (1) Typical tWHWH1 = 7µs
2.4.3 Change tWHWH2 to 15sec
2.4.4 Add Note (2) Typical tWHWH2 = 1 sec
2.4.5 Change Chip Programming Time to 11 sec
2.4.6 Change Chip Erase Time too 64 sec
2.4.7 Add Note (3) Chip Erase Time = 8 sec
2.5 Ordering Information
2.5.1 Change Company Name to White EDC
2.6 Change Title Style to new WEDC look
May 1999
Final
Rev 3
Changes (Pg. 1, 2, 10, 12, 13)
3.1 Change package 206 to package 220
3.2 Remove temperature range notice for Endurance
3.3 Change width spec to 0.457" minimum for package 601
May 1999
Final
Rev 4
Changes (Pg. 1, 3, 4)
4.1 Add 60ns speed grade option
January 2003
Final
Rev 5
Changes (Pg. 1, 11, 13)
5.1 Add 'T' case outline for 'FF' package
April 2005
Final
Rev 6
Changes (Pg. 1, 13)
6.1 Change revision history Rev 2.4.1 to 300 µs
6.2 Change revision history Rev 2.4.2 to 7µs
November 2005
Final
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
November 2005
Rev. 6
13
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com