ZILOG Z86E0612PSC

Z86E03/E06
CP95DZ81301
P R E L I M I N A R Y
PRELIMINARY
CUSTOMER PROCUREMENT SPECIFICATION
Z86E03/E06
CMOS Z8® OTP
MICROCONTROLLERS
FEATURES
Part
Z86E03
Z86E06
ROM
(Kbytes)
RAM*
(Kbytes)
SPI
512
1
61
125
No
Yes
Speed
(MHz)
8
12
*General-Purpose
■
■
■
18-Pin DIP, WIN, and SOIC Packages
4.5- to 5.5-Volt Operating Range
■
Low-Power Consumption
■
Expanded Register File (ERF)
■
14 Input/Output Lines
■
Serial Peripheral Interface (SPI) (Z86E06 Only)
■
Software Watch-Dog Timer (WDT)
■
Power-On Reset (POR)
0°C to +70°C Temperature Range
GENERAL DESCRIPTION
The Z86E03/E06 are One-Time Programmable (OTP)
members of the Z8® microcontroller family allowing easy
software development, debug, and prototyping for small
production runs that are not economically desirable with a
masked ROM version.
Three address spaces, the Program Memory, Register
File, and Expanded Register File (ERF), support a wide
range of memory configurations. Through the ERF, the
designer has access to four additional control registers
that provide extra peripheral devices, I/O ports, register
addresses, an SPI receive buffer and SPI compare
register.
CP95DZ81301 (8/95)
For applications demanding powerful I/O capabilities, the
Z86E03/E06's dedicated input and output lines are grouped
into two ports, and are configurable under software control
to provide timing, status signals, or parallel I/O.
Notes:
All Signals with a preceding front slash, "/", are active Low, e.g.:
B//W (WORD is active Low); /B/W (BYTE is active Low, only).
Power connections follow conventional descriptions below:
Connection
Circuit
Device
Power
Ground
VCC
GND
VDD
VSS
1
Z86E03/E06
CP95DZ81301
P R E L I M I N A R Y
GENERAL DESCRIPTION (Continued)
Output
Input
Vcc
GND
Machine
Timing & Inst.
Control
Port 3
Counter/
Timer
WDT, POR
ALU
Interrupt
Control
FLAG
Two Analog
Comparators
Register
Pointer
Prg. Memory
1K x 8-Bit*
Register File
142 x 8-Bit*
Port 2
Program
Counter
Note:
*The Z86E03 has 512 x 8-Bit Program
Memory and 78 x 8-Bit Register File.
I/O
(Bit Programmable)
Functional Block Diagram
2
XTAL
Z86E03/E06
CP95DZ81301
P R E L I M I N A R Y
GENERAL DESCRIPTION (Continued)
P24
1
18
P23
D4
1
18
D3
P25
2
17
P22
D5
2
17
D2
P26
3
16
P21
D6
3
16
D1
P27
4 Z86E03/ 15
E06
5
14
PDIP
P20
D7
4
D0
GND
Vcc
15
Z86E03/E06
5 EPROM 14
XTAL2
6
13
P36
N/C
6
13
/PGM
XTAL1
7
12
P35
/CE
7
12
CLOCK
P31
8
11
P34
/OE
8
11
CLEAR
P32
9
10
P33
EPM
9
10
VPP
Vcc
18-Pin DIP/WIN
Pin Configuration
GND
18-Pin EPROM Mode
Pin Configuration
18-Pin Identification
Pin #
Symbol Function
Direction
1-4
5
6
7
8-10
P24-P27
VCC
XTAL2
XTAL1
P31-P33
Input/Output
11-13
14
15-18
P34-P36 Port 3, Pins 4,5,6
GND
Ground
P20-23 Port 2, Pins 0,1,2,3
Port 2, Pins 4,5,6,7
Power Supply
Crystal Oscillator Clock
Crystal Oscillator Clock
Port 3, Pins 1,2,3
Output
Input
Fixed Input
Fixed Output
Input/Output
3
Z86E03/E06
CP95DZ81301
P R E L I M I N A R Y
GENERAL DESCRIPTION (Continued)
P24
1
18
P23
P25
2
17
P22
P26
3
16
P21
P27
4
15
P20
14
GND
Z86E03/E06
SOIC
Vcc
5
XTAL2
6
13
P36
XTAL1
7
12
P35
P31
8
11
P34
P32
9
10
P33
18-Pin SOIC
Pin Configuration
ABSOLUTE MAXIMUM RATINGS
Symbol
Description
Min
Max
Units
VCC
VIN
TSTG
TA
Supply Voltage*
Input Voltage**
Storage Temp
Oper Ambient Temp
–0.3
–0.3
–65
†
+7.0
V
VCC + 0.3 V
+150
C
C
Stress greater than those listed under Absolute Maximum
Ratings may cause permanent damage to the device. This
is a stress rating only; operation of the device at any
condition above those indicated in the operational sections of these specifications is not implied. Exposure to
absolute maximum rating conditions for extended period
may affect device reliability.
Notes:
* Voltage on Vcc with respect to Vss.
† See Ordering Information
** Voltages on all pins with respect to Vss without current limitations.
STANDARD TEST CONDITIONS
The characteristics listed below apply for standard test
conditions as noted. All voltages are referenced to ground.
Positive current flows into the referenced pin (Test Load
Configuration).
150 pF
Test Load Configuration
4
Z86E03/E06
CP95DZ81301
P R E L I M I N A R Y
DC ELECTRICAL CHARACTERISTICS
Symbol Parameter
TA= 0°C to 70°C
VCC
(4.5V to 5.5V)
Note [3] Min
Max
Typical
@ 25°C
12
Units
Conditions
Notes
V
IIN ≤ 250 µA
[8]
Max Input Voltage
5.0V
VCH
Clock Input High
Voltage
5.0V
0.9 VCC
VCC+0.3
2.7
V
Driven by External
Clock Generator
VCL
Clock Input Low
Voltage
5.0V
VSS–0.3
0.2 VCC
1.7
V
Driven by External
Clock Generator
VIH
Input High Voltage
5.0V
0.7 VCC
VCC+0.3
2.5
V
VIL
Input Low Voltage
5.0V
VSS–0.3
0.2 VCC
1.6
V
VOH
Output High Voltage 5.0V
(Low EMI Mode)
5.0V
VCC–0.4
VCC–0.4
4.9
4.9
V
V
IOH= –2.0 mA
IOH= –0.5 mA
[10]
VOL1
Output Low Voltage 5.0V
(Low EMI Mode)
5.0V
0.4
0.4
0.1
0.1
V
V
IOL=+4.0 mA
IOL=+1.0 mA
[10]
VOL2
Output Low Voltage 5.0V
1.0
0.3
V
IOL = +12 mA,
[10]
VOFFSET
Comparator Input
±10
±5
mV
VICR
Input Common
5.0V
Mode Voltage Range
OV
VCC–1.5v
IIL
Input Leakage
5.0V
–1.0
1.0
µA
VIN = OV, VCC
IOL
Output Leakage
5.0V
–1.0
1.0
µA
VIN = OV, VCC
ICC
Supply Current
5.0V
5.0V
11.0
15
mA
mA
@ 8 MHz
@ 12 MHz
IOB
Input Bias Current
5.0V
300
nA
[7]
IIO
Input Offset Current 5.0V
±150
nA
[7]
5.0V
[7]
8.0
11
[4, 5, 12]
[4, 5, 13]
5
Z86E03/E06
CP95DZ81301
P R E L I M I N A R Y
DC ELECTRICAL CHARACTERISTICS (Continued)
TA= 0°C to 70°C
(4.5V to 5.5V) Typical
Min
Max
@ 25°C
Symbol
Parameter
VCC
Note [3]
ICC1
Standby Current
5.0V
5
5.0V
ICC2
Standby Current
Units
Conditions
Notes
3.0
mA
[4, 5, 12]
7.0
4.0
mA
5.0V
3.5
2.0
mA
5.0V
4.5
2.5
mA
5.0V
1.0
HALT Mode VIN = OV,
VCC@ 8 MHz
HALT Mode VIN = OV,
VCC @ 12 MHz
Clock Divide by 16
@ 8 MHz
Clock Divide by 16
@ 12 MHz
HALT Mode@12 MHz
5.0V
10
5.0V
mA
1.6
µA
50
µA
STOP Mode VIN = OV, VCC
WDT is not Running
STOP Mode VIN = OV, VCC
WDT is Running
IALL
Auto Latch Low
Current
5.0V
30
19
µA
OV < VIN < VCC
IALH
Auto Latch High
Current
5.0V
–20
–11
µA
OV < VIN < VCC
TPOR
Power On Reset
5.0V
3
13
5
ms
VPOR
VCC Low Voltage
2.2
2.8
2.5
V
Notes:
[1] ICC1
Typ
Max Unit
Freq
Clock Driven
3.0
5.0
mA
8 MHz
Crystal or Ceramic Resonator
0.3
5.0
mA
8 MHz
[2] VSS = 0V = GND
[3] The VPOR increases as the temperature decreases.
[4] All outputs unloaded, I/O pins floating, inputs at rail.
[5] CL1 = CL2 = 100 pF
[6] Same as note [4] except inputs at VCC.
[7] For analog comparator inputs when analog comparators are
enabled.
[8] Excludes clock pins and Port 3 inputs.
[9] Clock must be forced low when XTAL1 is clock driven and XTAL2 is
floating.
[10] Standard mode (not low EMI mode).
[11] Low EMI oscillator enabled.
[12] Z86E03.
[13] Z86E06.
6
[4, 5,13]
[4, 5,13]
[4, 5,13]
[4, 5,11,13]
[6, 9]
[6, 9]
[3]
Z86E03/E06
CP95DZ81301
P R E L I M I N A R Y
AC ELECTRICAL CHARACTERISTICS
3
1
Clock
2
7
T
2
3
7
IN
4
5
6
IRQ
N
8
9
Clock
Setup
11
Source
10
Additional Timing
AC ELECTRICAL CHARACTERISTICS
No Symbol Parameter
VCC
Note[3]
TA = 0°C To +70°C
8 MHz
12 MHz
(E03)
(E06)
Min Max Min Max
1
TpC
Input Clock Period
5.0V
125
2
TrC,TfC
Clock Input Rise
5.0V
3
4
TwC
TwTinL
Input Clock Width
Timer Input Low Width
5.0V
5.0V
5
TwTinH
Timer Input High Width 5.0V
DC
83
25
62
70
41
70
5TpC
5TpC
Units
Notes
DC
ns
[1,7,8]
15
ns
[1,7,8]
ns
ns
[1,7,8]
[1,7,8]
[1,7,8]
7
Z86E03/E06
CP95DZ81301
P R E L I M I N A R Y
AC ELECTRICAL CHARACTERISTICS (Continued)
No Symbol Parameter
VCC
Note[3]
TA = 0°C To +70°C
8 MHz
12 MHz
(E03)
(E06)
Min Max Min Max
6
TpTin
Timer Input Period
5.0V
8TpC
7
TrTin,
TtTin
Timer Input Rise
and Fall Timer
5.0V
8
TwIL
Int. Request Input
Low Time
5.0V
70
70
9
TwIH
Int. Request Input
High Time
5.0V
5TpC
5TpC
10
Twsm
STOP Mode Recovery
Width Spec
5.0V
20
20
ns
[1]
11
Tost
Oscillator Startup Time
5.0V
5TpC
5TpC
ms
[1,4,9]
12
Twdt
Watch-Dog Timer
Refresh Time
5.0V
5.0V
5.0V
5.0V
6
12
25
100
6
12
25
100
ms
ms
ms
ms
D1 = 0 [5,6]
D1 = 0 [5,6]
D1 = 1 [5,6]
D1 = 1 [5,6]
8TpC
100
Notes:
[1] Timing Reference uses 0.7 VCC for a logic 1 and 0.2 VCC for a logic 0.
[2] Interrupt request through Port 3 (P33-P31).
[3] VCC = 4.5V to 5.5V.
[4] SMR-D5 = 0, POR delay is off.
[5] Reg. WDTMR.
[6] Internal RC oscillator only.
[7] SMR D1 = 0.
[8] Maximum frequency for internal system clock is 4 MHz when using
SCLK = external clock.
[9] For RC and LC oscillator and for clock driven oscillator.
[10] SMR-D5 = 1, STOP mode recovery delay is on.
8
Units
Notes
[1,7,8]
100
ns
[1,7]
ns
[1,2,7]
[1,8,10]
P R E L I M I N A R Y
© 1994 by Zilog, Inc. All rights reserved. No part of this document
may be copied or reproduced in any form or by any means
without the prior written consent of Zilog, Inc. The information in
this document is subject to change without notice. Devices sold
by Zilog, Inc. are covered by warranty and patent indemnification
provisions appearing in Zilog, Inc. Terms and Conditions of Sale
only. Zilog, Inc. makes no warranty, express, statutory, implied or
by description, regarding the information set forth herein or
regarding the freedom of the described devices from intellectual
property infringement. Zilog, Inc. makes no warranty of merchantability or fitness for any purpose. Zilog, Inc. shall not be
responsible for any errors that may appear in this document.
Zilog, Inc. makes no commitment to update or keep current the
information contained in this document.
Z86E03/E06
CP95DZ81301
Zilog’s products are not authorized for use as critical components in life support devices or systems unless a specific written
agreement pertaining to such intended use is executed between
the customer and Zilog prior to use. Life support devices or
systems are those which are intended for surgical implantation
into the body, or which sustains life whose failure to perform,
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to result in
significant injury to the user.
Zilog, Inc. 210 East Hacienda Ave.
Campbell, CA 95008-6600
Telephone (408) 370-8000
Telex 910-338-7621
FAX 408 370-8056
Internet: http://www.zilog.com
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