ZILOG Z89301

P R E L I M I N A R Y
Z89300/01
CPS DC-4166-00
PRELIMINARY
CUSTOMER PROCUREMENT SPECIFICATION
Z89300/01
DIGITAL TELEVISION CONTROLLER
GENERAL DESCRIPTION
The Z89300/01 Digital Television Controller is an
application- specific controller designed to provide
complete audio and video control of television receivers,
video recorders, and advanced on-screen display facilities.
The Z89301 is the one-time-programmable (OTP) version
of the Z89300.The powerful 12 MHz Z89C00 RISC
processor core allows the user to control the on-board
peripheral functions and registers using the standard
processor instruction set.
The extensive character attributes can be controlled in two
modes: by the on-screen display controller character
control mode for maximum display control flexibility, and
closed caption mode for optimum display of closed caption
text.
Closed caption text can be decoded directly from the
composite video signal with the assistance of the
processor's digital signal processing capabilities and
displayed on the screen. The character representation in
this mode allows for a simple attribute control through the
insertion of control characters, and each word of RAM
specifies two displayed characters.
The character control mode provides access to the full set
of attribute controls. Each word of RAM specifies a single
displayed character and basic character attributes, allowing
the modification of attributes on a character-by-character
basis. The insertion of control characters permits direction
of other character attributes.
The fully customized 512 character set, formatted in two
256 character banks, can be displayed with a host of
display attributes that incude underlining, italics, blinking,
eight foreground/background colors, character position
offset delay, and background transparency. The 16-bit
display character representation allows the modification of
some key attributes on a character-by-character basis. A
character's pixel array is stored as a 16- or 18-word
representation in Character Graphics ROM (CGROM).
The ROM contents are referenced by a 16-bit word stored
in video RAM (VRAM) defining the character type and its
key attributes.
DC-4166-00
(8-3-93)
Serial interfacing with the television tuner is provided
through the tuner serial port. Other serial devices, such as
digital channel tunning adjustments, may be accessed
through the industry standard I2C port.
Additional hardware provides the capability to display two
to three times normal size characters. The smoothing logic
contained in the on-screen display circuit improves the
appearance of larger fonts. Fringing circuitry can be
activated to improve the visibiity of text by surrounding the
character lines with a one-pixel border.
RGB outputs provide the direct video signals, and a
blanking output is provided to control the video multiplexor.
Dot clock and verticle line synchronization are normally
obtained from H_FLYBACK and V_FLYBACK, but can be
generated by the Z89300/01 and driven to the external
deflection unit through the bidirectional SYNC ports when
external video synchronization signals are not present.
User control can be monitored through the keypad scanning
port, or the 16-bit remote control capture register. Receiver
functions such as color and volume can be directly
controlled by eight 8-bit pulse width modulated ports.
All nine PWM ports are only available in the 52-pin package.
Only six 8-bit and one 14-bit PWM output pins are available
in the 40-pin package.
The Z89300/01 has two internal 12 MHz VCOs that are
referenced to a 32 KHz internal oscillator to provide the
system clock. In Sleep mode, the controller uses the 32
KHz clock for the system clock to reduce power
consumption. The processor can be suspended by placing
it into STOP mode when main power is not available for
minimal power consumption.
1
P R E L I M I N A R Y
GENERAL DESCRIPTION (Continued)
Functional Block Diagram
2
Z89300/01
CPS DC-4166-00
P R E L I M I N A R Y
PWM9
IRIN
Port18
Port19
Port0E
Port/ADC2
Port01
Port02
Port03
GND
Port04
Port05
Port06
Port07
Port08
Port09
VCC
Port10
Port11
Port12
Port13
Port14
Port15
Port16
Port0A
Port0B
Port
40-Pin DIP Configuration
Z89300/01
CPS DC-4166-00
PWM8
PWM7
PWM6
PWM5
PWM4
PWM3
PWM2
PWM1
ADC3
CVI/ADC0
LPF
XTAL2
GND
XTAL1
VCC
/RESET
Port0F/HalfBlnk
Port17/ADC1
Blank
V1
V2
V3
VSync
HSync
Port0D
Port0C
52-Pin Shrink DIP Configuration
3
Z89300/01
CPS DC-4166-00
P R E L I M I N A R Y
PIN DESCRIPTIONS
Z89300
Pin
Name
Standard
Application
52-Pin
40-Pin
I/O/B/
PWR
Reset
Pad
Condition Type
Description
CVI/ADC0
/RESET
ADC3
Port1 [7]
/ADC1
COMP_VID
RESET
A/D
43
37
44
35
34
28
27
I
I
I
B/I
1
8
1
4/1
Analog Input
Reset Signal
Analog Input to A/D
PWM9
1
1
O
7
14-Bit PWM
PWM8
PWM7
BALANCE/
VST
PWMB
PWMA
52
51
-
O
O
7
7
General-Purpose PWM B
General-Purpose PWM A
PWM6
PWM5
TONE
VOLUME
50
49
40
39
O
O
7
7
Tone Control
Volume Control
PWM4
PWM3
BRIGHT
CONTRAST
48
47
38
37
O
O
7
7
Brightness Control
Contrast Control
PWM2
PWM1
COLOR
TINT
46
45
36
35
O
O
7
7
Color Control
Tint Control
Data I/O
PORT0 [8]
SER_DATA
15
12
B
O
4
Serial Data
PORT0 [9]
PORT0 [3]
SER_CLK
SER_EN
16
9
13
7
B
B
O
O
4
4
Serial Clock
Serial Enable
PORT0 [2]
PORT0 [1]
IIC_DATA
IIC_CLK
8
7
6
5
B
B
4
4
I2C Data
I2C Clock
Keyscanning Ports
PORT0 [4]
PORT0 [5]
SCAN_IN0
SCAN_IN1
11
12
8
9
B
B
I
I
4
4
Key Scan Input 0
Key Scan Input 1
PORT0 [6]
PORT0 [7]
SCAN_IN2
SCAN_IN3
13
14
10
11
B
B
I
I
4
4
Key Scan Input 2
Key Scan Input 3
PORT1 [6]
PORT1 [7]
PORT1 [8]
SCAN_OUT0
SCAN_OUT1
SCAN_OUT2
24
35
3
20
27
3
B
B
B
O
O
O
4
4
4
Key Scan Output 0
Key Scan Output 1
Key Scan Output 2
PORT1 [9]
SCAN_OUT3
4
-
B
O
4
4
Key Scan Output 3
General-Purpose Control
PORT0 [0]
/ADC2
6
4
B/I
O
4
PORT0 [A]
PORT0 [B]
PORT0 [C]
25
26
27
-
B
B
B
O
O
O
4
4
4
4
Z89300/01
CPS DC-4166-00
P R E L I M I N A R Y
PIN DESCRIPTIONS
Z89300 (continued)
Pin
Name
Standard
Application
PORT0 [D]
PORT0 [E]
PORT0 [F]
/HalfBlnk
PORT1 [0]
PORT1 [1]
PORT1 [2]
PORT1 [3]
LED1_PWR
LED2_AUD
LED3_TMR
TV_VCR
52-Pin
40-Pin
I/O/B/
PWR
Reset
Pad
Condition Type
28
5
36
-
B
B
B
O
O
O
4
4
4
18
19
20
21
14
15
16
17
B
B
B
B
O
O
O
O
4
4
4
4
Description
Power LED Control
Mono/Stereo LED Control
Timer On/OFF LED Control
TV/Video Switch Control
Power & Power Mgmt
PORT1 [4]
PWR_CTL
22
18
B
PORT1 [5]
VCC
PWR_DET
+ 5 Volts
23
17
38
19
29
B
PWR
GND
0 Volts
10
40
31
PWR
41
32
Analog
3
XTAL2
O
4
Power On/Off Control
4
Low Power Detect Input
Supply Power
Digital/Analog Ground
Oscillator
Oscillator Crystal Terminal 2
XTAL1
LPF
39
42
30
33
Analog
I
1
LOOP FILTER
Oscillator Crystal Terminal 1
PLL Loop Filter
V1
RED
33
25
O
6+Analog
RGB Display
Red Display Signal
V2
V3
GREEN
BLUE
32
31
24
23
O
O
6+Analog
6+Analog
Green Dislay Signal
Blue Display Signal
BLANK
BLANK
34
26
O
3
RGB Video Multipleor
Control Signal
Display Synchronization
HSYNC
H_SYNC
29
21
B
I
4
Horizontal Synchronization
Detect/Source
VSYNC
V_SYNC
30
22
B
I
4
Vertical Synchronization
Source
IRIN
REMOTE
2
2
I
1
Remote Control Capture
5
Z89300/01
CPS DC-4166-00
P R E L I M I N A R Y
V1, V2, V3 ANALOG OUTPUT
Specifications VCC = 5.25V
VCC = 5.25V
Condition
Limit
Output Voltage
Bit = 11
Bit = 10
4.30V +/– 0.25V
3.20V +/– 0.2V
Bit = 01
Bit = 00
2.10V +/– 0.15V
0.1V +/– 0.1V
70% of DC Level, 10pf Load
< 50 nsec
VCC = 4.75V
Condition
Limit
Output Voltage
Bit = 11
Bit = 10
3.90V +/– 0.25V
2.90V +/– 0.2V
Bit = 01
Bit = 00
1.90V +/– 0.15V
0.1V +/– 0.1V
70% of DC Level, 10pf Load
< 50 nsec
Settling Time
V1, V2, V3 ANALOG OUTPUT
Specifications VCC = 4.75V
Settling Time
6
Z89300/01
CPS DC-4166-00
P R E L I M I N A R Y
DC CHARACTERISTICS
TA = 0°C to + 70°C; VCC = + 4.75 V to + 5.25V
Symbol
Parameter
TA = 0° to + 70°C
Min
Max
VIL
VIH
Input Voltage Low
Input Voltage High
0
0.7 VCC
VHY
VPU
VOL
Schmitt Hysteresis
0.1 VCC
Maximum Pull-Up Voltage
Output Voltage Low
VOH
IIR
IIL
IOL
Output Voltage High
Reset Input Current
Input Leakage
Tri-State Leakage
0.2 VCC
VCC
Units
1.48
3.0
V
V
0.8
13.2
0.4
0.4
0.4
0.16
0.19
0.19
V
V
V
V
V
–80
3.0
3.0
4.75
–46
0.01
0.02
V
µA
µA
µA
VCC –0.4
–3.0
–3.0
Typical
@ 25°C
Conditions
[2]
IOL = 1.00 mA
IOL = mA, [1]
IOL =0.75 mA, [2]
IOH = –0.75 mA
VRL = 0 V
0 V, VCC
0 V, VCC
[1] Port 0, 1
[2] PWM Open-Drain
7
P R E L I M I N A R Y
© 1993 by Zilog, Inc. All rights reserved. No part of this document
may be copied or reproduced in any form or by any means
without the prior written consent of Zilog, Inc. The information in
this document is subject to change without notice. Devices sold
by Zilog, Inc. are covered by warranty and patent indemnification
provisions appearing in Zilog, Inc. Terms and Conditions of Sale
only. Zilog, Inc. makes no warranty, express, statutory, implied or
by description, regarding the information set forth herein or
regarding the freedom of the described devices from intellectual
property infringement. Zilog, Inc. makes no warranty of merchantability or fitness for any purpose. Zilog, Inc. shall not be
responsible for any errors that may appear in this document.
Zilog, Inc. makes no commitment to update or keep current the
information contained in this document.
8
Z89300/01
CPS DC-4166-00
Zilog’s products are not authorized for use as critical components in life support devices or systems unless a specific written
agreement pertaining to such intended use is executed between
the customer and Zilog prior to use. Life support devices or
systems are those which are intended for surgical implantation
into the body, or which sustains life whose failure to perform,
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to result in
significant injury to the user.
Zilog, Inc. 210 East Hacienda Ave.
Campbell, CA 95008-6600
Telephone (408) 370-8000
Telex 910-338-7621
FAX 408 370-8056