ZILOG Z89318

Z89314/318
CPS95TV0403
CUSTOMER PROCUREMENT SPECIFICATION
Z89314/318
DIGITAL TELEVISION CONTROLLER
FEATURES
■
Part
Number
Z8 ROM
(Kbyte)
Z89314
16
Z89318
10
*General-Purpose
Z8 RAM*
(Kbyte)
Speed
(MHz)
■
0°C to +70°C Temperature Range
512
512
12
12
■
Direct Closed Caption Decoding
■
TV Tuner Serial Interface
■
40-Pin DIP Package
■
Customized Character Set
■
4.5- to 5.0-Volt Operating Range
■
Character Control Mode
■
Z89C00 RISC Processor Core
■
Directly Controlled Receiver Functions
GENERAL DESCRIPTION
The Z89314/318 are members of Zilog's family of Digital
Television Controllers designed to provide complete audio
and video control of television receivers, video recorders,
and advanced on-screen display facilities.
The powerful Z89C00 RISC processor core allows users to
control on-board peripheral functions and registers using
the standard processor instruction set.
In closed caption mode, text can be decoded directly from
the composite video signal and displayed on the screen
with assistance from the processor's digital signal
processing capabilities. The character representation in
this mode allows for a simple attribute control through the
insertion of control characters.
The character control mode provides access to the full set
of attribute controls. The modification of attributes is allowed
on a character-by-character basis. The insertion of control
characters permits direction of other character attributes.
Display attributes include underlining, italics, blinking,
eight foreground/background colors, character position
offset delay, and background transparency are made
possible through a fully customized 512 character set,
formatted in two 256 character banks.
CPS95TV0403 (8/95)
Serial interfacing with the television tuner is provided
through the tuner serial port. This version of the Z89300
series does not offer I2C capability
Additional hardware provides the capability to display two
to three times normal size characters. The smoothing logic
contained in the on-screen display circuit improves the
appearance of larger fonts. Fringing circuitry can be
activated to improve the visibiity of text by surrounding the
character lines with a one-pixel border.
Receiver functions such as color and volume can be
directly controlled by eight 8-bit pulse width modulated
ports.
Notes:
All Signals with a preceding front slash, "/", are active Low, e.g.:
B//W (WORD is active Low); /B/W (BYTE is active Low, only).
Power connections follow conventional descriptions below:
Connection
Circuit
Device
Power
Ground
VCC
GND
VDD
VSS
1
Z89314/318
CPS95TV0403
GENERAL DESCRIPTION (Continued)
PWM
Capture
IRIN
PWM1
PWM2
PWM3
PWM4
PWM5
PWM6
ADC
Port 17
Port 00
ADC0
ADC1
ADC2
Port1
Port 0
Port 10
Port 11
Port 12
Port 13
Port 14
Port 15
Port 16
Port 00
Port 01
Port 02
Port 03
Port 04
Port 05
Port 06
Port 07
Port 08
Port 09
Control
XTAL1
XTAL2
LPF
HSYNC
VSYNC
/Reset
Register Addr/Data
V1
V2
V3
BLANK
CPU
RAM
512 x 16
Address
ROM Addr
Data
ROM Data
Functional Block Diagram
2
OSD
ROM
16K x 16
Z89314
10K x 16
Z89318
Z89314/318
CPS95TV0403
PIN DESCRIPTION
N/A PWM9
1
40
PWM6
IRIN
2
39
PWM5
Port 18
3
38
PWM4
Port 00/ADC2
4
37
PWM3
Port 01
5
36
PWM2
Port 02
6
35
PWM1
Port 03
7
34
CVI/ADC0
Port 04
8
33
LPF
Port 05
9
32
XTAL2
Port 06
10
31
GND
Port 07
11
30
XTAL1
Port 08
12
29
VCC
Port 09
13
28
/Reset
Port 10
14
27
Port 17/ADC1
Port 11
15
26
VBlank
Port 12
16
25
V1
Port 13
17
24
V2
Port 14
18
23
V3
Port 15
19
22
VSync
Port 16
20
21
HSync
Z89314
Z89318
40-Pin DIP Configuration
3
Z89314/318
CPS95TV0403
PIN DESCRIPTION (Continued)
Z89314/318
Pin
Name
Function
VCC
GND
+5 V
0V
IRIN
ADC[5:0]
Infrared Remote Capture Input
4-Bit Analog to Digital Converter
Input
PWM[8:1]a
Port0[F:0]b
8-Bit Pulse Width Modulator
Output
Bit Programmable Input/Output Ports
Port1[9:0]a
Bit Programmable Input/Output Ports
XTAL1
XTAL2
Z89314
40-Pin
Configuration
Direction
Reset
29,–
31,–
PWR
PWR
–
–
2
–,–,–,4,27,34
I
AI
I
I
–,–,40,39,38
37,36,35
–,–,–,–,–,–,
13,12,11
10,9,8,7,6,5,4
–,3,27,20,
19,18,17,
16,15,14
OD
O
B
I
B
I
Crystal Oscillator Input
Crystal Oscillator Output
30
32
AI
AO
I
O
LPF
Loop Filter
33
AB
O
HSYNC
VSYNC
H_Sync
V_Sync
21
22
B
B
I
I
/RESET
Device Reset
28
I
I
V[3:1]
23,24,25
O
O
Blank
OSD Video Output
(Typically Drive B, G, and R Outputs)
OSD Blank Output
26
O
O
Half Blank
OSD Half Blank Output
N/A
O
SCLKe
Internal Processor SCLK
20
O
Notes:
a) PWM [8,7] is not available on the 40-pin DIP version.
b) Port0 [F:A] is not available on the 40-pin DIP version.
c) Port19 is not available on the 40-pin DIP version.
d) Half Blank output is a function shared with Port0F.
Half Blank output is not available on the 40-pin DIP version.
e) Internal processor SCLK is shared with Port16.
4
Z89314/318
CPS95TV0403
XTAL1
32.768k
68pF
10 Mohm
Z893XX
XTAL2
27k
560pF
32K Oscillator Recommended Circuit
5
Z89314/318
CPS95TV0403
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Min
Max
Units
Conditions
VCC
VID
Power Supply Voltage
Input Voltage
0
–0.3
7
VCC +0.3
V
V
Digital Inputs
VIA
VO
VO
Input Voltage
Output Voltage
Output Voltage
–0.3
–0.3
–0.3
VCC +0.3
VCC +0.3
VCC +8.0
V
V
V
IOH
IOH
IOL
IOL
Output Current High
Output Current High
Output Current Low
Output Current Low
–10
–100
20
200
mA
mA
mA
mA
TA
TA
Operating Temperature
Storage Temperature
70
150
°C
°C
0
–65
Analog Inputs (A/D0...A/D4)
All Push-Pull Digital Output
Open-Drain PWM Outputs
(PWM1...PWM8)
One Pin
All Pins
One Pin
All Pins
DC CHARACTERISTICS
TA = 0°C to + 70°C; VCC = 4.5 V to + 5.5 V; FOSC = 32.768 KHz
Symbol
VIL
VIH
Parameter
Min
Max
Typical
Units
Input Voltage Low
Input Voltage High
0
0.6 VCC
0.2 VCC
VCC
0.4
3.6
V
V
0.16
4.75
V
V
V
PWM0...PWM8 Only
@ IOL = 1 mA
@ IOL = 0.75 mA
0.75
150
1.0
3.5
0.5
90
V
V
V
µA
External Clock
Generator Driven
On XTAL1 Input Pin
VRL = 0 V
3.0
100
700
0.01
60
300
µA
mA
µA
@ 0 V and VCC
Sleep Mode @ 32 KHz
300
40
100
5
µA
µA
Sleep Mode @ 32 KHz
Sleep Mode
VPU
VOL
VOL3
Max. Pull-Up Voltage
Output Voltage Low
Output Voltage High
VXL
VXH
VHY1
IIR
Input Voltage XTAL1 Low
Input Voltage XTAL1 High
Schmitt Hysteresis
Reset Input Current
IIL
ICC
ICC1E2
Input Leakage
Supply Current
Supply Current of the OTP
ICC12
ICC2
Supply Current
Supply Current
Notes:
1. Not in the EOS.
2. Z89314 is not an OTP.
3. Labeled incorrect.
6
12
0.4
VCC –0.9
0.3 VCC
VCC –2.0
3.0
–3.0
Conditions
Z89314/318
CPS95TV0403
AC CHARACTERISTICS
TA = 0°C to + 70°C; VCC = 4.5 V to 5.5 V; FOSC = 32.768 KHz
Symbol
Parameter
Min
Max
Typical
Units
TPC
TRC,TFC
Input Clock Period
Clock Input Rise and Fall
16
100
32
12
µS
µS
TDPOR
Power On Reset Delay
0.8
1.2
s
AC CHARACTERISTICS*
TA = 0°C to + 70°C; VCC = 4.5 V to 5.5 V; FOSC = 32.768 KHz
Symbol
Parameter
Min
Max
Typical
Units
TWRES
TDHS
Power-On Reset Min. Width
H_Sync Incoming Signal Width
5.5
5TPC
12.5
11
µS
µS
TDVS
TDES
V_Sync Incoming Signal Width
Time Delay Between Leading Edge
of V_Sync and H_Sync in Even Field
0.15
–12
1.5
+12
1.0
0
mS
µS
TDOS
Time Delay Between Leading Edge
of H_Sync in Odd Field
H_Sync/V_Sync Edge Width
20
44
32
µS
2.0
0.5
µS
TWHVS
*Notes:
The above AC Characteristics are ROM code/software dependent and
are not measurable internally.
7
Z89314/318
CPS95TV0403
© 1995 by Zilog, Inc. All rights reserved. No part of this document
may be copied or reproduced in any form or by any means
without the prior written consent of Zilog, Inc. The information in
this document is subject to change without notice. Devices sold
by Zilog, Inc. are covered by warranty and patent indemnification
provisions appearing in Zilog, Inc. Terms and Conditions of Sale
only. Zilog, Inc. makes no warranty, express, statutory, implied or
by description, regarding the information set forth herein or
regarding the freedom of the described devices from intellectual
property infringement. Zilog, Inc. makes no warranty of merchantability or fitness for any purpose. Zilog, Inc. shall not be
responsible for any errors that may appear in this document.
Zilog, Inc. makes no commitment to update or keep current the
information contained in this document.
8
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when properly used in accordance with instructions for use
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Campbell, CA 95008-6600
Telephone (408) 370-8000
Telex 910-338-7621
FAX 408 370-8056
Internet: http://www.zilog.com