ZL40518 3 Channel Laser Diode Driver Data Sheet Features February 2005 • Current-controlled Output Current source • Output Current per Channel to 250 mA • Total Output Current to 300 mA • Rise Time 1.0 ns, Fall Time 1.1 ns • On-chip RF Oscillator • External Resistor Control of Oscillator Swing and Frequency Applications • 200 to 500 MHz Oscillator Range • DVD R/RW • 100 mA Maximum Oscillator Swing • CD R/RW • Single +5 V Power Supply (±10%) • Low-power Consumption • Common Enable, Disable Input • TTL/CMOS control signals • Small SS016 Package Ordering Information ZL40518DGE1 16 Pin QSOP* *Pb Free Matte Tin 0°C to +70°C CH_R VCC INR /ENR CH_2 IN2 /EN2 IOUT CH_3 IN3 /EN3 RF_freq RF RS RF_mag GND OSCEN PWR_UP Figure 1 - Functional Block Diagram 1 Zarlink Semiconductor Inc. Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc. Copyright 2004-2005, Zarlink Semiconductor Inc. All Rights Reserved. Tubes ZL40518 INR IN2 GND RF IN3 /ENR /EN2 /EN3 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 Data Sheet VCC_IN VCC IOUT GND RS PWR_UP OSCEN VCC Figure 2 - Pinout of 16 Pin SSO16 Package (Top View) Description The ZL40518 is a laser diode driver for high speed operation of a grounded laser diode. The driver consists of 3 controllable channels: a switchable, low noise, read channel and two switchable write channels. Write current pulses are enabled with the application of a low signal on the /EN pins. A summed output of all channels is available at the IOUT pin. Each channel can contribute up to 250 mA to the total output current of up to 300 mA. A total read channel gain of 100 and write channels 2 and 3 with a gain of 250 and 150 respectively are provided between each reference current input and output. Laser mode hopping noise during read mode can be reduced by the use of an on-chip RF oscillator. The oscillator frequency and swing can be set by two external resistors. The oscillator is enabled by a high signal on the OSCEN pin and the entire device can be switched off by the application of a low signal on the PWR_UP pin. Application Notes Read and Write Channel Operation The read channel is activated by applying a 'High' signal to the PWR_UP pin and applying a 'low' signal to /ENR. In this mode, the fast write channels can be enabled by applying a 'Low signal to the respective pair of write enable pins (/EN2) or (/EN3). The output currents of the three channels are summed together and output as a composite signal at IOUT. Voltage control of the channel reference inputs (INR, IN2 and IN3) can be achieved quite easily using an external resistor Rref in series with the reference channel input to convert a given reference potential Vref to an input current, Iin: I in = Vref Rref + Rin , where Rin is the input impedance of the respective reference channel. On-Chip RF Oscillator An on-chip RF oscillator is enabled if OSCEN = 'High', and its output signal is added to the current output.The oscillator amplitude is set by an external resistor from RS to GND. Its frequency is set by an external resistor RF to GND. The oscillator signal is summed with the programmed Write and Read levels before amplification to the output. The oscillator signal has zero DC level and +I_pk to -I_pk signal swing. Consequently, if the programmed DC level from the Write and Read Channels is less than the PK level programmed for the Oscillator, the combined 2 Zarlink Semiconductor Inc. ZL40518 Data Sheet signal will be clipped on the negative cycle of the signal. This will increase the harmonic content of the output signal and reduce the pk to pk amplitude output. Thermal Considerations Package thermal resistance is 40° C/W under the EIA/JESD51-3 compliant PCB test board condition. Users should ensure that the junction temperature does not exceed 150°C. Thermal resistance from junction to case and to ambient is very much dependent on how the IC is mounted onto the board, on the PCB layout and on any heat extraction arrangements. Power consumption and system ambient operating temperature limits should be noted and careful thermal gradient calculations undertaken to ensure that the junction temperature never exceeds 150°C. Electrical and Optical Pulse Response Lfix = 3nH Iout En Vcc _A 2p 15 C_out Lint K 500 Lfix = 3nH 17p K C_bypass Lint OutA ZL40518 Model Cd Lint=5nH , BW = 460MHz, Rd=7, Q=j20/(15+7) =0.9 Lint=5nH, BW = 460MHz, Rd=3, Q=j20/(15+3) = 1.11 Rd Vd Lint=7nH, BW = 411MHz, Rd=7, Q=j18/(15+7) = 0.8 Lint=7nH, BW = 411MHz, Rd=3, Q=j18/(15+3) = 1.0 Figure 3 - Pulse Response Model Figure 3 illustrates a simplified model of the typical ZL40518 and the application. The ZL40518 consist of an ideal switched current source and an equivalent model of the ZL40518 output stage. The Electrical Model for the Laser Diode is a Voltage source Vd (V_on) in series with the On Resistance Rd all in parallel with the Junction Capacitance Cd. This simplified model approximately represents the Laser Diode Electrical load when operated beyond the Laser Threshold. To a first approximation, the Optical output is proportional to the current flow in the Resistor Rd. The Laser Diode and the ZL40518 are connected together by interconnect tracks with the return current passing through the supply decoupling bypass capacitor between ground and output Vcc. The ZL40518 will typically switch the programmed output current in 400 ps and can be approximated to an ideal switch with a propagation delay of Iout_on (1.2 nS). The electrical pulse response parameters, Trise, Tfall, Overshoot and Undershoot are determined by the combined electrical network as illustrated in Figure 3. For example, the Rise Time and Fall time for large current steps can be slew rate limited by the combined interconnect and fixed interconnect inductance. The Fixed Inductance represents that associated with packaging and minimum interconnect distance . The Interconnect Inductance is that associated with the additional tracking between Laser Diode and the ZL40518 to accommodate application physical limitations. For example, if a pulse of 260 mA amplitude (40 mA to 300 mA) is to be switched in a time of 1 ns with the Vd = 1.6 V, then the maximum volt drop across the interconnect inductance is approximately 3.5 V (maximum Vpin for 300 mA output) - 1.6 V (Vdiode) = 1.9 V. Consequently, L*di/dt < 1.9 V. Hence , L < 1.9/ (0.26A/1ns) = 7.3 nH. 3 Zarlink Semiconductor Inc. ZL40518 Data Sheet Small current step size Rise and Fall time will be determined by the Bandwidth of the combined network. This is dominated by the Interconnect Inductance and the output Capacitance. Similarly, the overshoot and undershoot will be determined by the Q of the network. This is a function of the Source Impedance from the ZL40518, the Interconnect inductance and the Load impedance of the Laser Diode. Figure 3 includes example simplified estimates of the Q and BW of the combined Laser Diode, ZL40518 and interconnect network for two different interconnect inductance values (5 nH & 7 nH) and two different Diode On resistance (3 Ohm & 7 Ohm) . This simple analysis illustrates the change in BW and Q of the network depending on these parameters. This in Turn effects the Rise Time and Fall time and the Overshoot and Undershoot performance achieved in the application. Specified Electrical Performance with 15 mm Interconnect and Zarlink ZLE40518 Evaluation Board The specified performance in the table are results based on the electrical measurements and simulations across full process corners using the Zarlink Evaluation Board using a 6.8 Ohm resistive load to ground. The track interconnect between ZL40518 and the 6.8 Ohm Resistor is 15 mm long and uses a 2 mm wide track on single sided FR4 board. The return path is via two 2 mm wide tracks spaced 0.25 mm either side of the track between output and the 6.8 ohm resistor. The combined forward and return path forms a co planar transmission line with a characteristic impedance of approximately 120 ohms. The tight coupled return paths carrying the return current reduce the effective series inductance (Leff) which can be approximated to:Leff = 2 * Lint * (1 - K) + 2 * Lfix * (1 - K). The ZLE40518 board has two positions for the Laser Diode at two different distances. (15 and 30 mm). The measured value of Leff is 7 nH. The estimated value of Leff = 2 * 8 (1 - 0.5) = 8 nH. The actual pulse response achieved in an application is thus dependent on the application. Application Layer Guide Lines Minimize Interconnect Inductance by:a. Using Short Interconnect Distance b. Use wide interconnect tracks c. Keep the return path tightly coupled to the forward path 4 Zarlink Semiconductor Inc. ZL40518 Data Sheet ZLE40518 Interconnect Figure 4 - ZLE40518 Application Board Electrical Interconnect Application Diagram VCC INR IN2 ANALOG INPUTS GND RF IN3 /ENR /EN2 /EN3 VCC_IN 1 16 2 15 3 14 4 13 5 12 4 11 7 10 8 9 VCC IOUT GND RS PWR_UP OSCEN VCC DIGITAL INPUTS Figure 5 - Evaluation Board Circuit 5 Zarlink Semiconductor Inc. LASER DIODE ZL40518 Data Sheet Pin List Pin No. Pin name Type Function 1 INR Analog Read Channel Input Current 2 IN2 Analog Channel 2 Input Current 3 GND Supply Ground 4 RF Analog External Resistor to ground to set Oscillator Frequency 5 IN3 Analog Channel 3 Input Current 6 /ENR Digital Digital control of Read Channel (active low) 7 /EN2 Digital Digital control of Channel 2 (active low) 8 /EN3 Digital Digital control of Channel 3 (active low) 9 VCC Supply +5 V supply 10 OSCEN Digital Enables RF oscillator (active high) 11 PWR_UP Digital Device Power Up (active high) 12 RS Analog External Resistor to ground to set Oscillator Amplitude 13 GND Supply Ground 14 IOUT Analog Output current for laser diode 15 VCC Supply +5 V supply 16 VCC_IN Supply +5 V supply 6 Zarlink Semiconductor Inc. ZL40518 Data Sheet Absolute Maximum Ratings Permanent damage may occur to any device stressed beyond the “Absolute Maximum Ratings”. Operation at or beyond this stress rating is not implied for this or following sections of this specification. Device reliability can be affected by prolonged exposure to absolute maximum ratings. Parameters Symbol Value Unit Supply voltage Vcc -0.5 to +6.0 V Input voltage at INR, IN2, IN3 VIN1 -0.5 to +2.0 V Input voltage at PWR_UP, /ENR, /EN2, /EN3, OSCEN VIN2 -0.5 to Vcc + 0.5 V Output voltage VOUT -0.5 to Vcc - 1 V Power dissipation PMax 0.71 to 12 W TJ 150 C TStg -65 to +125 C Symbol Units Unit Supply voltage range Vcc 4.5 to 5.5 V Input current IINR IIN2 IIN3 <2.5 <1.0 <1.7 mA External resistor to GND to set oscillator frequency RF >3 kΩ External resistor to GND to set oscillator swing RS >2 kΩ Tamb 0 to +70 C Symbol Value Unit RthJA 1151 K/W Junction temperature Storage temperature range Note 1: Note 2: R thJA ≤115°C/W, Tamb = 70 C R thJA ≤115°C/W, Tamb = 25°C Operating Range Characteristic Operating temperature range Package Thermal Resistance Parameters Junction ambient Note 1: Measured with a multilayer test board (JEDEC standard). 7 Zarlink Semiconductor Inc. ZL40518 Data Sheet Electrical Characteristics - Vcc = 5 V, Tamb = 25°C, PWR_UP = High, Ch2 and Ch3 disabled (/EN2 = /EN3 = high), Read enabled (/ENR = low), OSCEN = Low, unless otherwise specified. Parameters Test Conditions Pin. Symbol Min. Typ. Max. Unit Type* Power Supply Supply current, power down PWR_UP = Low, /EN2 = /EN3 = Low 9, 15, 16 ICCPD2 0.4 mA A Supply current, read mode, oscillator disabled IINR =500 µA, IIN2 = 200 µA, IIN3 = 333 µA 9, 15, 16 ICCR1 86 mA A Supply current, read mode, oscillator enabled IINR =500 µA, IIN2 = 200 µA, IIN3 = 333 µA, OSCEN = High, RS = 7.5 kΩ, RF = 7.5 kΩ 9, 15, 16 ICCR2 90 mA A Supply current, write mode IINR =500 µA, IIN2 = 200 µA, IIN3 = 333 µA, /EN2 = /EN3 = Low 9, 15, 16 ICCW 180 mA A Supply current, input off IINR = IIN2 = IIN3 = 0 µA 9, 15, 16 ICCoff 15 mA A /ENR, /EN2, /EN3 low voltage 6, 7, 8 VNELO V A /ENR, /EN2, /EN3 high voltage 6, 7, 8 VNEHI V A PWR_UP Low Voltage 11 VENLO V A PWR_UP High Voltage 11 VENHI V A OSCEN low voltage 10 VEOLO V A OSCEN high voltage 10 VEOHI 3.0 V A -300 µA C µA C µA C µA C µA C µA C Digital Inputs 1.2 1.9 0.5 2.7 0.5 Current at Digital Inputs /ENR, /EN2, /EN3 low current /EN = 0 V 6, 7, 8 INELO /ENR, /EN2, /EN3 high current /EN = 5 V 6, 7, 8 INEHI PWR_UP Low Current PWR_UP = 0 V 11 IENLO PWR_UP High Current PWR_UP = 5 V 11 IENHI OSCEN low current OSCEN = 0 V 10 IEOLO OSCEN high current OSCEN = 5 V 10 IEOHI 800 -150 100 -100 * A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter 8 Zarlink Semiconductor Inc. 800 ZL40518 Data Sheet Electrical Characteristics - Vcc = 5 V, Tamb = 25°C, PWR_UP = High, unless otherwise specified. Parameters Test Conditions Pin Symbol Min. Typ. Max. Unit Type* mA A mA A Ω C Output IOUT Total output current Output is sourcing 14 IOUT 350 Output current per channel Output is sourcing 14 IOUTR IOUT series resistance Total ROUT to VCC rail 14 ROUT Best fit current gain INR Channel R1 14 GAINR 90 100 130 mA/ mA A Best fit current gain IN2 Channel 21 14 GAIN2 225 250 325 mA/ mA A Best fit current gain IN3 Channel 31 14 GAIN3 135 150 195 mA/ mA A Best fit current offset Any channel 1 14 IOS mA A Output current linearity Any channel 1 14 ILIN % A IIN input impedance RIN,INR is to GND 1 RIN,INR 500 Ω C IIN input impedance RIN,IN2 is to GND 2 RIN,IN2 1250 Ω C IIN input impedance RIN,IN3 is to GND 5 RIN,IN3 750 Ω C EN threshold Temperature stabilised 6, 7, 8 VTH 1.6 V C Output off current 1 PWR_UP = Low 14 IOFF1 1 mA C Output off current 2 /EN2 = /EN3 = High, IINR = 0, IIN2 = 200 µA, IIN3 = 333 µA 14 IOFF2 1 mA C Output off current 3 /EN2 = /EN3 = Low, IINR = IIN2 = IIN3 = 0 µA 14 IOFF3 5 mA C IOUT supply sensitivity, write mode IOUT = 80 mA, 40 mA read + 40 mA write, VCC = 5 V +/10% 14 VSEW 6 %/V C IOUT current output noise IOUT = 40 mA, OSCEN = Low 14 INOO 3 nA/rtHz C 250 2 2.6 -3 +3 *A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter Note 1: Linearity of the amplifier is calculated using a best fit method at three operating points of IOUT at 20 mA, 40 mA, and 60 mA. IOUT = (IIN x GAIN) + I OS 9 Zarlink Semiconductor Inc. ZL40518 Data Sheet Electrical Characteristics: AC Performance - Vcc = 5 V, Iout = 40 mA DC with 40 mA pulse, Tamb = 25°C, unless otherwise specified. Parameters Test Conditions Pin. Symbol Min. Typ. Max. Unit Type* Output AC Performance Write rise time IOUT = 40 mA (read) + 40 mA (10 to 90%)1 14 tRISE 1.0 ns C Write fall time IOUT = 40 mA (read) + 40 mA (10 to 90%)1 14 tFALL 1.1 ns C Output current overshoot IOUT = 40 mA (read) + 40 mA1 14 OS 5 % C IOUT ON propagation delay /EN 50% High-Low to IOUT at 50% of final value 14 tON 2.2 ns C IOUT OFF propagation delay /EN 50% Low-High to IOUT at 50% of final value 14 tOFF 2.0 ns C Disable time PWR_UP 50% High-Low to Iout at 50% of final value 14 tDIS 20 ns C Enable time PWR_UP 50% Low-High to Iout at 50% of final value 14 tEN 23 ns C Amplifier bandwidth IOUT = 50 mA, all channels, -3 dB value 14 BWLCA 28 MHz C Oscillator frequency RF = 7.5 kΩ 14 FOSC MHz A Osc. Temperature coefficient RF = 7.5 kΩ 14 TCOSC +150 ppm/ C C Disable time oscillator OSCEN 50% High-Low to IOUT at 50% of final value 14 TDISO 4 ns C Enable time oscillator OSCEN 50% Low-High to IOUT at 50% of final value 14 TENO 2 ns C Oscillator 288 322 352 * A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter Note 1: Load resistor at IOUT 6.8 ohms, measurement with 50 ohm oscilloscope and 39 ohm series resistor. 10 Zarlink Semiconductor Inc. ZL40518 Data Sheet Characteristic Curves 800 Frequency (MHz) 700 600 500 400 300 200 2 .0 0 3 .0 0 4 .0 0 5 .0 0 6 .0 0 7 .0 0 8 .0 0 9 .0 0 1 0 .0 0 1 1 .0 0 1 2 .0 0 R F (k O h m ) Figure 6 - Oscillator Frequency vs RF (RS=7.5 kΩ) Vcc = 5 V, Temp = 25°C 120 Amplitude (mApk-pk) 100 80 60 40 20 0 2 3 4 5 6 7 8 RS (kOhm s) Figure 7 - Oscillator Swing vs RS (RF=7.5 Ω) Vcc = 5 V, Temp = 25°C 11 Zarlink Semiconductor Inc. 9 10 ZL40518 Data Sheet 60 50 Amplitude (mApk-pk) 40 30 20 10 0 200 250 300 350 400 450 500 Frequency (MHz) Figure 8 - Oscillator Frequency Dependency of Swing Vcc = 5 V, Temp = 25°C 500 Iout (mA) 400 300 200 100 0 0 200 400 600 800 1000 1200 1400 1600 Input Current (uA) Figure 9 - Transfer Characteristic of Channel 2 (Gain = 278, Load Resistor at IOUT = 6.8 Ω) 12 Zarlink Semiconductor Inc. 1800 2000 ZL40518 Data Sheet 0.4 0.35 0.3 Iout (A) 0.25 0.2 0.15 0.1 0.05 0 0 1 2 3 4 5 V o u t (V ) Figure 10 - Voltage Compliance R (IOUT to VCC) = 2.0 Ω Figure 11 - Step Response, Read Channel: 50 mA, Channel 2: 50mApp 13 Zarlink Semiconductor Inc. 6 ZL40518 Data Sheet Figure 12 - Step Response, Read Channel: 50 mA, Channel 2: 250mApp Timing Waveforms PWR_UP /ENR /EN2 /EN3 t EN t ON t ON t OFF t OFF tR tR tR t DIS tR Figure 13 - Output Waveform Showing Addition of Read and Write Levels 14 Zarlink Semiconductor Inc. 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Purchasers of products are also hereby notified that the use of product in certain ways or in combination with Zarlink, or non-Zarlink furnished goods or services may infringe patents or other intellectual property rights owned by Zarlink. This publication is issued to provide information only and (unless agreed by Zarlink in writing) may not be used, applied or reproduced for any purpose nor form part of any order or contract nor to be regarded as a representation relating to the products or services concerned. The products, their specifications, services and other information appearing in this publication are subject to change by Zarlink without notice. No warranty or guarantee express or implied is made regarding the capability, performance or suitability of any product or service. Information concerning possible methods of use is provided as a guide only and does not constitute any guarantee that such methods of use will be satisfactory in a specific piece of equipment. It is the user’s responsibility to fully determine the performance and suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not been superseded. Manufacturing does not necessarily include testing of all functions or parameters. These products are not suitable for use in any medical products whose failure to perform may result in significant injury or death to the user. All products and materials are sold and services provided subject to Zarlink’s conditions of sale which are available on request. Purchase of Zarlink’s I2C components conveys a licence under the Philips I2C Patent rights to use these components in and I2C System, provided that the system conforms to the I2C Standard Specification as defined by Philips. Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc. Copyright Zarlink Semiconductor Inc. All Rights Reserved. TECHNICAL DOCUMENTATION - NOT FOR RESALE