ZL60301 Parallel Fiber Optic Transceiver (4 + 4) x 2.7 Gbps Data Sheet June 2004 Ordering Information ZL60301/MJD Parallel Fiber Transceiver Heat sink and EMI shield options are available upon request 0°C to +80°C Features • Industry standard MPO/MTP ribbon fiber connector interface 4 Transmit channels and 4 Receive channels • Pluggable MegArray® ball grid array connector • Data rate up to 2.7 Gbps per channel • Optionally available with EMI shield and external heat sink • 850 nm VCSEL array • Laser class 1M IEC 60825-1:2001 compliant • Data I/O is CML compatible with DC blocking capacitors • Low power consumption, max 1 W • Link reach 300 m with 50/125 µm 500 MHz.km fiber at 2.5 Gbps • Power supply 3.3 V • Channel BER better than 10-12 • Complies with POP4 MSA specification • Rx_EN Rx_SD SQ_EN VCCA Rx 0RX0 TransImpedance and Limiting Amplifier DOUT0+ DOUT0DOUT3+ DOUT3DIN3+ DIN3- VCCB Rx VEE Rx PIN Array 1RX1 2RX2 3RX3 VCSEL Driver VCSEL Array DIN0+ DIN0- 3TX3 2TX2 1TX1 0TX0 VCSEL Driver Controller Tx_EN Tx_DIS RESET FAULT VCC Tx VEE TX Figure 1 - Transceiver Block Diagram 1 Zarlink Semiconductor Inc. Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc. Copyright 2004, Zarlink Semiconductor Inc. All Rights Reserved. ZL60301 Data Sheet Applications • High-speed interconnects within and between switches, routers and transport equipment • Proprietary backplanes • Interconnects rack-to-rack, shelf-to-shelf, board-to-board, board-to-optical backplane Description The ZL60301 is a very high-speed transceiver for parallel fiber applications. This transceiver performs E/O and O/E conversions for data transmission over multimode fiber ribbon. The transmit section converts parallel electrical input signals via a laser driver and a VCSEL array into parallel optical output signals at a wavelength of 850 nm. The receive section converts parallel optical input signals via a PIN photodiode array and a transimpedance and limiting amplifier, into electrical output signals. The module is fitted with a pluggable industry-standard MegArray® BGA connector. This provides ease of assembly on the host board and enables provisioning of bandwidth on demand. 2 Zarlink Semiconductor Inc. ZL60301 Data Sheet Table of Contents Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Transmitter Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Transmitter Control and Status Signal Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Transmitter Control and Status Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Receiver Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Receiver Control and Status Signal Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Receiver Control and Status Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Transceiver Module Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Transceiver Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Regulatory Compliance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Eye safety . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Electrostatic discharge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Electrostatic discharge immunity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Electromagnetic Interference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Emission . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Immunity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Handling instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Cleaning the Optical Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 ESD handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Link Reach . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Link Model Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Electrical Interface - Application Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3 Zarlink Semiconductor Inc. ZL60301 Data Sheet Absolute Maximum Ratings Not necessarily applied together. Exceeding these values may cause permanent damage. Functional operation under these conditions is not implied. Parameter Supply voltage Differential input voltage amplitude Symbol Min. Max. Unit VCC -0.3 4.0 V 1.2 V ∆V 1 Voltage on any pin VPIN -0.3 VCC + 0.3 V Relative humidity (non-condensing) MOS 5 95 % Storage temperature TSTG -40 100 °C ESD resistance VESD ±1 kV 1. Differential input voltage amplitude is defined as ∆V = DIN+ − DIN-. Recommended Operating Conditions Parameter Symbol Min. Max. Unit VCC 3.135 3.465 V Operating case temperature TCASE 0 80 °C Signalling rate (per channel)1 fD 1.0 2.7 Gbps LD 2 m CBLK 100 nF Power supply voltage 2 Link distance Data I/O DC blocking capacitors 3 Power supply noise4 VNPS 200 mVp-p 1. Data patterns are to have maximum run lengths and DC balance shifts no worse than that of a Pseudo Random Bit Sequence of length 223-1 (PRBS-23). Information on lower bit rates and longer run lengths are available on request. 2. For maximum distance, see Table 4. 3. For AC-coupling, DC blocking capacitors external to the module with a minimum value of 100 nF is recommended. 4. Power supply noise is defined at the supply side of the recommended filter for all VCC supplies over the frequency range of 500 Hz to 2700 MHz with the recommended power supply filter in place. L1 1 µH L2 6.8 nH R1 100 Ω R2 1.0 kΩ Host Vcc Module Vcc C1 10 µF C2 10 µF C3 0.1 µF C4 0.1 µF Figure 2 - Recommended Power Supply Filter 4 Zarlink Semiconductor Inc. ZL60301 Data Sheet Transmitter Specifications All parameters below require operating conditions according to “Recommended Operating Conditions” on page 4. Parameter Symbol Min. Max. Unit Launch power (50/125 µm MMF)1 POUT -8 -2 dBm Extinguished output power POFF -30 dBm Optical Parameters 2 ER 6 dB Optical modulation amplitude3 OMA 0.30 mW λC 830 Extinction ratio 860 nm ∆λ 0.85 nmrms RIN12OMA -116 dB/Hz tRO 150 ps tFO 150 ps Total jitter contributed (peak to peak) TJ 120 ps Deterministic jitter contributed (peak to peak) DJ 50 ps Channel to channel skew7 tSK 100 ps PD 500 mW ICC 150 mA Center wavelength 4 Relative intensity noise OMA5 Spectral width Optical output rise time (20 - 80%) Optical output fall time (20 - 80%) 6 Electrical Parameters Power dissipation Supply current ∆VIN 200 800 mVp-p Differential input impedance9 ZIN 80 120 Ω Electrical input rise time (20 - 80%) tRE 160 ps Electrical input fall time (20 - 80%) tFE 160 ps 8 Differential input voltage amplitude (peak to peak) 1. The output optical power is compliant with IEC 60825-1 Amendment 2, Class 1M Accessible Emission Limits. 2. The extinction ratio is measured at 622 Mbps. 3. Informative. Corresponds to POUT = -8 dBm and ER = 6 dBm. 4. Spectral width is measured as defined in EIA/TIA-455-127 Spectral Characterization of Multimode Laser Diodes. 5. Corresponds to a Relative Intensity Noise (RIN) of -120 dB/Hz. 6. Total jitter equals TP1 to TP2 as defined in IEEE 802.3 clauses 38.2 and 38.6 (Gigabit Ethernet). 7. Channel skew is defined for the condition of equal amplitude, zero ps skew signals applied to the transmitter inputs. 8. Differential input voltage is defined as the peak to peak value of the differential voltage between DIN+ and DIN-. Data inputs are CML compatible. 9. Differential input impedance is measured between DIN+ and DIN-. 5 Zarlink Semiconductor Inc. ZL60301 Classified in accordance with IEC 60825-1/A2:2001, IEC 60825-2 : 2000 Class 1M Laser Product Emited wavelength: 840 nm DIN+ 50Ω 50Ω DIN- VCC 13kΩ 11kΩ VEE Figure 3 - Differential CML Input Equivalent Circuit 6 Zarlink Semiconductor Inc. Data Sheet ZL60301 Data Sheet Transmitter Control and Status Signal Requirements The following table shows the timing relationships of the status and control signals of the transmit section. Parameter Symbol Min. Control input voltage high1 VIH 2.1 Control input voltage low VIL Control pull-up resistor2 Control pull-down resistor 3 Typ. Max. Unit V 0.62 V RPU 10 kΩ RPD1 10 kΩ Status output voltage low4, 5 VOL Status pull-down resistor4 RPD2 0.4 10 V kΩ FAULT assert time TFA 100 µs FAULT lasers off TFD 100 µs RESET duration TTDD RESET assert time TOFF RESET de-assert time µs 10 10 µs TON 100 ms Tx_EN assert time TTEN 1 ms Tx_EN de-assert time TTD 5 10 µs Tx_DIS assert time TTD 5 10 µs Tx_DIS de-assert time TTEN 1 ms 1. Applies to control signals RESET, Tx_DIS and Tx_EN. 2. Applies to control signals RESET and Tx_EN. Internal pull-up resistor. 3. Applies to control signal Tx_DIS. Internal pull-down resistor. 4. Applies to status signal FAULT. Internal pull-down to VEE. 5. With status output sink current max. 2 mA. 7 Zarlink Semiconductor Inc. 5 ZL60301 Data Sheet Transmitter Control and Status Timing Diagrams The following figures show the timing relationships of the status and control signals of the transmit section. VCC TTEN Tx Output [0:3] Data [0:3] Transmitter Not Ready Normal operation RESET: floating or high Figure 4 - Transmitter Power-up Sequence FAULT TFA TFD Data [0:3] Tx Output [0:3] No Fault Fault Figure 5 - Transmitter Fault Signal Timing Diagram 8 Zarlink Semiconductor Inc. ZL60301 Data Sheet RESET FAULT TTDD TON Data [0:3] Tx Output [0:3] Transmitter Not Ready Normal operation Figure 6 - Transmitter Reset Signal Timing Diagram Tx_DIS Tx_EN TTD TTD Lasers off Data [0:3] Normal operation Lasers off Data [0:3] Tx Off Normal operation Tx Off Tx_EN TTEN Data [0:3] Transmitter Not Ready Normal operation Figure 7 - Transmitter Enable and Disable Timing Diagram Tx_DIS High Tx_DIS Low Tx_EN High Transmitter disabled Normal operation Tx_EN Low Transmitter disabled Transmitter disabled Table 1 - TruthTable for Transmitter Operation (Pre-condition: RESET floating or HIGH) 9 Zarlink Semiconductor Inc. ZL60301 Data Sheet Receiver Specifications All parameters below require operating conditions according to “Recommended Operating Conditions” on page 4 and a termination load of 100 Ω differential at the electrical output. Parameter Symbol Min. Max. Unit Input optical power PIN -16 -2 dBm Center wavelength λC 830 860 nm RL 12 Optical Parameters 1 2 Return loss 3 dB Stressed receiver sensitivity PSS -11.7 dBm Channel to channel skew4 tSK 100 ps Signal detect assert PSA -17 dBm Signal detect de-assert PSD -31 dBm Electrical Parameters Power dissipation Supply current PD 500 mW ICC 150 mA ∆VOUT 500 800 mVp-p ZL 80 120 Ω Stressed receiver eye opening PSE 0.3 Electrical output rise time (20 - 80%) tRE 160 ps tFE 160 ps 5 Differential output voltage amplitude (peak to peak) Output differential load impedance6 7 Electrical output fall time (20 - 80%) -12 UI 1. Receive power for a channel is measured for a BER of 10 and worst case extinction ratio. PIN (Min) is measured using a fast rise/fall time source with low RIN and adjacent channel(s) operating with incident power of 6 dB above PIN (Min). 2. Return loss is measured as defined in TIA/EIA-455-107A Determination of Component Reflectance or Link/System Return Loss Using a Loss Test Set. 3. The stressed receiver sensitivity is measured using PRBS 223-1 pattern, 2.6 dB inter-symbol interference, ISI (Min), 30 ps duty cycle dependent deterministic jitter, DCD DJ (Min), and 6 dB extinction ratio, ER (Min) (ER penalty = 2.2 dB). All channels not under test are receiving signals with an average input power of 6 dB above PIN (Min). 4. Channel skew is defined for the condition of equal amplitude, zero ps skew signals applied to the receiver inputs. 5. Differential output voltage is defined as the peak to peak value of the differential voltage between DOUT+ and DOUT- and measured with a 100 Ω differential load connected between DOUT+ and DOUT-. Data outputs are CML compatible. 6. See Figure 13. 7. The stressed receiver eye opening represents the eye at TP4 as defined in IEEE 802.3 clauses 38.2 and 38.6 (Gigabit Ethernet). The stressed receiver eye opening is measured using PRBS 223-1 pattern, 2.6 dB ISI min, 30 ps DCD DJ min, 6 dB ER min and an average input power of -11.2 dBm (0.5 dB above minimum stressed receiver sensitivity as defined in IEEE 802.3 clause 38.6). All channels not under test are receiving signals with an average input power of 6 dB above PIN (Min). 10 Zarlink Semiconductor Inc. ZL60301 Data Sheet Receiver Control and Status Signal Requirements The following table shows the timing relationships of the status and control signals of the receive section. Parameter Symbol Min. VIH 2.0 Control input voltage high1 Control input voltage low 1 Typ. IIN 2, 3 Unit V VIL Control input pull-up current1 Max. 10 0.9 V 100 µA 0.4 V Status output voltage low VOL Status output pull-up resistor2 RPU 3.25 Receiver signal detect assert time TSD 50 200 µs Receiver signal detect de-assert time TLOS 50 200 µs Receiver enable assert time TRXEN 33 ms Receiver enable de-assert time TRXD 5 µs kΩ 1. Applies to control signals Rx_EN, SQ_EN. 2. Applies to status signal Rx_SD. Internal pull-up to VCC. 3. With status output sink current max 2 mA. Receiver Control and Status Timing Diagrams The following figures show the timing relationships of the status and control signals of the receive section. Rx_EN TRXD ICC Normal Operation Rx Off Figure 8 - Receiver Enable Signal Timing Diagram 11 Zarlink Semiconductor Inc. ZL60301 Data Sheet Rx_SD TLOS Signal No Signal Figure 9 - Receiver Signal Detect Timing Diagram Transceiver Module Signals The pluggable parallel optical transceiver uses a 100 position FCI MegArray electrical connector (FCI PN: 84513-101), and an industry standard MTP(MPO) optical receptacle compliant with IEC 61754-7. K J H G F E D C B A 1 DOUT00- VEE Rx DOUT03+ VEE Rx VEE Rx VEE Tx VEE Tx DIN03- VEE Tx DIN00+ 2 DOUT00+ VEE Rx DOUT03- VEE Rx VEE Rx VEE Tx VEE Tx DIN03+ VEE Tx DIN00- 3 VEE Rx VEE Rx VEE Rx VEE Rx VEE Rx VEE Tx VEE Tx VEE Tx VEE Tx VEE Tx 4 DOUT01+ VEE Rx DOUT02- NIC NIC NIC NIC DIN02+ VEE Tx DIN01- 5 DOUT01- VEE Rx DOUT02+ NIC NIC NIC NIC DIN02- VEE Tx DIN01+ 6 VEE Rx VEE Rx VEE Rx NIC NIC NIC NIC VEE Tx VEE Tx VEE Tx 7 VCCB Rx VCCB Rx VCCB Rx NIC NIC NIC NIC VCC Tx VCC Tx VCC Tx 8 NIC DNC DNC DNC RX_EN TX_DIS TX_EN DNC DNC DNC 9 NIC DNC DNC SD SQ_EN RESET FAULT DNC DNC DNC 10 VCCA Rx VCCA Rx VEE Rx NIC NIC NIC NIC VEE Tx VCC Tx VCC Tx Table 2 - Transceiver Pinout Assignments (Top view, toward MPO/MTP connector end) (10x10 array, 1.27 mm pitch) Module front view - MTP key up Tx0 Tx1 Tx2 Tx3 − − − − Rx3 Host printed circuit board Table 3 - Transceiver Optical Channel Assignment 12 Zarlink Semiconductor Inc. Rx2 Rx1 Rx0 ZL60301 Data Sheet Transceiver Pin Description The transceiver module case is electrically isolated from Transmitter signal common and Receiver signal common. Connection through mounting screw holes or frontplate whichever is applicable. Make the appropriate electrical connection for EMI shield integrity. Signal Name Type DIN[0:3] +/- Data input Description Transmitter data in, channel 0 to 3 Comments Internal differential termination at 100 Ω. VCC Tx Transmitter power supply rail VEE Tx Transmitter signal common. All transmitter voltages are referenced to this potential unless otherwise stated. Directly connect these pads to the PC board transmitter signal ground plane. TX_EN Control input Transmitter enable. HIGH: normal operation LOW: disable transmitter Active high, internal pull-up. See Table 1. TX_DIS Control input Transmitter disable. HIGH: disable transmitter LOW: normal operation Active high, internal pulldown. See Table 1. FAULT Status output Transmitter fault. HIGH: normal operation LOW: laser fault detected on at least one channel When active, all channels are disabled. Clear by reset signal. Internal pull-up. RESET Control input Transmitter reset. HIGH: normal operation LOW:reset to clear fault signal Internal pull-up. DOUT[0:3] +/- Data output Receiver data out, channel 0 to 3. VCCA Rx PIN preamplifier power supply rail. VCCB Rx Receiver quantizer power supply rail. VEE Rx Receiver signal common. All receiver voltages are referenced to this potential unless otherwise stated. Directly connect these pads to the PC board receiver signal ground plane. RX_EN Control input Receiver enable. HIGH: normal operation LOW: disable receiver Internal pull-up. RX_SD Status output Receiver signal detect. HIGH: valid optical input on all channels LOW: loss of signal on at least one channel Internal pull-up. SQ_EN Control input Squelch enable. HIGH: squelch function enabled. Data OUT is squelched on any channels that have loss of signal LOW: squelch function disabled Internal pull-up. DNC Do not connect to any potential, including ground. NIC No internal connection. 13 Zarlink Semiconductor Inc. ZL60301 Data Sheet VCCA and VCCB Rx can be connected to the same power supply. However, to insure maximum receiver sensitivity and minimize the impact of noise from the power supply, it is recommended to keep the power supplies separate and to use the recommended power supply filtering network on VCCA Rx, see Figure 2. Thermal Characteristics There are three options for heat sinks depending on the cooling needs. They are: 1. Direct application without any attached external heat sink 2. Use a generic external heat sink specified by Zarlink 3. Use a customer designed external heat sink In Figure 10 and Figure 11, the temperature rise and thermal resistance as a function of air velocity (free air velocity at the top of the module) is shown for option 1 and 2. The thermal resistance is defined as the temperature difference between the case temperature and ambient flowing air divided by the total heat dissipation of the module. Improved thermal properties can be achieved by using a larger heat sink especially if more height is available (option 3). For this option, a more detailed discussion with Zarlink is recommended regarding heat sink design attachment materials. Tem perature rise at 1.0W (Free stream air velocity) Option ZL60301/MLD Option ZL60301/MJD Temperature rise (K) 16 12 8 4 0 0 1 2 3 Air velocity (m /s) 4 5 Figure 10 - Temperature Difference Between Ambient Flowing Air and Case at a Heat Dissipation of 1.0 W 14 Zarlink Semiconductor Inc. ZL60301 Data Sheet Therm al resistance to air (Free stream air velocity) Thermal resistance (K/W) 15 10 Option ZL60301/MLD 5 Option ZL60301/MJD 0 0 1 2 3 4 5 Air velocity (m /s) Figure 11 - Thermal Resistance, as a Function of Air Velocity (the airflow is along the shortest side of the module) For any other orientation, the thermal resistance is 75-100% of the values shown above. 15 Zarlink Semiconductor Inc. ZL60301 Data Sheet Regulatory Compliance Eye safety The maximum optical output power is specified to comply with Class 1M in accordance with IEC 60825−1:2001. In addition the transmitter complies with FDA performance standards for laser products except for deviations pursuant to Laser Notice No.50, dated July 26, 2001. No maintenance or service of the product may be performed. Electrostatic discharge The module is classified as Class 1 (> 1000 Volts) according to MIL−STD−883, test method 3015.7, with regards to the electrical pads. Electrostatic discharge immunity The part withstand a 15 kV (air discharge) and 8 kV (contact discharge) either indirect or directly to receptacle; tested according to IEC 61000−4−2, while in operation without addition of bit errors. Electromagnetic Interference Emission The electromagnetic emission is tested in front of the module (module fitted with EMI shield), with the module mounted in a frontplate cutout. The part is tested with FCC Part 15, 30 − 1000 MHz and 1 GHz to 5th harmonic of the highest fundamental frequency (6.75 GHz), and is specified to be Class B with > 6 dB margin. Immunity The electromagnetic immunity is tested without a front panel or enclosure. The module specification is maintained with an applied field of 10 V/m for frequencies between 10 kHz and 10 GHz, according to IEC 61000−4−3 and GR− 1089−CORE. Handling instructions Cleaning the Optical Interface A protective connector plug is supplied with each module. This plug should remain in place whenever a fiber cable is not inserted. This will keep the optical port free from dust or other contaminants, which may potentially degrade the optical signal. Before reattaching the connector plug to the module, visually inspect the plug and remove any contamination. If the module’s optical port becomes contaminated, it can be cleaned with high-pressure nitrogen (the use of fluids, or physical contact, is not advised due to potential for damage). Before a fiber cable connector is attached to the module, it is recommended to clean the fiber cable connector using an optical connector cleaner, or according to the cable manufacturer's instructions. It is also recommended to clean the optical port of the module with high-pressure nitrogen. Connectors For optimum performance, it is recommended that the number of insertions is limited to 50 for the electrical MegArray connector and 200 for the optical MPO/MTP connector. ESD handling When handling the modules, precautions for ESD sensitive devices should be taken. These include use of ESD protected work areas with wrist straps, controlled work-benches, floors etc. 16 Zarlink Semiconductor Inc. ZL60301 Data Sheet Link Reach The following table lists the minimum reach distance of the pluggable parallel fiber optic transceiver for different multi-mode fiber (MMF) types and bandwidths assuming worst case parameters. Each case allows for a maximum of 2 dB per channel connection loss for patch cables and other connectors. Fiber Type Modal Bandwidth @ 850 nm [MHz*km] Reach Distance @ 1 Gbps [m] Reach Distance @ 2.5 Gbps [m] Reach Distance @ 2.7 Gbps [m] 62.5/125 MMF 200 350 135 115 62.5/125 or 50/125 MMF 400 650 260 220 50/125 MMF 500 750 300 270 [core / cladding µm] Table 4 - Link Reach for Different Fiber Types and Data Rates Link Model Parameters The link reaches above have been calculated using the following link model parameters and Gigabit Ethernet link model version 2.3.5 (filename: 5pmd047.xls). Parameter Symbol Value k 0.3 Modal noise MN 0.3 dB Dispersion slope parameter SO 0.11 ps/nm2*km Wavelength of zero dispersion UO 1320 nm Attenuation coefficient at 850 nm αdB 3.5 dB/km Conversion factor C1 480 ns.MHz Q-factor [BER 10-12] Q 7.04 Mode partition noise k-factor TP4 eye opening Unit 0.3 UI DCD DJ 0.08 UI RMS baseline wander S.D. σBLW 0.025 RIN coefficient kRIN 0.70 Conversion factor c_rx 329 DCD allocation at TP3 17 Zarlink Semiconductor Inc. ns.MHz ZL60301 Data Sheet Electrical Interface - Application Examples Recommended CML output Transmitter CML input Host PCB 100nF ZOUT=100Ω Differential ZIN=100Ω Differential Z0=100Ω Differential 100nF Figure 12 - Recommended Differential CML Input Interface Receiver CML output Recommended CML input Host PCB 100nF Z0=100Ω Differential ZTERM=100Ω Differential 100nF ZL Figure 13 - Recommended Differential CML Output Interface 18 Zarlink Semiconductor Inc. 17 FRONT VIEW ( 2 : 1 ) 1,5 (5x) 0,9 5,8 7,6 15,5 MAX 27 12,6 8,5 NOTES:1, All dimensions in mm. 2, Tolerancing per ASME Y14.5M-1994 Washplug Assembly External Heatink Module * * For details of the module, see separate data sheet and/or package drawing. Projection Method Package code © Zarlink Semiconductor 2002. All rights reserved. ISSUE 2 ACN 104518 rev2 DATE 11-AUG-04 APPRD. MD/MA Previous package codes Drawing type ML Package Drawing, Module Layout External Heatsink Title 104518 NOTES:1. All dimensions in mm. 2. Tolerancing per ASME Y14.5M-1994. Package code © Zarlink Semiconductor 2002. All rights reserved. ISSUE 1 ACN JS004296R1A DATE 12-JUN-03 APPRD. TD/BE Previous package codes MJ Drawing type Package drawing - module layout Title JS004296 NOTES:1. All dimensions in mm. 2. Tolerancing per ASME Y14.5M-1994. Package code © Zarlink Semiconductor 2002. All rights reserved. ISSUE 1 ACN JS004296R1A DATE 12-JUN-03 APPRD. TD/BE Previous package codes MJ Drawing type Package Drawing, Host circuit board footprint layout Title JS004296 For more information about all Zarlink products visit our Web Site at www.zarlink.com Information relating to products and services furnished herein by Zarlink Semiconductor Inc. or its subsidiaries (collectively “Zarlink”) is believed to be reliable. However, Zarlink assumes no liability for errors that may appear in this publication, or for liability otherwise arising from the application or use of any such information, product or service or for any infringement of patents or other intellectual property rights owned by third parties which may result from such application or use. Neither the supply of such information or purchase of product or service conveys any license, either express or implied, under patents or other intellectual property rights owned by Zarlink or licensed from third parties by Zarlink, whatsoever. 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