STMicroelectronics ESDALC5-1BT2Y Automotive single-line low capacitance transil Datasheet

ESDALC5-1BT2Y
Automotive single-line low capacitance Transil™,
transient surge voltage suppressor (TVS) for ESD protection
Datasheet − production data
Applications
Where transient overvoltage protection in ESD
sensitive equipment is required, such as:
• Automotive applications
• Computers
• Printers
• Communication systems
• Cellular phone handsets and accessories
SOD882T
ESDALC5-1BT2Y
• Video equipment
Description
Features
The ESDALC5-1BT2Y is bidirectional single-line
TVS diode designed to protect data lines or other
I/O ports against ESD transients.
• Single-line bidirectional protection
• Breakdown voltage = 5.8 V min.
This device is ideal for applications where both
printed circuit board space and power absorption
capability are required.
• Low capacitance = 26 pF at 0 V
• Lead-free packages
• ECOPACK®2 compliant component
Figure 1. Functional diagram
• AEC-Q101 qualified
Benefits
I/O1
• Low capacitance for optimized data integrity
• Low leakage current < 60 nA
• Low PCB space consumption: 0.6 mm2
• High reliability offered by monolithic integration
I/O2
Complies with the following standards:
• IEC 61000-4-2 (exceeds level 4)
– 30 kV (air discharge)
– 30kV (contact discharge)
• ISO10605: C = 330 pF, R = 330 Ω
– 30kV (air discharge)
– 30kV (contact discharge)
• ISO 7637-3:
– Pulse 3a: VS = -150 V
– Pulse 3b: VS = +100 V
February 2014
This is information on a product in full production.
TM: Transil is a trademark of STMicroelectronics
DocID025820 Rev 1
1/12
www.st.com
Characteristics
1
ESDALC5-1BT2Y
Characteristics
Table 1. Absolute maximum ratings (Tamb = 25 °C)
Symbol
Parameter
Value
Unit
30
30
30
30
25
kV
150
W
9
A
IEC 61000-4-2 contact discharge
IEC 61000-4-2 air discharge
ISO10605 contact discharge
ISO10605 air discharge
MIL STD 883G - Method 3015-7: class 3
VPP
Peak pulse voltage
PPP
Peak pulse power dissipation (8/20 µs)
IPP
Peak pulse current (8/20 µs)
TOP
Operating junction temperature range
- 50 to + 125
°C
Tstg
Storage temperature range
- 65 to + 125
°C
TL
Maximum lead temperature for soldering during 10 s
260
°C
Tj initial = Tamb
Figure 2. Electrical characteristics (definitions)
I
Symbol
VBR
=
VCL
=
IRM
=
VRM
=
IPP
=
IR
=
VTRIG
=
Cline
=
RD
=
Parameter
Breakdown voltage
Clamping voltage
Leakage current @ VRM
Stand-off voltage
Peak pulse current
Breakdown current
Triggering voltage
Input capacitance per line
Dynamic resistance
RD
VCL VTrig VBR VRM
V
IRM
IR
I PP
Table 2. Electrical characteristics (values, Tamb = 25 °C)
Symbol
VBR
2/12
Test condition
Min.
Typ.
Max.
From I/O1 to I/O2, IR = 1 mA
11
13
17
From I/O2 to I/O1, IR = 1 mA
5.8
8
11
Unit
V
IRM
VRM = 5 V
Rd
Dynamic resistance, pulse width 100 ns
From I/O1 to I/O2
From I/O2 to I/O1
0.25
0.23
Ω
VCL
8 kV contact discharge after 30 ns IEC 61000 4-2
From I/O1 to I/O2
From I/O2 to I/O1
17.5
12.5
V
Cline
F = 1 MHz, VR = 0 V
60
26
DocID025820 Rev 1
30
nA
pF
ESDALC5-1BT2Y
Characteristics
Figure 3. Peak pulse power versus initial
junction temperature (maximum values)
Figure 4. Junction capacitance versus reverse
voltage applied (typical values)
250 PPP(W)
C(pF)
225
35
200
30
8/20µs
175
150
25
125
20
100
15
75
10
50
5
25
0
Tj (°C)
50
25
0
75
100
VR(V)
0
0
150
125
Figure 5. Peak pulse power versus exponential
pulse duration (maximum values)
10000
T j = 25 °C
F = 1 MHz
Vosc = 30 mV
PPP (W)
1
2
3
4
5
Figure 6. Clamping voltage versus peak pulse
current (typical values)
10
I PP (A)
8/20µs
Tj initial = 25 °C
From I/O1 to I/O2
1000
100
1
10
VCL(V)
tp(µs)
1
1
10
100
1000
Figure 7. Clamping voltage versus peak pulse
current (typical values)
10
I PP (A)
0.1
12 13
15
16
17
18
19
20
21
22
23
Figure 8. Leakage current versus junction
temperature (typical values)
1000
8/20µs
Tj initial = 25 °C
From I/O2 to I/O1
14
I R (nA)
VR = V RM = 5 V
100
10
1
1
0.1
Tj (°C)
VCL(V)
0.1
7
8
9
10
11
12
13
14
15
16
0.01
25
DocID025820 Rev 1
50
75
100
125
3/12
12
Characteristics
ESDALC5-1BT2Y
Figure 9. S21 attenuation measurement
0
dB
Figure 10. TLP measurements
IPP (A)
,
20
18
-5
from I/O2 to I/O1
16
-10
14
12
-15
10
8
-20
6
-25
from I/O1to I/O2
4
F (Hz)
-30
100k
1M
10M
2
100M
1G
VCL (V)
0
0
Figure 11. ESD response to ISO 10605,
C = 150 pF, R = 330 Ω (+8 kV contact)
10 V/div
5
10
15
20
25
Figure 12. ESD response to ISO 10605,
C = 150 pF, R = 330 Ω (-8 kV contact)
10 V/div
20 ns/div
20 ns/div
Figure 13. Response to ISO 7637-3 (pulse 3a)
US = -150 V
Figure 14. Response to ISO 7637-3 (pulse 3b)
US = +100 V
5 V/div
5 V/div
0.5 A/div
0.5 A /div
50 ns/div
50 ns/div
4/12
DocID025820 Rev 1
ESDALC5-1BT2Y
2
Package information
Package information
•
Epoxy meets UL94, V0
•
Lead-free packages
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
Figure 15. SOD882T dimension definitions
L1
L2
b1
b2
PIN # 1 ID
e
A
A1
E
D
DocID025820 Rev 1
5/12
12
Package information
ESDALC5-1BT2Y
Table 3. SOD882T dimension values
Dimensions
Ref.
Millimeters
Min.
Typ.
Inches
Max.
Min.
Typ.
Max.
A
0.30
0.40
0.012
0.016
A1
0.00
0.05
0.000
0.002
b1
0.45
0.50
0.55
0.018
0.020
0.022
b2
0.45
0.50
0.55
0.018
0.020
0.022
D
0.55
0.60
0.65
0.022
0.024
0.026
E
0.95
1.00
1.05
0.037
0.039
0.041
e
0.60
0.65
0.70
0.024
0.026
0.028
L1
0.20
0.25
0.30
0.008
0.010
0.012
L2
0.20
0.25
0.30
0.008
0.010
0.012
Figure 16. SOD882T footprint in mm
(inches)
0.55
(0.022)
Figure 17. SOD882T marking
0.55
(0.022)
0.50
(0.020)
I/O 1
A
I/O 2
0.40
(0.016)
Note:
6/12
Product marking may be rotated by multiples of 90° for assembly plant differentiation. In no
case should this product marking be used to orient the component for its placement on a
PCB. Only pin 1 mark is to be used for this purpose.
DocID025820 Rev 1
ESDALC5-1BT2Y
Package information
Figure 18. SOD882T tape and reel specifications
Bar indicates Pin 1
2.0
1.50
4.0
3.5
1.15
8.0
1.75
0.20
X
X
X
X
X
All dimensions in mm
X
X
0.47
2.0
0.70
User direction of unreeling
DocID025820 Rev 1
7/12
12
Recommendation on PCB assembly
ESDALC5-1BT2Y
3
Recommendation on PCB assembly
3.1
Stencil opening design
1.
General recommendation on stencil opening design
a)
Stencil opening dimensions: L (Length), W (Width), T (Thickness).
Figure 19. Stencil opening dimensions
L
T
b)
W
General design rule
Stencil thickness (T) = 75 ~ 125 µm
W
Aspect Ratio = ----- ≥ 1,5
T
L×W
Aspect Area = ---------------------------- ≥ 0,66
2T ( L + W )
2.
Reference design
a)
Stencil opening thickness: 100 µm
b)
Stencil opening for central exposed pad: Opening to footprint ratio is 50%.
c)
Stencil opening for leads: Opening to footprint ratio is 90%.
Figure 20. Recommended stencil window position in mm (inches)
0.55
(0.022)
0.50
(0.020)
0.474
(0.019)
0.013
0.013
(0.00051) (0.00051)
0.40
(0.016)
0.014
0.014
(0.00055) (0.00055)
0.522
(0.021)
8/12
DocID025820 Rev 1
Lead footprint on PCB
Stencil window opening
ESDALC5-1BT2Y
3.2
3.3
3.4
Recommendation on PCB assembly
Solder paste
1.
Halide-free flux qualification ROL0 according to ANSI/J-STD-004.
2.
“No clean” solder paste is recommended.
3.
Offers a high tack force to resist component movement during high speed.
4.
Solder paste with fine particles: powder particle size is 20-45 µm.
Placement
1.
Manual positioning is not recommended.
2.
It is recommended to use the lead recognition capabilities of the placement system, not
the outline centering.
3.
Standard tolerance of ± 0.05 mm is recommended.
4.
3.5 N placement force is recommended. Too much placement force can lead to
squeezed out solder paste and cause solder joints to short. Too low placement force
can lead to insufficient contact between package and solder paste that could cause
open solder joints or badly centered packages.
5.
To improve the package placement accuracy, a bottom side optical control should be
performed with a high resolution tool.
6.
For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is
recommended during solder paste printing, pick and place and reflow soldering by
using optimized tools.
PCB design preference
1.
To control the solder paste amount, the closed via is recommended instead of open
vias.
2.
The position of tracks and open vias in the solder area should be well balanced. The
symmetrical layout is recommended, in case any tilt phenomena caused by
asymmetrical solder paste amount due to the solder flow away.
DocID025820 Rev 1
9/12
12
Recommendation on PCB assembly
3.5
ESDALC5-1BT2Y
Reflow profile
Figure 21. ST ECOPACK® recommended soldering reflow profile for PCB mounting
240-245 °C
Temperature (°C)
250
-2 °C/s
2 - 3 °C/s
60 sec
(90 max)
200
-3 °C/s
150
-6 °C/s
100
0.9 °C/s
50
Time (s)
0
Note:
10/12
30
60
90
120
150
180
210
240
270
300
Minimize air convection currents in the reflow oven to avoid component movement.
DocID025820 Rev 1
ESDALC5-1BT2Y
4
Ordering information
Ordering information
Figure 22. Ordering information scheme
ESDA LC
5 - 1 B T2 Y
ESD array
Low capacitance
Breakdown voltage
5 = 5.8 Volts min
Number of lines
Directional
B = Bidirectional
Package
T2 = Thin SOD882
Automotive
Table 4. Ordering information
Order code
Marking(1)
Package
Weight
Base qty
Delivery mode
ESDALC5-1BT2Y
A
SOD882T
0.80 mg
12000
Tape and reel
1. The marking can be rotated by multiples of 90° to differentiate assembly location
5
Revision history
Table 5. Document revision history
Date
Revision
03-Feb-2014
1
Changes
Initial release.
DocID025820 Rev 1
11/12
12
ESDALC5-1BT2Y
Please Read Carefully:
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the
right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any
time, without notice.
All ST products are sold pursuant to ST’s terms and conditions of sale.
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no
liability whatsoever relating to the choice, selection or use of the ST products and services described herein.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this
document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products
or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such
third party products or services or any intellectual property contained therein.
UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED
WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS
OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
ST PRODUCTS ARE NOT DESIGNED OR AUTHORIZED FOR USE IN: (A) SAFETY CRITICAL APPLICATIONS SUCH AS LIFE
SUPPORTING, ACTIVE IMPLANTED DEVICES OR SYSTEMS WITH PRODUCT FUNCTIONAL SAFETY REQUIREMENTS; (B)
AERONAUTIC APPLICATIONS; (C) AUTOMOTIVE APPLICATIONS OR ENVIRONMENTS, AND/OR (D) AEROSPACE APPLICATIONS
OR ENVIRONMENTS. WHERE ST PRODUCTS ARE NOT DESIGNED FOR SUCH USE, THE PURCHASER SHALL USE PRODUCTS AT
PURCHASER’S SOLE RISK, EVEN IF ST HAS BEEN INFORMED IN WRITING OF SUCH USAGE, UNLESS A PRODUCT IS
EXPRESSLY DESIGNATED BY ST AS BEING INTENDED FOR “AUTOMOTIVE, AUTOMOTIVE SAFETY OR MEDICAL” INDUSTRY
DOMAINS ACCORDING TO ST PRODUCT DESIGN SPECIFICATIONS. PRODUCTS FORMALLY ESCC, QML OR JAN QUALIFIED ARE
DEEMED SUITABLE FOR USE IN AEROSPACE BY THE CORRESPONDING GOVERNMENTAL AGENCY.
Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void
any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any
liability of ST.
ST and the ST logo are trademarks or registered trademarks of ST in various countries.
Information in this document supersedes and replaces all information previously supplied.
The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.
© 2014 STMicroelectronics - All rights reserved
STMicroelectronics group of companies
Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America
www.st.com
12/12
DocID025820 Rev 1
Similar pages