CET CEM3083 P-channel enhancement mode field effect transistor Datasheet

CEM3083
P-Channel Enhancement Mode Field Effect Transistor
PRELIMINARY
FEATURES
-30V, -13A, RDS(ON) = 10mΩ @VGS = -10V.
RDS(ON) = 15.5mΩ @VGS = -4.5V.
Super high dense cell design for extremely low RDS(ON).
High power and current handing capability.
Lead free product is acquired.
D
D
D
D
8
7
6
5
1
S
2
S
3
S
4
G
Surface mount Package.
SO-8
1
ABSOLUTE MAXIMUM RATINGS
TA = 25 C unless otherwise noted
Symbol
Limit
Drain-Source Voltage
VDS
-30
Units
V
Gate-Source Voltage
VGS
±20
V
ID
-13
A
IDM
-52
A
PD
2.5
W
TJ,Tstg
-55 to 150
C
Symbol
Limit
Units
RθJA
50
C/W
Parameter
Drain Current-Continuous
Drain Current-Pulsed
a
Maximum Power Dissipation
Operating and Store Temperature Range
Parameter
Thermal Resistance, Junction-to-Ambient b
This is preliminary information on a new product in development now .
Details are subject to change without notice .
1
Rev 1. 2007.Jun.
http://www.cetsemi.com
CEM3083
Electrical Characteristics
Parameter
TA = 25 C unless otherwise noted
Symbol
Test Condition
Min
Drain-Source Breakdown Voltage
BVDSS
VGS = 0V, ID = -250µA
-30
Zero Gate Voltage Drain Current
IDSS
Gate Body Leakage Current, Forward
Gate Body Leakage Current, Reverse
Typ
Max
Units
VDS = -30V, VGS = 0V
-1
µA
IGSSF
VGS = 20V, VDS = 0V
100
nA
IGSSR
VGS = -20V, VDS = 0V
-100
nA
Off Characteristics
V
On Characteristics c
Gate Threshold Voltage
VGS(th)
Static Drain-Source
RDS(on)
On-Resistance
Dynamic Characteristics
VGS = VDS , ID = -250µA
-3
V
VGS = -10V, ID = -13A
-1
8
10
mΩ
VGS = -4.5V, ID = -10A
12.5
15.5
mΩ
d
Forward Transconductance
gFS
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
VDS = -15V, ID = -13A
VDS = -15V, VGS = 0V,
f = 1MHz
40
S
3450
pF
465
pF
365
pF
Switching Characteristics d
Turn-On Delay Time
td(on)
Turn-On Rise Time
tr
Turn-Off Delay Time
td(off)
VDD = -15V, ID = -13A,
VGS = -10V, RGEN = 6Ω
18.8
37.6
ns
11.2
22.4
ns
132
264
ns
Turn-Off Fall Time
tf
63
126
ns
Total Gate Charge
Qg
37.9
50
nC
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
VDS = -15V, ID = -13A,
VGS = -5V
9.6
nC
13.3
nC
Drain-Source Diode Characteristics and Maximun Ratings
Drain-Source Diode Forward Current b
IS
Drain-Source Diode Forward Voltage c
VSD
VGS = 0V, IS = -1.3A
Notes :
a.Repetitive Rating : Pulse width limited by maximum junction temperature.
b.Surface Mounted on FR4 Board, t < 10 sec.
c.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%.
d.Guaranteed by design, not subject to production testing.
2
-1.3
A
-1.1
V
5
CEM3083
20
-VGS=10,8,6,4V
8
-ID, Drain Current (A)
-ID, Drain Current (A)
10
-VGS=2.4V
6
4
-VGS=2V
2
0
0
0.1
0.2
0.3
0.4
0.5
1
2
3
4
5
6
Figure 2. Transfer Characteristics
RDS(ON), Normalized
RDS(ON), On-Resistance(Ohms)
2000
1000
Coss
Crss
5
10
15
20
25
30
2.2
1.9
ID=-13A
VGS=-10V
1.6
1.3
1.0
0.7
0.4
-100
-50
0
50
100
150
200
-VDS, Drain-to-Source Voltage (V)
TJ, Junction Temperature( C)
Figure 3. Capacitance
Figure 4. On-Resistance Variation
with Temperature
VDS=VGS
-IS, Source-drain current (A)
C, Capacitance (pF)
VTH, Normalized
Gate-Source Threshold Voltage
0
-55 C
Figure 1. Output Characteristics
Ciss
ID=-250µA
1.1
1.0
0.9
0.8
0.7
0.6
-50
TJ=125 C
-VGS, Gate-to-Source Voltage (V)
3000
1.2
25 C
4
-VDS, Drain-to-Source Voltage (V)
4000
1.3
8
0
5000
0
12
0.6
6000
0
16
-25
0
25
50
75
100
125
150
10
2
10
1
10
0
10
-1
VGS=0V
0.4
0.6
0.8
1.0
1.2
1.4
TJ, Junction Temperature( C)
-VSD, Body Diode Forward Voltage (V)
Figure 5. Gate Threshold Variation
with Temperature
Figure 6. Body Diode Forward Voltage
Variation with Source Current
3
5
10
VDS=-15V
ID=-13A
4
3
2
1
0
0
2
RDS(ON)Limit
-ID, Drain Current (A)
-VGS, Gate to Source Voltage (V)
CEM3083
8
16
24
32
40
10
1
10
0
10
-1
10
-2
10ms
100ms
5
1s
DC
TA=25 C
TJ=150 C
Single Pulse
10
-2
10
-1
10
0
10
1
10
Qg, Total Gate Charge (nC)
-VDS, Drain-Source Voltage (V)
Figure 7. Gate Charge
Figure 8. Maximum Safe
Operating Area
VDD
t on
V IN
RL
D
VGS
RGEN
toff
tr
td(on)
td(off)
tf
90%
90%
VOUT
VOUT
10%
INVERTED
10%
G
90%
S
VIN
50%
50%
10%
PULSE WIDTH
Figure 10. Switching Waveforms
Figure 9. Switching Test Circuit
r(t),Normalized Effective
Transient Thermal Impedance
10
0
D=0.5
10
0.2
-1
0.1
0.05
10
PDM
0.02
0.01
-2
t1
Single Pulse
10
-3
10
-4
t2
1. RθJA (t)=r (t) * RθJA
2. RθJA=See Datasheet
3. TJM-TA = P* RθJA (t)
4. Duty Cycle, D=t1/t2
10
-3
10
-2
10
-1
10
0
Square Wave Pulse Duration (sec)
Figure 11. Normalized Thermal Transient Impedance Curve
4
10
1
10
2
2
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