bq2002D/T NiCd/NiMH Fast-Charge Management ICs Features General Description ➤ Fast charge of nickel cadmium or nickel-metal hydride batteries ➤ Direct LED output displays charge status ➤ Fast-charge termination by rate of rise of temperature, maximum voltage, maximum temperature, and maximum time The bq2002D/T Fast-Charge IC are low-cost CMOS battery-charge controllers able to provide reliable charge termination for both NiCd and NiMH battery applications. Controlling a current-limited or constant-current supply allows the bq2002D/T to be the basis for a cost-effective stand-alone or system-integrated charger. The bq2002D/T integrates fast charge with optional top-off and pulsed-trickle control in a single IC for charging one or more NiCd or NiMH battery cells. ➤ Internal band-gap voltage reference ➤ Optional top-off charge (bq2002T only) ➤ Selectable pulse-trickle charge rates (bq2002T only) ➤ Low-power mode ➤ 8-pin 300-mil DIP or 150-mil SOIC Pin Connections Fast charge is terminated by any of the following: Fast charge is initiated on application of the charging supply or battery replacement. For safety, fast charge is inhibited if the battery temperature and voltage are outside configured limits. n n n n Rate of temperature rise Maximum voltage Maximum temperature Maximum time After fast charge, the bq2002T optionally tops-off and pulse-trickles the battery per the pre-configured limits. Fast charge may be inhibited using the INH pin. The bq2002D/T may be placed in low-standby-power mode to reduce system power consumption. Pin Names TM 1 8 CC LED 2 7 INH BAT 3 6 VCC VSS 4 5 TS TM Timer mode select input TS Temperature sense input LED Charging status output VCC Supply voltage input BAT Battery voltage input INH Charge inhibit input VSS System ground CC Charge control output 8-Pin DIP or Narrow SOIC PN-200201.eps bq2002D/T Selection Guide Part No. TCO HTF LTF bq2002D 0.225 ∗ VCC 0.25 ∗ VCC None bq2002T 0.225 ∗ VCC 0.25 ∗ VCC 0.4 ∗ VCC Fast Charge C/4 1C 2C C/4 1C 2C SLUS133 – APRIL 2009 1 Time-Out 440 min 110 min 55 min 320 min 80 min 40 min Top-Off None None None C/64 C/16 None Maintenance None None None C/256 C/256 C/128 bq2002D/T sumes operation at the point where initially suspended. Pin Descriptions TM Timer mode input Charge control output CC A three-level input that controls the settings for the fast charge safety timer, voltage termination mode, top-off, pulse-trickle, and voltage hold-off time. LED An open-drain output used to control the charging current to the battery. CC switching to high impedance (Z) enables charging current to flow, and low to inhibit charging current. CC is modulated to provide top-off, if enabled, and pulse trickle. Charging output status Open-drain output that indicates the charging status. BAT Functional Description Battery input voltage Figures 2 and 3 show state diagrams of bq2002D/T and Figure 4 shows the block diagram of the bq2002D/T. The battery voltage sense input. The input to this pin is created by a high-impedance resistor divider network connected between the positive and negative terminals of the battery. VSS System ground TS Temperature sense input Battery Voltage and Temperature Measurements Battery voltage and temperature are monitored for maximum allowable values. The voltage presented on the battery sense input, BAT, should represent a single-cell potential for the battery under charge. A resistor-divider ratio of Input for an external battery temperature monitoring thermistor. VCC RB1 =N-1 RB2 Supply voltage input is recommended to maintain the battery voltage within the valid range, where N is the number of cells, RB1 is the resistor connected to the positive battery terminal, and RB2 is the resistor connected to the negative battery terminal. See Figure 1. 5.0V ±20% power input. INH Charge inhibit input When high, INH suspends the fast charge in progress. When returned low, the IC re- VCC PACK + RT1 RB1 VCC R3 BAT bq2002D/T TM RB2 TS bq2002D/T R4 RT2 N T C VSS VSS BAT pin connection Mid-level setting for TM Thermistor connection NTC = negative temperature coefficient thermistor. F2002DT1.eps Figure 1. Voltage and Temperature Monitoring and TM Pin Configuration 2 bq2002D/T Battery Voltage too High? Chip on 4.0V VCC VBAT > 2V VBAT < 2V VTS > 0.25V VCC Battery Temperature? Fast Charge, CC = Z LED = Low VTS < 0.25V VCC VBAT < 2V and VTS > 0.25V VCC T/ t or VBAT > 2V or VTS < 0.25V VCC or Maximum Time Out Charge Pending Off, CC = Low LED = Low VBAT > 2V VBAT 2V Off, CC = Low LED = Z SD2002D.eps Figure 2. bq2002D State Diagram Battery Voltage too High? Chip on 4.0V VCC VBAT > 2V VBAT < 2V 0.25 VCC < VTS < 0.4 VCC ( T/ t or Maximum Time Out) and TM = High Top-off LED = Z Battery Temperature? VTS > 0.4 VCC or VTS < 0.25 VCC Charge Pending Trickle LED = Low Fast LED = Low VBAT > 2V or VTS < 0.225 VCC or (( T/ t or Maximum Time Out) and TM = High) VBAT < 2V and VTS < 0.4 VCC and VTS > 0.25 VCC VBAT > 2V or VTS < 0.225 VCC or Maximum Time Out VBAT > 2V VBAT 2V Trickle LED = Z SD2002T.eps Figure 3. bq2002T State Diagram 3 bq2002D/T Clock Phase Generator OSC TM Timing Control Sample History Voltage Reference T/ t ALU A to D Converter INH Charge-Control State Machine HTF/ LTF Check MCV Check Power-On Reset CC LED Power Down BAT TS TCO Check VCC VSS Bd2002TD.eps Figure 4. Block Diagram If the battery voltage or temperature is outside of these limits, the IC pulse-trickle charges until the temperature falls within the allowed fast charge range or a new charge cycle is started. Note: This resistor-divider network input impedance to end-to-end should be at least 200kΩ and less than 1 MΩ. A ground-referenced negative temperature coefficient thermistor placed in proximity to the battery may be used as a low-cost temperature-to-voltage transducer. The temperature sense voltage input at TS is developed using a resistor-thermistor network between VCC and VSS. See Figure 1. Fast charge continues until termination by one or more of the four possible termination conditions: n n n n Starting A Charge Cycle Either of two events starts a charge cycle (see Figure 5): 1. Application of power to VCC or Rate of temperature rise Maximum voltage Maximum temperature Maximum time T/ t Termination 2. Voltage at the BAT pin falling through the maximum cell voltage where The bq2002D/T samples at the voltage at the TS pin every 19s and compares it to the value measured three samples earlier. If the voltage has fallen 25.6mV or more, fast charge is terminated. The ∆T/∆t termination test is valid only when V TCO < V TS < V LTF for the bq2002T and VTCO < VTS for the bq2002D. VMCV = 2V ±5% If the battery is within the configured temperature and voltage limits, the IC begins fast charge. The valid battery voltage range is VBAT < VMCV. The valid temperature range is VHTF < VTS < VLTF for the bq2002T and VHTF < VTS for the bq2002D where Temperature Sampling VLTF = 0.4 ∗ VCC ±5% A sample is taken by averaging together 16 measurements taken 570µs apart. The resulting sample period (18.18ms) filters out harmonics around 55Hz. This tech- VHTF = 0.25 ∗ VCC ±5% (bq2002T only) 4 bq2002D/T VCC = 0 Fast Charging Top-Off (optional, bq2002T only) 286 s 286 s CC Output Fast Charging (optional, bq2002T only) Pulse-Trickle See Table 1 4576 s Charge initiated by application of power Charge initiated by battery replacement LED TD2002F1.eps Figure 5. Charge Cycle Phases nique minimizes the effect of any AC line ripple that may feed through the power supply from either 50Hz or 60Hz AC sources. Tolerance on all timing is ±20%. Maximum temperature termination occurs anytime the voltage on the TS pin falls below the temperature cut-off threshold VTCO where VTCO = 0.225 ∗ VCC ±5% Maximum Voltage, Temperature, and Time Maximum charge time is configured using the TM pin. Time settings are available for corresponding charge rates of C/4, 1C, and 2C. Maximum time-out termination is enforced on the fast-charge phase, then reset, and Any time the voltage on the BAT pin exceeds the maximum cell voltage, VMCV, fast charge or optional top-off charge is terminated. Table 1. Fast-Charge Safety Time/Top-Off Table Part No. bq2002D bq2002T Notes: Corresponding Fast-Charge Rate TM Typical Fast-Charge and Top-Off Time Limits (minutes) C/4 Mid 440 None None None 1C Low 110 None None None 2C High 55 None None None C/4 Mid 320 C/64 C/256 18.3 1C Low 80 C/16 C/256 73.1 2C High 40 None C/128 73.1 Typical conditions = 25°C, VCC = 5.0V Mid = 0.5 * VCC ±0.5V Tolerance on all timing is ±20% 5 Top-Off Rate PulseTrickle Rate PulseTrickle Period (ms) bq2002D/T enforced again on the top-off phase, if selected (bq2002T only). There is no time limit on the trickle-charge phase. Charge Status Indication In the fast charge and charge pending states, and whenever the inhibit pin is active, the LED pin goes low. The LED pin is driven to the high-Z state for all other conditions. Figure 3 outlines the state of the LED pin during charge. Top-off Charge—bq2002T Only An optional top-off charge phase may be selected to follow fast charge termination for 1C and C/4 rates. This phase may be necessary on NiMH or other battery chemistries that have a tendency to terminate charge prior to reaching full capacity. With top-off enabled, charging continues at a reduced rate after fast-charge termination for a period of time selected by the TM pin. (See Table 1.) During top-off, the CC pin is modulated at a duty cycle of 286µs active for every 4290µs inactive. This modulation results in an average rate 1/16th that of the fast charge rate. Maximum voltage, time, and temperature are the only termination methods enabled during top-off. Charge Inhibit Fast charge and top-off may be inhibited by using the INH pin. When high, INH suspends all fast charge and top-off activity and the internal charge timer. INH freezes the current state of LED until inhibit is removed. Temperature monitoring is not affected by the INH pin. During charge inhibit, the bq2002D/T continues to pulse-trickle charge the battery per the TM selection. When INH returns low, charge control and the charge timer resume from the point where INH became active. The VTS sample history is cleared by INH. Pulse-Trickle Charge—bq2002T Only Low-Power Mode Pulse-trickle is used to compensate for self-discharge while the battery is idle in the charger. The battery is pulse-trickle charged by driving the CC pin active for a period of 286µs for every 72.9ms of inactivity for 1C and 2C selections, and 286µs for every 17.9ms of inactivity for C/4 selection. This results in a trickle rate of C/256 for the top-off enabled mode and C/128 otherwise. The IC enters a low-power state when VBAT is driven above the power-down threshold (VPD) where VPD = VCC - (1V ±0.5V) Both the CC pin and the LED pin are driven to the high-Z state. The operating current is reduced to less than 1µA in this mode. When VBAT returns to a value below VPD, the IC pulse-trickle charges until the next new charge cycle begins. TM Pin The TM pin is a three-level pin used to select the charge timer, top-off, voltage termination mode, trickle rate, and voltage hold-off period options. Table 1 describes the states selected by the TM pin. The mid-level selection input is developed by a resistor divider between V CC and ground that fixes the voltage on TM at VCC/2 ± 0.5V. See Figure 5. 6 bq2002D/T Absolute Maximum Ratings Minimum Maximum Unit VCC Symbol VCC relative to VSS -0.3 +7.0 V VT DC voltage applied on any pin excluding VCC relative to VSS -0.3 +7.0 V TOPR Operating ambient temperature 0 +70 °C TSTG Storage temperature -40 +85 °C TSOLDER Soldering temperature - +260 °C TBIAS Temperature under bias -40 +85 °C Note: Parameter Commercial 10s max. Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation should be limited to the Recommended DC Operating Conditions detailed in this data sheet. Exposure to conditions beyond the operational limits for extended periods of time may affect device reliability. DC Thresholds Symbol Notes (TA = 0 to 70°C; VCC ±20%) Parameter Rating Tolerance Unit Notes VTCO Temperature cutoff 0.225 * VCC ±5% V VTS ≤ VTCO terminates fast charge and top-off VHTF High-temperature fault 0.25 ∗ VCC ±5% V VTS ≤ VHTF inhibits fast charge start VLTF Low-temperature fault 0.4 ∗ VCC ±5% V VTS ≥ VLTF inhibits fast charge start (bq2002T only) VMCV Maximum cell voltage 2 ±5% V VBAT ≥ VMCV inhibits/terminates fast charge 7 bq2002D/T Recommended DC Operating Conditions (TA = 0 to 70°C) Symbol Condition Minimum Typical Maximum Unit Notes VCC Supply voltage 4.0 5.0 6.0 V VBAT Battery input 0 - VCC V VTS Thermistor input 0.5 - VCC V VTS < 0.5V prohibited Logic input high 0.5 - - V INH Logic input high VCC - 0.5 - - V TM V TM VIH VIM Logic input mid VCC - 0.5 2 - VCC 2 + 05 . Logic input low - - 0.1 V INH Logic input low - - 0.5 V TM VOL Logic output low - - 0.8 V LED, CC, IOL = 10mA VPD Power down VCC - 1.5 - VCC - 0.5 V VBAT ≥ VPD max. powers down bq2002D/T; VBAT < VPD min. = normal operation. ICC Supply current - - 500 µA Outputs unloaded, VCC = 5.1V ISB Standby current - - 1 µA VCC = 5.1V, VBAT = VPD IOL LED, CC sink 10 - - mA @VOL = VSS + 0.8V IL Input leakage - - ±1 µA INH, CC, V = VSS to VCC IOZ Output leakage in high-Z state -5 - - µA LED, CC VIL Note: All voltages relative to VSS. 8 bq2002D/T Impedance Symbol Parameter Minimum Typical Maximum Unit RBAT Battery input impedance 50 - - MΩ RTS TS input impedance 50 - - MΩ Timing Symbol (TA = 0 to +70°C; VCC ±10%) Parameter Minimum Typical Maximum Unit -20 - 20 % dFCV Time-base variation Note: Typical is at TA = 25°C, VCC = 5.0V. 9 Notes bq2002D/T 8-Pin DIP (PN) 8-Pin PN (0.300" DIP) Inches D E1 E A L B1 A1 C e B S G Millimeters Dimension A Min. Max. Min. Max. 0.160 0.180 4.06 4.57 A1 0.015 0.040 0.38 1.02 B 0.015 0.022 0.38 0.56 B1 0.055 0.065 1.40 1.65 C 0.008 0.013 0.20 0.33 D 0.350 0.380 8.89 9.65 E 0.300 0.325 7.62 8.26 E1 0.230 0.280 5.84 7.11 e 0.300 0.370 7.62 9.40 G 0.090 0.110 2.29 2.79 L 0.115 0.150 2.92 3.81 S 0.020 0.040 0.51 1.02 8-Pin SOIC Narrow (SN) 8-Pin SN (0.150" SOIC) Inches 10 Millimeters Dimension A Min. Max. Min. Max. 0.060 0.070 1.52 1.78 A1 0.004 0.010 0.10 0.25 B 0.013 0.020 0.33 0.51 C 0.007 0.010 0.18 0.25 D 0.185 0.200 4.70 5.08 E 0.150 0.160 3.81 4.06 e 0.045 0.055 1.14 1.40 H 0.225 0.245 5.72 6.22 L 0.015 0.035 0.38 0.89 Ordering Information bq2002 Package Option: PN = 8-pin plastic DIP SN = 8-pin narrow SOIC* Device: D = bq2002D Fast-Charge IC T = bq2002T Fast-Charge IC * bq2002D is only available in the 8-pin narrow SOIC package 11 SLUS133D – April 2009 bq2002D/T Data Sheet Revision History Change No. Page No. Description Nature of Change 3 Was: Table 1 gave the bq2002D/T Operational Summary. Is: Figure 2 gives the bq2002D/T Operational Summary. Changed table to figure. 1 5 Added top-off values. 2 All Revised and expanded this data sheet 3 All 1 4 Revised and included bq2002D Addition of device Specified package information for the bq2002D 5 1, 5 Corrected transposed rows in Selection Guide Table and made Table 1 consistent with Selection Guide 6 4 Temperature Sampling — From 16 measurements taken 57us apart To: 16 measurements taken 570us apart. SLUS133D – April 2009 Submit Documentation Feedback Added column and values. bq2002D/T PACKAGE OPTION ADDENDUM www.ti.com 10-Jun-2014 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) BQ2002DSN ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 2002D BQ2002DSNG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 2002D BQ2002DSNTR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 2002D BQ2002DSNTRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 2002D BQ2002TPN ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 2002TPN BQ2002TPNE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 2002TPN BQ2002TSN ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 2002T BQ2002TSNG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 2002T BQ2002TSNTR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 2002T (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 10-Jun-2014 (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. 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Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 16-Apr-2009 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel Diameter Width (mm) W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant BQ2002DSNTR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 BQ2002TSNTR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 16-Apr-2009 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) BQ2002DSNTR SOIC D 8 2500 340.5 338.1 20.6 BQ2002TSNTR SOIC D 8 2500 340.5 338.1 20.6 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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