ON ENA2017B System power supply ic for automotive infotainment multiple output linear voltage regulator Datasheet

Ordering number : ENA2017B
LV5694P
Bi-CMOS IC
System Power Supply IC
for Automotive Infotainment
Multiple Output Linear
Voltage Regulator
http://onsemi.com
Overview
The LV5694P is a multiple output linear regulator IC, which allows reduction of quiescent current. The LV5694P is
specifically designed to address automotive infotainment systems power supply requirements. The LV5694P integrates
5 linear regulator outputs, 2 high side power switches, over current protection, overvoltage protection and thermal
shutdown circuitry.
Function
• Low consumption current:
50µA (typ, only VDD output is in operation)
• 5 systems of regulator output
VDD for microcontroller:
output voltage: 5.0V/3.3V (always ON),
maximum output current: 300mA
For SWD5V: output voltage: 5V,
maximum output current: 500mA
HZIP15J
For CD: output voltage: 7.6V/8.1V,
maximum output current: 2000mA
For illumination: output voltage: 9.0V,
maximum output current: 500mA
For audio: output voltage: 8.45V,
maximum output current: 800mA
• 2 lines of high side switch with interlock VCC
AMP: Maximum output current: 500mA, voltage difference between input and output: 0.5V
ANT: Maximum output current: 350mA, voltage difference between input and output: 0.5V
• Overcurrent protector
• Overvoltage protector: Typ 36V (All outputs are turned off)
• Overheat protector: Typ 175°C
• PchLDMOS is used in power output block
(Warning) The protector functions only improve the IC’s tolerance and they do not guarantee the safety of the IC if used under the
conditions out of safety range or ratings. Use of the IC such as use under over current protection range or thermal shutdown state may
degrade the IC’s reliability and eventually damage the IC.
ORDERING INFORMATION
See detailed ordering and shipping information on page 14 of this data sheet.
Semiconductor Components Industries, LLC, 2014
March, 2014
32014NK/71112SY/30712SY 20120203-S00001 No.A2017-1/14
LV5694P
Specifications
Absolute Maximum Ratings at Ta = 25°C
Parameter
Symbol
Power supply voltage
VCC max
Power dissipation
Pd max
Conditions
Ratings
Unit
Ta ≤ 25°C
IC unit
At using Al heat sink
At infinity heat sink
Peak voltage
VCC peak
Junction temperature
Tj max
Operating temperature
Storage temperature
36
V
1.5
W
5.6
W
32.5
W
Regarding Bias wave, refer to below the pulse.
50
V
150
°C
Topr
-40 to +85
°C
Tstg
-55 to +150
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed,
damage may occur and reliability may be affected.
Recommended Operating Conditions at Ta = 25°C
Parameter
Conditions
Power supply voltage rating 1
VDD output, SWD output
Power supply voltage rating 2
ILM output
Power supply voltage rating 3
Power supply voltage rating 4
Ratings
Unit
7 to 16
V
10.8 to 16
V
Audio output, CD output
10 to 16
V
ANT output, AMP output
7.5 to 16
V
* VCC1 should be as follows: VCC1>VCC-0.7V
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended
Operating Ranges limits may affect device reliability.
Electrical Characteristics at Ta = 25°C, VCC = VCC1=14.4V (*2)
Parameter
Symbol
VCC1 input voltage
VCC1
Current drain
ICC
Conditions
Ratings
min
typ
Unit
max
VCC-0.7V
16
V
50
100
μA
-
-
0.3
V
VDD no load, CTRL1/2/3 = ⎡L/L/L⎦
CTRL1/2/3 Input
Low input voltage
VIL1
Middle1 input voltage
VIM1
0.9
1.18
1.45
V
Middle2 input voltage
VIM2
1.85
2.10
2.4
V
High input voltage
VIH1
2.95
3.29
5.5
V
Input impedance
RIH1
280
400
520
kΩ
Input voltage ≤ 3.3V
IKCD/IKVDD Input
Low input voltage
VIL2
High input voltage
VIH2
IKCD
IKVDD
VCC-0.7V
VCC1-0.7V
-
0.7
V
-
-
V
V
VDD output (5V/3.3V)
Output voltage
VO11
IO1 = 200mA, IKVDD=VCC1
4.75
5.0
5.25
VO12
IO1 = 200mA, IKVDD=GND
3.16
3.3
3.45
Output current
IO1
VO11 ≥ 4.70V, VO12 ≥ 3.10V
300
Line regulation
ΔVOLN1
7.5V < VCC1 < 16V, IO1 = 200mA
Load regulation
ΔVOLD1
Dropout voltage 1
VDROP1
Dropout voltage 2
VDROP1’
IO1 = 100mA (VDD output 5V)
Ripple rejection
RREJ1
f = 120Hz, IO1 = 200mA
30
40
Short circuit current
IS1
VO11, VO12 = 0
50
150
V
mA
30
70
mV
1mA < IO1 < 200mA
70
150
mV
IO1 = 200mA (VDD output 5V)
0.8
1.6
V
0.4
0.8
V
340
mA
dB
Continued on next page.
No.A2017-2/14
LV5694P
Continued from preceding page.
Parameter
Symbol
Conditions
Ratings
min
typ
Unit
max
AUDIO (8.45V) Output ; CTRL2 = ⎡M1 or H⎦
Output voltage
VO3
IO3 = 650mA
8.16
8.45
8.7
V
Output current
IO3
VO3 ≥ 8.0V
800
Line regulation
ΔVOLN3
10V < VCC < 16V, IO3 = 650mA
30
90
mV
Load regulation
ΔVOLD3
1mA < IO3 < 650mA
100
200
mV
Dropout voltage 1
Dropout voltage 2
VDROP3
IO3 = 650mA
0.7
1.2
V
VDROP3’
IO3 = 200mA
0.2
0.35
Ripple rejection
RREJ3
f = 120Hz, IO3 = 650mA
Short circuit current
IS3
VO3 = 0
mA
40
50
120
250
550
9.0
9.3
V
dB
mA
ILM (9V) Output ; CTRL1 = ⎡M1 or H⎦
Output voltage
VO4
IO4 = 350mA
8.7
Output current
IO4
VO4 ≥ 8.6V
500
Line regulation
ΔVOLN4
10.8V < VCC < 16V, IO4 = 350mA
40
100
mV
Load regulation
ΔVOLD4
1mA < IO4 < 350mA
70
150
mV
Dropout voltage 1
VDROP4
IO4 = 350mA
1.0
1.5
V
0.3
0.6
Dropout voltage 2
VDROP4’
IO4 = 200mA
Ripple rejection
RREJ4
f = 120Hz, IO4 = 350mA
Short circuit current
IS4
VO4 = 0
Output voltage
VO5
IO5 = 500mA
Output current
IO5
VO5 ≥ VCC-1.0V
500
Short circuit current
IS5
VO5 = 0
120
Output voltage
VO6
IO6 = 500mA
Output current
IO6
VO6 ≥ VCC-1.0V
350
Short circuit current
IS6
VO6 = 0
Output voltage
VO7
Output current
Line regulation
Load regulation
V
mA
40
50
100
200
400
VCC-0.5
VCC-1.0
V
dB
mA
AMP_HS-SW; CTRL3 = ⎡M2 or H⎦
V
mA
250
500
mA
VCC-0.5
VCC-1.0
100
200
450
mA
IO7 = 350mA
4.75
5.0
5.25
V
IO7
VO7 ≥ 4.7V
500
ΔVOLN7
10V < VCC < 16V, IO7 = 350mA
30
70
mV
ΔVOLD7
1mA < IO7 < 350mA
70
150
mV
0.8
1.6
ANT_HS-SW; CTRL3 = ⎡M1 or H⎦
V
mA
SWD5V; CTRL2 = ⎡M2 or H⎦
Dropout voltage
VDROP7
IO7 = 350mA
Ripple rejection
RREJ7
f = 120Hz, IO7 = 350mA
Short circuit current
IS7
VO7 = 0
mA
40
50
100
200
V
dB
450
mA
CD(7.6/8.1V output); CTRL1 = ⎡M2 or H⎦
Output voltage
VO81
IO8 = 1300mA, IKCD=GND
7.2
7.6
8.0
V
VO82
IO8 = 1300mA, IKCD=VCC
7.7
8.1
8.5
V
Output current
IO8
VO81 ≥ 7.1V, VO82 ≥ 7.5V
2000
Line regulation
ΔVOLN8
10.5V < VCC < 16V, IO8 = 1300mA
40
100
mV
Load regulation
ΔVOLD8
10mA < IO8 < 1300mA
70
200
mV
Dropout voltage 1
VDROP8
IO8 = 1300mA
1.3
1.5
V
Dropout voltage 2
VDROP8’
IO8 = 350mA
0.35
0.7
Ripple rejection
RREJ8
f = 120Hz, IO8 = 1300mA
Short circuit current
IS8
VO81 = 0, VO82 = 0
mA
40
50
300
550
V
dB
1000
mA
Over voltage detection
Over voltage detection voltage
VOVP
VCC, All output stop
34
36
38
V
*2: The entire specification has been defined based on the tests performed under the conditions where Tj and Ta (=25°C) are almost equal. There tests were
performed with pulse load to minimize the increase of junction temperature (Tj).
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be
indicated by the Electrical Characteristics if operated under different conditions.
No.A2017-3/14
LV5694P
Package Dimensions
unit : mm
HZIP15J
CASE 945AC
ISSUE A
GENERIC
MARKING DIAGRAM*
XXXXXXXXXX
YMDDD
SOLDERING FOOTPRINT*
Through Hole Area
(Unit: mm)
Package name
HZIP15J
2.54
1.2
2.54
(1.91)
XXXXX = Specific Device Code
Y = Year
M = Month
DDD = Additional Traceability Data
2.54
2.54
NOTE: The measurements are not to guarantee but for reference only.
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
No.A2017-4/14
LV5694P
• Allowable power dissipation derating curve
Pd max -- Ta
Allowable power dissipation, Pd max -- W
8
Aluminum heat sink mounting conditions
tightening torque : 39N⋅cm, using silicone grease
7
Aluminum heat sink (50 × 50 × 1.5mm3) when using
6
5.6
5
4
3
2
Independent IC
1.5
1
0
0
20
40
60
80
100
120
140 150 160
Ambient temperature, Ta -- °C
• Waveform applied during surge test
50V
90%
10%
16V
5msec
100msec
No.A2017-5/14
LV5694P
CTRL Pin Output Truth Table (each output is controllable by 4-value input)
INAMP
INANT
CTRL3
AMP
ANT
L
L
L
OFF
OFF
L
H
M1
OFF
ON
H
L
M2
ON
OFF
H
H
H
ON
ON
CTRL2
SWD5V
AUDIO
CTRL1
Microcontroller
INAMP
CD
ILM
L
OFF
OFF
L
OFF
OFF
M1
OFF
ON
M1
OFF
ON
M2
ON
OFF
M2
ON
OFF
H
ON
ON
H
ON
ON
INANT
CTRL3
(Warning) Usage of CTRL pin
When CTRL pin transits between L and M2, since it passes M1, ILM/AUDIO/ANT is turned on for a moment. Likewise,
when CTRL pin transits between H and M1, since it passes M2, ILM/AUDIO/ANT is turned off for a moment.
To avoid operation failure by the above factors, please refer to (1) and (2) as shown below for precaution.
• Do not connect parasitic capacitor to CTRL as much as possible.
• If use of capacitor for CTRL is required, keep the resistance value as low as possible.
(Recommendation level: 2.2kΩ / 3.9kΩ)
• Make sure that the output load capacitor has enough marjin against the voltage fluctuation due to instantaneous
ON/OFF.
(1) The time until a reaction occurs in output after shifting from CTRL ON to OFF (typ)
OFF → ON time
27°C
CTRL1 → ILM
0.95μs
CTRL2 → AUDIO
1.33μs
CTRL3 → ANT
2.86μs
Due to quality fluctuation of the ICs in manufacturing process, the above-mentioned time can be shortened by 10 to
20%.
(2) The time until output starts to react after shifting from CTRL ON→OFF control (typ):
All output: 200ns to 300ns
No.A2017-6/14
LV5694P
z Block Diagram
VCC
AMP
out
AMP-SW(VCC -0.5V)
500mA
Start
up
Over
Voltage
Protection
Vref
ANT
out
ANT-SW(VCC -0.5V)
350mA
+
ILM output (9V)
500mA
+
CTRL1
CTRL2
800mA
OUTPUT
Control
+
CTRL3
SWD output (5V)
500mA
Thermal
+
CD output (7.6/8.1V)
2000mA
Shut Down
GND
AUDIO output (8.45V)
VCC1(VDD supply input)
VCC
+
VDD output (3.3/5V)
300mA
IKVDD:VDD(3.3/5.0V)change pin
IKVDD=VCC1:5.0V
IKVDD=GND:3.3V
IKCD:CD(7.6/8.1V)change pin
IKCD=VCC:8.1V
IKCD=GND:7.6V
No.A2017-7/14
LV5694P
Pin Function
Pin No.
1
Pin name
ILM
Description
ILM output pin
ON when CTRL1 = M1, H
Equivalent Circuit
VCC
15
9V/0.5A
1
2
GND
3
CD
2
GND
15
VCC
GND pin
CD output pin
ON when CTRL1 = M2, H
8.1V/2A (IKCD=VCC)
7.6V/2A (IKCD=GND)
3
2
4
CTRL1
CTRL1/2/3 input pin
6
CTRL2
Four value input
8
CTRL3
GND
15
VCC
4
6
8
2
5
AUDIO
AUDIO output pin
ON when CTRL2 = M1, H
15
GND
VCC
8.45V/0.8A
5
7
SWD
SWD output pin
ON when CTRL2 = M2, H
2
GND
15
VCC
5V/0.5A
7
2
GND
Continued on next page.
No.A2017-8/14
LV5694P
Continued from preceding page.
Pin No.
9
Pin name
ANT
Description
Equivalent Circuit
ANT output pin
VCC
15
ON when CTRL3 = M1, H
VCC-0.5V/350mA
9
2
10
IKCD
CD voltage control input pin
GND
VCC
15
10
2
11
AMP
AMP output pin
ON when CTRL2 = M2, H
GND
VCC
15
VCC-0.5V/500mA
11
2
12
IKVDD
VDD voltage control input pin
VCC1/GND
GND
15
5V
VCC
12
2
13
VDD
VDD output pin
5.0V/0.3A (IKVDD = VCC1)
GND
VCC
15
3.3V/0.3A (IKVDD = GND)
13
2
14
VCC1
VDD power supply pin
15
VCC
Power supply pin
GND
VCC 15
2
14 VCC1
GND
No.A2017-9/14
LV5694P
Timing Chart
36V
VCC
(15PIN)
36V
VCC1
(14PIN)
5.8V
VDD output (5V)
(13PIN)
H
CTRL1 input
(4PIN)
M2
L
M1
H
CTRL2 input
(6PIN)
M2
M1
L
H
CTRL3 input
(8PIN)
M2
L
M1
ILM output
(1PIN)
CD output
(3PIN)
AUDIO output
(5PIN)
SWD output
(7PIN)
ANT output
(9PIN)
AMP output
(11PIN)
*The above values are obtained when typ.
No.A2017-10/14
LV5694P
C4 + C3
C2 + C1
ILM
CD
CTRL2
C6 + C5
C8 + C7
AUDIO
CTRL3
D2
VCC1
14
13
C10
+
R1
C11
C12 +
D4
15
D6
C16 +
R2
VDD
D5
D3
SWD
ANT
VCC
12
11
VDD
10
9
C9
+
CTRL1
IKVDD
IKCD
CTRL3
8
7
AMP
6
5
ANT
4
3
SWD
CTRL2
AUDIO
2
1
CD
ILM
GND
CTRL1
Applied circuit example
AMP
C14
+
C15
C13
D1
VCC
Peripheral parts list
Name of part
Description
Recommended value
C2, C4, C6, C8, C12
Output stabilization capacitor
10μF or more*
C1, C3, C5, C7, C11
Output stabilization capacitor
0.22μF or more*
Remarks
Electrolytic capacitor
Ceramic capacitor
C14, C16
Power supply bypass capacitor
100μF or more
These capacitors must be placed near
C13, C15
Oscillation prevention capacitor
0.22μF or more
the VCC and GND pins.
C9, C10
AMP/ANT output stabilization capacitor
2.2μF or more
R1, R2
Resistance for protection
D1
10 to 100kΩ
Diode for prevention of backflow
Meeting the specifications of the rush
electric current in a true use state
D2, D3, D4, D5
Diode for internal element protection
SB1003M3
D6
Diode for internal element protection
SB1003M3
When a minus number surge is applied
* : Make sure that the capacitors of the output pins are 10μF or higher and meets the condition of ESR is 0.001 to 10Ω (ceramic capacitor alone can be used.),
in which voltage/ temperature fluctuation and unit differences are taken into consideration. Moreover, RF characteristics of electrolytic capacitor should be
sufficient.
No.A2017-11/14
LV5694P
Caution for implementing LV5694P to a system board
The package of LV5694P is HZIP15J which has some metal exposures other than connection pins and heatsink as shown in the
diagram below. The electrical potentials of (2) and (3) are the same as those of pin 15 and pin 1, respectively. (2) (=pin 15) is the VCC
pin and (3) (=pin 1) is the ILM (regulator) output pin. When you implement the IC to the set board, make sure that the bolts and the
heatsink are out of touch from (2) and (3). If the metal exposures touch the bolts which has the same electrical potential with GND,
GND short occurs in ILM output and VCC. The exposures of (1) are connected to heatsink which has the same electrical potential with
substrate of the IC chip (GND). Therefore, (1) and GND electrical potential of the set board can connect each other.
• HZIP15J outline
Heat-sink
1 Same potential
2 15PIN
Same potential
1PIN
3 Same potential
Heat-sink side
Heat-sink
1 Same potential
1
Heat-sink
Same potential
:Metal exposure
Heat-sink side
:Metal exposure
<Side view of HZIP15J>
<Top view of HZIP15J>
• Frame diagram (LV5694P) *In the system power supply other than LV5694P, pin assignment may differ.
Metal exposure 1
Metal exposure 3
Metal exposure 2
Metal exposure 1
LV5694
Metal exposure 1
Metal exposure 1
1PIN
15PIN
No.A0000-12/14
LV5694P
HZIP15J Heat sink attachment
Heat sinks are used to lower the semiconductor device junction temperature by leading the head generated by the device to
the outer environment and dissipating that heat.
a. Unless otherwise specified, for power ICs with tabs and power ICs with attached heat sinks, solder must not be
applied to the heat sink or tabs.
b.
Heat sink attachment
· Use flat-head screws to attach heat sinks.
· Use also washer to protect the package.
· Use tightening torques in the ranges 39-59Ncm(4-6kgcm) .
· If tapping screws are used, do not use screws with a diameter larger
than the holes in the semiconductor device itself.
· Do not make gap, dust, or other contaminants to get between the
semiconductor device and the tab or heat sink.
· Take care a position of via hole .
· Do not allow dirt, dust, or other contaminants to get between the
semiconductor device and the tab or heat sink.
· Verify that there are no press burrs or screw-hole burrs on the heat sink.
· Warping in heat sinks and printed circuit boards must be no more than
0.05 mm between screw holes, for either concave or convex warping.
· Twisting must be limited to under 0.05 mm.
· Heat sink and semiconductor device are mounted in parallel.
Take care of electric or compressed air drivers
· The speed of these torque wrenches should never exceed 700 rpm,
and should typically be about 400 rpm.
Binding head
machine screw
Countersunk head
mashine screw
Heat sink
gap
Via hole
c.
Silicone grease
· Spread the silicone grease evenly when mounting heat sinks.
· Our company recommends YG-6260 (Momentive Performance Materials Japan LLC)
d.
Mount
· First mount the heat sink on the semiconductor device, and then mount that assembly on the printed circuit board.
· When attaching a heat sink after mounting a semiconductor device into the printed circuit board, when tightening
up a heat sink with the screw, the mechanical stress which is impossible to the semiconductor device and the pin
doesn't hang.
e.
When mounting the semiconductor device to the heat sink using jigs, etc.,
· Take care not to allow the device to ride onto the jig or positioning dowel.
· Design the jig so that no unreasonable mechanical stress is not applied to the semiconductor device.
f.
Heat sink screw holes
· Be sure that chamfering and shear drop of heat sinks must not be larger than the diameter of screw head used.
· When using nuts, do not make the heat sink hole diameters larger than the diameter of the head of the screws used.
A hole diameter about 15% larger than the diameter of the screw is desirable.
· When tap screws are used, be sure that the diameter of the holes in the heat sink are not too small. A diameter about
15% smaller than the diameter of the screw is desirable.
g.
There is a method to mount the semiconductor device to the heat sink by using a spring band. But this method is not
recommended because of possible displacement due to fluctuation of the spring force with time or vibration.
No.A0000-13/14
LV5694P
ORDERING INFORMATION
Device
LV5694P-E
Package
HZIP15J
(Pb-Free)
Shipping (Qty / Packing)
20 / Fan-Fold
ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number
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application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental
damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual
performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts.
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PS No.A2017-14/14
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