Rohm BD9106FVM-LBTR Synchronous buck converter integrated fet Datasheet

Datasheet
Synchronous Buck Converter
Integrated FET
BD9106FVM-LB
General Description
Key Specifications
„
„
„
„
„
„
„
„
This is the product guarantees long time support in
Industrial market.
ROHM’s high efficiency step-down switching regulator
(BD9106FVM-LB) is a power supply designed to
produce a low voltage including 1 volts from 5 volts
power supply line. Offers high efficiency with our original
pulse skip control technology and synchronous rectifier.
Employs a current mode control system to provide faster
transient response to sudden change in load.
Input Voltage Range:
Output Voltage Range:
Output Current:
Switching Frequency:
Pch FET On Resistance:
Nch FET On Resistance:
Standby Current:
Operating Temperature Range:
Package
4.0V to 5.5V
1.0V to 2.5V
0.8A(Max)
1MHz(Typ)
350mΩ(Typ)
250mΩ(Typ)
0μA (Typ)
-25°C to +85°C
W(Typ) x D(Typ) x H(Max)
2.90mm x4.00mm x 0.90mm
MSOP8
Features
„
„
„
„
„
„
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Long Time Support Product for Industrial
Applications.
Fast Transient Response with Current Mode PWM
Control System.
Highly Efficiency with Synchronous Rectifier
(Nch/Pch FET) and SLLMTM (Simple Light Load
Mode)
Soft-Start Function.
Thermal Protection and ULVO Functions.
Short-Current Protection Circuit with Time Delay
Function.
Shutdown Function
Applications
„ Industrial Equipment
„ Power Supply for LSI including DSP, Micro computer
and ASIC
„ Secondary Power Supply
MSOP8
Typical Application Circuit
VCC
Cin
L
VCC,PVCC
EN
SW
VOUT
CO
ITH
GND,PGND
ADJ
RITH
CITH
Figure 1. Typical Application Circuit
〇Product structure : Silicon monolithic integrated circuit
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BD9106FVM-LB
Pin Configuration
(Top View)
1
ADJ
VCC
8
2
ITH
PVCC
7
3
EN
SW
6
4
GND
PGND
5
Figure 2. Pin Configuration
Pin Description
Pin No.
Pin Name
1
ADJ
Output voltage adjust pin
Function
2
ITH
GmAmp output pin/Connected phase compensation capacitor
3
EN
Enable pin(Active High)
4
GND
5
PGND
6
SW
7
PVCC
8
VCC
Ground
Nch FET source pin
Pch/Nch FET drain output pin
Pch FET source pin
VCC power supply input pin
Block Diagram
EN
3
VCC
8
VREF
7
PVCC
Current
Comp.
R Q
Gm Amp.
S
SLOPE
VCC
CLK
+
6
OSC
SW
Driver
Logic
UVLO
Soft
Start
Current
Sense/
Protect
PGND
5
TSD
4
GND
1
ADJ
2
ITH
Figure 3. Block Diagram
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BD9106FVM-LB
Description of Block
BD9106FVM-LB is a synchronous rectifying step-down switching regulator that achieves faster transient response by
employing current mode PWM control system. It utilizes switching operation in PWM (Pulse Width Modulation) mode for
heavier load, while it utilizes SLLMTM (Simple Light Load Mode) operation for lighter load to improve efficiency.
○Synchronous rectifier
It does not require the power to be dissipated by a rectifier externally connected to a conventional DC/DC converter IC,
and its P.N junction shoot-through protection circuit limits the shoot-through current during operation, by which the power
dissipation of the set is reduced.
○Current mode PWM control
Synthesizes a PWM control signal with a inductor current feedback loop added to the voltage feedback.
・PWM (Pulse Width Modulation) control
The oscillation frequency for PWM is 1 MHz. SET signal form OSC turns ON a P-channel MOS FET (while a
N-channel MOS FET is turned OFF), and an inductor current IL increases. The current comparator (Current Comp)
receives two signals, a current feedback control signal (SENSE: Voltage converted from IL) and a voltage feedback
control signal (FB), and issues a RESET signal if both input signals are identical to each other, and turns OFF the
P-channel MOS FET (while a N-channel MOS FET is turned ON) for the rest of the fixed period. The PWM control
repeat this operation.
Conventional product (VOUT of which is 3.3 volts)
BD9106FVM-LB (Load response IO=100mA→600mA)
VOUT
VOUT
228mV
110mV
IOUT
IOUT
Voltage drop due to sudden change in load was reduced by about 50%.
Figure 4. Comparison of transient response
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Description of Block
- continued
・SLLMTM (Simple Light Load Mode) control
When the control mode is shifted from PWM for heavier load to the one for lighter load or vise versa, the switching
pulse is designed to turn OFF with the device held operated in normal PWM control loop, which allows linear operation
without voltage drop or deterioration in transient response during the mode switching from light load to heavy load or
vise versa.
Although the PWM control loop continues to operate with a SET signal from OSC and a RESET signal from Current
Comp, it is so designed that the RESET signal is held issued if shifted to the light load mode, with which the switching
is tuned OFF and the switching pulses are thinned out under control. Activating the switching intermittently reduces
the switching dissipation and improves the efficiency.
Efficiency η[%]
100
SLLMTM
②
50
①
PWM
①improvement by SLLM system
②improvement by synchronous rectifier
0
0.001
0.01
0.1
Output current IO[A]
1
Figure 5. Efficiency
SENSE
Current
Comp
RESET
VOUT
Level
Shift
R Q
FB
SET
Gm Amp.
ITH
S
IL
Driver
Logic
VOUT
SW
Load
OSC
Figure 6. Diagram of current mode PWM control
PVCC
Current
Comp
SENSE
PVCC
SENSE
Current
Comp
FB
FB
SET
GND
SET
GND
RESET
GND
RESET
GND
SW
GND
SW
IL
GND
IL(AVE)
IL
0A
VOUT
VOUT(AVE)
VOUT
VOUT(AVE)
Not switching
Figure 8. SLLMTM switching timing chart
Figure 7. PWM switching timing chart
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Description of Block
- continued
・Soft-start function
EN terminal shifted to “High” activates a soft-starter to gradually establish the output voltage with the current limited
during startup, by which it is possible to prevent an overshoot of output voltage and an inrush current.
・Shutdown function
With EN terminal shifted to “Low”, the device turns to Standby Mode, and all the function blocks including reference
voltage circuit, internal oscillator and drivers are turned to OFF. Circuit current during standby is 0 μA (Typ).
・UVLO function
Detects whether the input voltage sufficient to secure the output voltage of this IC is supplied. And the hysteresis width of
50 to 300 mV (Typ) is provided to prevent output chattering.
Hysteresis 50 to 300mV
VCC
EN
VOUT
Tss
Tss
Tss
Soft start
Standby mode
Operating mode
Standby
mode
Standby
mode
Operating mode
UVLO
UVLO
Operating mode
EN
Standby mode
UVLO
*Soft Start time(typ)
Figure 9. Soft start, Shutdown, UVLO timing chart
BD9106FVM-LB
3
Tss
Unit
msec
・Short-current protection circuit with time delay function
Turns OFF the output to protect the IC from breakdown when the incorporated current limiter is activated continuously for the
fixed time(TLATCH) or more. The output thus held tuned OFF may be recovered by restarting EN or by re-unlocking UVLO.
EN
Output OFF
latch
VOUT
Limit
IL
TLATCH
Standby
mode
*Timer Latch time (typ)
Standby
mode
Operating mode
EN
Timer latch
Operating mode
EN
Figure 10. Short-current protection circuit with time delay timing chart
TLATCH
BD9106FVM-LB
1
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Unit
msec
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BD9106FVM-LB
Absolute Maximum Ratings(Ta=25°C)
Parameter
Symbol
VCC Voltage
Rating
VCC
PVCC Voltage
PVCC
EN Voltage
SW, ITH Voltage
Unit
-0.3 to +7
(Note 1)
V
-0.3 to +7
(Note 1)
V
EN
-0.3 to +7
V
SW,ITH
-0.3 to +7
V
(Note 2)
mW
Power Dissipation 1
Pd1
387.5
Power Dissipation 2
Pd2
587.4 (Note 3)
mW
Operating Temperature Range
Topr
-25 to +85
°C
Storage Temperature Range
Tstg
-55 to +150
°C
Tjmax
+150
°C
EN Voltage
(Note 1) Pd should not be exceeded.
(Note 2) Derating in done 3.1mW/°C for temperatures above Ta=25°C
(Note 3) Derating in done 4.7mW/°C for temperatures above Ta=25°C,Mounted on 70mm×70mm×1.6mm Glass Epoxy PCB.
Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over
the absolute maximum ratings.
Recommended Operating Conditions(Ta=25°C)
Parameter
Symbol
VCC voltage
VCC
PVCC voltage
(Note 4)
Typ
Max
Unit
4.0
5.0
5.5
V
4.0
5.0
5.5
V
EN
0
-
VCC
V
ISW (Note 4)
-
-
0.8
A
PVCC
EN voltage
SW average output current
(Note 4)
Min
(Note 4) Pd should not be exceeded.
Electrical Characteristics(Unless otherwise specified Ta=25°C VCC=5V EN=VCC R1=20kΩ R2=10kΩ)
Parameter
Symbol
Min
Typ
Max
Unit
Standby current
ISTB
-
0
10
μA
Bias current
ICC
-
250
400
μA
Conditions
EN=GND
EN Low voltage
VENL
-
GND
0.8
V
Standby mode
EN High voltage
VENH
2.0
VCC
-
V
Active mode
VEN=5V
IEN
-
1
10
μA
FOSC
0.8
1
1.2
MHz
Pch FET ON resistance (Note 5)
RONP
-
0.35
0.60
Ω
PVCC =5V
(Note 5)
PVCC =5V
EN input current
Oscillation frequency
RONN
-
0.25
0.50
Ω
ADJ Voltage
VADJ
0.780
0.800
0.820
V
Output voltage (Note 5)
VOUT
-
1.200
-
V
ITH SInk current
ITHSI
10
20
-
μA
ADJ=H
ITH Source Current
ITHSO
10
20
-
μA
ADJ=L
UVLO threshold voltage
VUVLOTh
3.2
3.4
3.6
V
VCC=H→L
UVLO hysteresis voltage
VUVLOHys
50
100
200
mV
TSS
1.5
3
6
ms
TLATCH
0.5
1
2
ms
Nch FET ON resistance
Soft start time
Timer latch time
(Note 5) Outgoing inspection is not done on all products
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Typical Performance Curves
Figure 11. VOUT VS VCC
Figure 12. VOUT VS VEN
Figure 13. VOUT VS IOUT
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Figure 14. VOUT VS Ta
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Typical Performance Curves
- continued
Figure 15. Efficiency
Figure 16. fosc VS Ta
Figure 17. RONN, RONP VS Ta
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Figure 18. VEN VS Ta
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Typical Performance Curves
- continued
Figure 19. ICC VS Ta
Figure 20. fosc VS VCC
Figure 22. SW waveform IO=10mA
Figure 21. Soft start waveform
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Typical Performance Curves
- continued
Figure 24. Transient response
IO=100mA→600mA(10μs)
Figure 23. SW waveform IO=200mA
Figure 25. Transient response
IO=600mA→100mA(10μs)
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Application Example
1
ADJ
VCC
8
2
ITH
PVCC
7
RITH
VCC
CIN
EN
3
EN
4
GND
SW
6
PGND
5
CITH
①
L
VOUT
CO
③
②
GND
Figure 26. Board layout
① For the sections drawn with heavy line, use thick conductor pattern as short as possible.
② Lay out the input ceramic capacitor CIN closer to the pins PVCC and PGND, and the output capacitor CO closer to the
pin PGND.
③ Lay out CITH and RITH between the pins ITH and GND as neat as possible with least necessary wiring.
Recommended Component Lists With Above Applications
Symbol
Part
Value
L
CIN
CO
CITH
RITH
Coil
Ceramic capacitor
Ceramic capacitor
Ceramic capacitor
Resistance
4.7μH
10μF
10μF
750pF
VOUT=1.0V
VOUT=1.2V
VOUT=1.5V
VOUT=1.8V
VOUT=2.5V
18kΩ
22Ω
22kΩ
27kΩ
36kΩ
Manufacturer
Sumida
TDK
Kyocera
Kyocera
murata
Rohm
Rohm
Rohm
Rohm
Rohm
Series
CMD6D11B
VLF5014AT-4R7M1R1
CM316X5R106K10A
CM316X5R106K10A
GRM18 Series
MCR10 1802
MCR10 2202
MCR10 2202
MCR10 2702
MCR10 3602
The parts list presented above is an example of recommended parts. Although the parts are sound, actual circuit characteristics should be checked on
your application carefully before use. Be sure to allow sufficient margins to accommodate variations between external devices and this IC when employing
the depicted circuit with other circuit constants modified. Both static and transient characteristics should be considered in establishing these margins.
When switching noise is substantial and may impact the system, a low pass filter should be inserted between the V CC and PVCC pins, and a schottky
barrier diode established between the SW and PGND pins.
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BD9106FVM-LB
Selection of Components Externally Connected
1. Selection of inductor (L)
The inductance significantly depends on output ripple current.
As seen in the equation (1), the ripple current decreases as the
inductor and/or switching frequency increases.
IL
ΔIL
ΔIL=
VCC
(VCC-VOUT)×VOUT
[A]・・・(1)
L×VCC×f
Appropriate ripple current at output should be 30% more or less of
the maximum output current.
IL
ΔIL=0.3×IOUTmax [A]・・・(2)
VOUT
L
(VCC-VOUT)×VOUT
L=
CO
ΔIL×VCC×f
[H]・・・(3)
(ΔIL: Output ripple current, and f: Switching frequency)
Figure 27. Output ripple current
Current exceeding the current rating of the inductor results in magnetic saturation of the inductor, which decreases efficiency.
The inductor must be selected allowing sufficient margin with which the peak current may not exceed its current rating.
If VCC=5V, VOUT=3.3V, f=1MHz, ΔIL=0.3×0.8A=0.24A,
(5-3.3)×3.3
L=
=4.675μ → 4.7[μH]
0.24×5×1M
Select the inductor of low resistance component (such as DCR and ACR) to minimize dissipation in the inductor for
better efficiency.
2. Selection of output capacitor (CO)
VCC
Output capacitor should be selected with the consideration on the stability
region and the equivalent series resistance required to smooth ripple voltage.
Output ripple voltage is determined by the equation (4):
VOUT
L
ΔVOUT=ΔIL×ESR [V]・・・(4)
(ΔIL: Output ripple current, ESR: Equivalent series resistance of output capacitor)
ESR
Co
*Rating of the capacitor should be determined allowing sufficient margin
against output voltage. Less ESR allows reduction in output ripple voltage.
Figure 28. Output capacitor
As the output rise time must be designed to fall within the soft-start time, the capacitance of output capacitor should be
determined with consideration on the requirements of equation (5):
Tss: Soft-start time
TSS×(Ilimit-IOUT)
Co≦
[F]・・・(5)
Ilimit: Over current detection level, 2A(Typ)
VOUT
For instance, and if VOUT=3.3V, IOUT=0.8A, and TSS=1ms,
1m×(2-0.8)
Co≦
≒364 [μF]
3.3
Inappropriate capacitance may cause problem in startup. A 10 μF to 100 μF ceramic capacitor is recommended.
3. Selection of input capacitor (Cin)
VCC
Cin
VOUT
L
Co
Input capacitor to select must be a low ESR capacitor of the capacitance
sufficient to cope with high ripple current to prevent high transient voltage. The
ripple current IRMS is given by the equation (6):
√VOUT(VCC-VOUT)
IRMS=IOUT×
[A]・・・(6)
VCC
< Worst case > IRMS(max.)
IOUT
When VCC is twice the Vout, IRMS=
2
If VCC=5V, VOUT=3.3V, and IOUTmax.=0.8A,
√3.3(5-3.3)
IRMS=0.8×
=0.38[ARMS]
5
A low ESR 10μF/10V ceramic capacitor is recommended to reduce ESR dissipation of input capacitor for better efficiency.
Figure 29. Input capacitor
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4. Determination of RITH, CITH that works as a phase compensator
As the Current Mode Control is designed to limit a inductor current, a pole (phase lag) appears in the low frequency area
due to a CR filter consisting of a output capacitor and a load resistance, while a zero (phase lead) appears in the high
frequency area due to the output capacitor and its ESR. So, the phases are easily compensated by adding a zero to the
power amplifier output with C and R as described below to cancel a pole at the power amplifier.
fp(Min)
1
[Hz]
2π×RO×CO
1
[Hz]
fz(ESR)=
2π×ESR×CO
A
fp=
fp(Max)
Gain
[dB]
0
fz(ESR)
IOUTMin
IOUTMax
Pole at power amplifier
When the output current decreases, the load resistance Ro
increases and the pole frequency lowers.
0
Phase
[deg]
-90
fp(Min)=
1
2π×ROMax×CO
[Hz]←with lighter load
fp(Max)=
1
2π×ROMin×CO
[Hz]←with heavier load
Figure 30. Open loop gain characteristics
A
Zero at power amplifier
Increasing capacitance of the output capacitor lowers the
pole frequency while the zero frequency does not change.
(This is because when the capacitance is doubled, the
capacitor ESR reduces to half.)
fz(Amp)
Gain
[dB]
0
fz(Amp)=
1
2π×RITH×CITH
[Hz]
0
Phase
[deg]
-90
Figure 31. Error amp phase compensation characteristics
VCC
Cin
EN
VOUT
L
VCC,PVCC
SW
VOUT
ITH
VOUT
ESR
GND,PGND
RO
CO
RITH
CITH
Figure 32. Typical application
Stable feedback loop may be achieved by canceling the pole fp (Min) produced by the output capacitor and the load
resistance with CR zero correction by the error amplifier.
fz(Amp)= fp(Min)
1
2π×RITH×CITH
=
1
2π×ROMax×CO
5. Determination of output voltage
The output voltage VOUT is determined by the equation (7):
VOUT=(R2/R1+1)×VADJ・・・(7) VADJ: Voltage at ADJ terminal (0.8V Typ)
With R1 and R2 adjusted, the output voltage may be determined as required.
L
SW
ADJ
Adjustable output voltage range:1.0V to 2.5V
Output
Co
R2
R1
Use 1 kΩ to 100 kΩ resistor for R1. If a resistor of the resistance higher than
100 kΩ is used, check the assembled set carefully for ripple voltage etc.
Figure 33. Determination of output voltage
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Switching Regulator Efficiency
Efficiency ŋ may be expressed by the equation shown below:
VOUT×IOUT
η=
POUT
×100[%]=
×100[%]=
POUT
×100[%]
Vin×Iin
Pin
POUT+PDα
Efficiency may be improved by reducing the switching regulator power dissipation factors PDα as follows:
Dissipation factors:
2
1) ON resistance dissipation of inductor and FET:PD(I R)
2) Gate charge/discharge dissipation:PD(Gate)
3) Switching dissipation:PD(SW)
4) ESR dissipation of capacitor:PD(ESR)
5) Operating current dissipation of IC:PD(IC)
1)PD(I2R)=IOUT2×(RCOIL+RON) (RCOIL[Ω]:DC resistance of inductor, RON[Ω]:ON resistance of FETIOUT[A]:Output current.)
2)PD(Gate)=Cgs×f×V2 (Cgs[F]:Gate capacitance of FET,f[Hz]:Switching frequency,V[V]:Gate driving voltage of FET)
3)PD(SW)=
Vin2×CRSS×IOUT×f
(CRSS[F]:Reverse transfer capacitance of FET、IDRIVE[A]:Peak current of gate.)
IDRIVE
4)PD(ESR)=IRMS2×ESR (IRMS[A]:Ripple current of capacitor,ESR[Ω]:Equivalent series resistance.)
5)PD(IC)=Vin×ICC (ICC[A]:Circuit current.)
Power Dissipation
As this IC functions with high efficiency without significant heat generation in most applications, no special consideration is
needed on permissible dissipation or heat generation. In case of extreme conditions, however, including lower input
voltage, higher output voltage, heavier load, and/or higher temperature, the permissible dissipation and/or heat generation
must be carefully considered.
For dissipation, only conduction losses due to DC resistance of inductor and ON resistance of FET are considered.
Because the conduction losses are considered to play the leading role among other dissipation mentioned above including
gate charge/discharge dissipation and switching dissipation.
Power dissipation:Pd [mW]
1000
800
600
400
P=IOUT2×(RCOIL+RON)
RON=D×RONP+(1-D)×RONN
①mounted on glass epoxy PCB
θja =212.8°C /W
②Using an IC alone
θja =322.6°C /W
D:ON duty (=VOUT/VCC)
RCOIL:DC resistance of coil
RONP:ON resistance of P-channel MOS FET
RONN:ON resistance of N-channel MOS FET
IOUT:Output current
①587.4mW
②387.5mW
200
0
0
25
50
75 85 100
125
150
Ambient temperature:Ta [°C]
Figure 34. Thermal derating curve
(MSOP8)
If VCC=5V, VOUT=3.3V, RCOIL=0.15Ω, RONP=0.35Ω, RONN=0.25Ω, IOUT=0.8A, for example,
D=VOUT/VCC=3.3/5=0.66
RON=0.66×0.35+(1-0.66)×0.25
=0.231+0.085
=0.316[Ω]
P=0.82×(0.15+0.316)
≒298[mV]
As RONP is greater than RONN in this IC, the dissipation increases as the ON duty becomes greater. With the
consideration on the dissipation as above, thermal design must be carried out with sufficient margin allowed.
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I/O equivalence circuit
・EN pin
・SW pin
VCC
PVCC
PVCC
PVCC
10kΩ
EN
SW
・ITH pin
・ADJ pin
VCC
VCC
10kΩ
ITH
ADJ
Figure 35.
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I/O equivalence circuit
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BD9106FVM-LB
Operational Notes
1.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power
supply pins.
2.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the
digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog
block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and
aging on the capacitance value when using electrolytic capacitors.
3.
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5.
Thermal Consideration
Should by any chance the power dissipation rating be exceeded the rise in temperature of the chip may result in
deterioration of the properties of the chip. The absolute maximum rating of the Pd stated in this specification is when
the IC is mounted on a 70mm x 70mm x 1.6mm glass epoxy board. In case of exceeding this absolute maximum
rating, increase the board size and copper area to prevent exceeding the Pd rating.
6.
Recommended Operating Conditions
These conditions represent a range within which the expected characteristics of the IC can be approximately obtained.
The electrical characteristics are guaranteed under the conditions of each parameter.
7.
Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush
current may flow instantaneously due to the internal powering sequence and delays, especially if the IC
has more than one power supply. Therefore, give special consideration to power coupling capacitance,
power wiring, width of ground wiring, and routing of connections.
8.
Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
9.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may
subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply
should always be turned off completely before connecting or removing it from the test setup during the inspection
process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during
transport and storage.
10. Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.
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BD9106FVM-LB
Operational Notes – continued
11.
Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and
cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the
power supply or ground line.
12. Regarding the Input Pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should
be avoided.
Resistor
Transistor (NPN)
Pin A
Pin B
C
E
Pin A
N
P+
P
N
N
P+
N
Pin B
B
Parasitic
Elements
N
P+
N P
N
P+
B
N
C
E
Parasitic
Elements
P Substrate
P Substrate
GND
GND
Parasitic
Elements
GND
Parasitic
Elements
GND
N Region
close-by
Figure 36. Example of monolithic IC structure
13.
Ceramic Capacitor
When using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
14. Area of Safe Operation (ASO)
Operate the IC such that the output voltage, output current, and power dissipation are all within the Area of Safe
Operation (ASO).
15. Thermal Shutdown Circuit(TSD)
This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always
be within the IC’s power dissipation rating. If however the rating is exceeded for a continued period, the junction
temperature (Tj) will rise which will activate the TSD circuit that will turn OFF all output pins. When the Tj falls below
the TSD threshold, the circuits are automatically restored to normal operation.
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from
heat damage.
16. Over Current Protection Circuit (OCP)
This IC incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This
protection circuit is effective in preventing damage due to sudden and unexpected incidents. However, the IC should
not be used in applications characterized by continuous operation or transitioning of the protection circuit.
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BD9106FVM-LB
Ordering Information
B
D
9
1
0
Part Number
6
F
V
M
Package
FVM:MSOP8
-
LBTR
Product class
LB for Industrial applications
Packaging and forming specification
TR: Embossed tape and reel
Marking Diagrams
MSOP8(TOP VIEW)
Part Number Marking
D
0
9
1
6
LOT Number
1PIN MARK
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BD9106FVM-LB
Physical Dimension, Tape and Reel Information
Package Name
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MSOP8
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BD9106FVM-LB
Revision History
Date
Revision
10.Sep.2013
21.Feb.2014
001
002
Changes
New Release
Delete sentence “and log life cycle” in General Description and Futures.
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Datasheet
Notice
Precaution on using ROHM Products
1.
If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1),
aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,
bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales
representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any
ROHM’s Products for Specific Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.
Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the
use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our
Products under any special or extraordinary environments or conditions (as exemplified below), your independent
verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual
ambient temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used; if flow soldering method is preferred, please consult with the
ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice - SS
© 2014 ROHM Co., Ltd. All rights reserved.
Rev.002
Datasheet
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
QR code printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since our Products might fall under controlled goods prescribed by the applicable foreign exchange and foreign trade act,
please consult with ROHM representative in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data. ROHM shall not be in any way responsible or liable
for infringement of any intellectual property rights or other damages arising from use of such information or data.:
2.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the information contained in this document.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
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© 2014 ROHM Co., Ltd. All rights reserved.
Rev.002
Datasheet
General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3.
The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or
concerning such information.
Notice – WE
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