IRF AUIR08152S Buffer gate driver integrated circuit Datasheet

Automotive Grade
AUIR08152S
BUFFER GATE DRIVER INTEGRATED CIRCUIT
Features









Product Summary
High peak output current
Negative turn-off bias
Separate Ron / Roff resistors
Low supply current
Under-voltage lockout
Full time ON capability
Low propagation delay time
Gate clamping when no supply
Automotive qualified
Outputs Current:
Operating Voltage:
Negative Gate Bias:
+/- 10A
13V to 25V
0 to -10V
Package
Applications


High power inverters
EV/HEV power trains
SOIC8
Description
The AUIR08152 buffer brings high power gate drive capability to all pre-driver stages. It is the output extension of
the wide I.R gate driver families. It features a negative Gate bias for applications requiring high levels of dv/dt
immunity, a low power consumption mode as well as the full time ON gate drive ability. Shoot-through prevention is
extended even when the AUIR08152S supplies are absent by mean of a Gate to Emitter self-clamping impedance.
Ordering Information
Standard Pack
Base Part Number
Package Type
Complete Part Number
Form
Tube
AUIR08152S
SOIC8
Tape and reel
Quantity
95
AUIR08152S
2500
AUIR08152STR
Typical Connection
1
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AUIR08152S
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which permanent damage to the device may occur. These are stress ratings only, functional operation of the device at these or any
other condition beyond those indicated in the “Recommended Operating Condition” is not implied. Exposure to absolute maximum-rated conditions for extended periods may affect device
reliability. All voltage parameters are absolute voltages referenced to GND unless otherwise stated in the table. The thermal resistance and power dissipation ratings are measured mounted on
board in free air condition.
Symbol
Definition
Min
Max
Vcc-Gnd
Vcc to Gnd maximum voltage
-0.3
+37
Vcc-Vee
Vcc to Vee maximum voltage
-0.3
+37
Vcc-VIN
Vcc to Vin maximum voltage
-0.3
+37
Vcc to VLPM maximum voltage
-0.3
+37
VCB
CB to OUTH max voltage
-0.3
+5.5
ILPM
LPM pin maximum current
-10
+10
Iin
IN pin maximum current
-10
+10
Vcc-Vlpm
Units
V
mA
VOUTH
OUTH pin maximum voltage, DC operation
Vcc - 37
VCC + 0.3
VOUTL
OUTL pin maximum voltage, DC operation
VEE - 0.2
VCC + 0.3
IOUTH
Maximum input transient current to OUTH pin (t < 1us,Ron = 2)
---
2
IOUTL
Maximum output transient current from OUTL pin (t < 1us, Roff = 2)
---
1.5
Package power dissipation @ TA ≤ 25 °C
—
1
W
Thermal resistance, junction to ambient
—
80
K/W
TJ
Junction temperature
-40
150
TS
Storage temperature
-55
150
TL
Lead temperature (soldering, 10 seconds)
—
300
Min.
Max.
PD
RthJA
V
A
°C
Recommended Operating Conditions
The recommended conditions represent the AUIR08152 optimum performances for the typical application
Symbol
Definition
VCC-GND
Gate driver positive supply voltage
15
25
GND-VEE
Recommended negative gate bias
0
-10
VCC-VEE
Total supply voltage
15
35
V
VOUTH
OUTH Output voltage
Vcc - 35
Vcc
VIN,lpm
IN and LPM pins voltage range
Vcc-35
VCC
Cboot
Recommended bootstrap ceramic capacitor
10
47
Cload
Maximum recommended equivalent gate capacitor
—
240
Cdec
Recommended Vcc & Vee decoupling capacitors*
22
33
Ron
OUTH series resistor to gate
1.5
20
Roff
OUTL series resistor to gate
1.5
20
Recommended pull-up resistor for IN and LPM pins
10
100
PWoff
Minimum recommended OFF time on the IN pin
1
—
PWon
Minimum recommended ON time on the IN pin
1
—
R pull-up
Units
nF
µF
Ω
kΩ
µs
* Due to the high current application a good quality low ESR capacitor has to be used.
Numbers are indicative, a value about 40 times the load capacitance seen at the OutH and OutL pins is suggested.
2
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AUIR08152S
Static Electrical Characteristics
VCC – Gnd = 15V, VEE – Gnd = -5V, Cboot = 15nF, Ron = Roff = 3Ω, -40 °C < TA < 125 °C unless otherwise specified.
Symbol
Definition
Min
Typ
Max
VCCUV+
VCC-GND under-voltage rising edge
—
11.7
12.8
VCCUV-
VCC-GND under-voltage falling edge
9.6
10.5
—
VCCUVH
VCC-GND under-voltage hysteresis
0.5
1.2
—
VCBUV (*)
VCB under-voltage lockout
2.8
4
5.7
IQGG
Current out of the Gnd pin
—
20
60
Units
Test Conditions
V
LPM = X, IN = Vcc, Vee = Gnd;
IN = X, LPM = X
µA
IQOUTL1
Current flowing into the OUTL pin
—
0
1.5
IQEESW
VEE pin current, IN cycling
—
3
8
IN = Vcc,LPM = X,
OUTH = NC, VOUTL–Gnd = 15V
IN = 10kHz - 50% duty cycle
LPM = Vcc, CLOAD = 0nF
IQEE0
VEE pin current – output OFF – normal mode
—
1.5
4
IN = Gnd, LPM = Vcc
IQEE1
VEE pin current – output ON – normal mode
—
0.8
1.6
IN = Vcc, LPM = Vcc
IQEELQ0
VEE pin current – output OFF – low power
mode
—
0.6
2.0
IN = Gnd, LPM = Gnd
IQEELQ1
VEE pin current – output ON – low power mode
—
0.8
1.6
IN = Vcc, LPM = Gnd
mA
VEE pin current at low Vcc supply
—
0.6
1.6
CB pin sink current
—
0.5
1
IN = Vcc, LPM = Vcc, VCB-VOUTH = 5.5V
OUTH pin sourced current – normal mode
—
1
3.5
OUTH pin sourced current – low power mode
—
0.2
0.5
CB pin sourced current – normal mode
30
90
—
IN = Gnd, LPM = Vcc
OUTH = VEE, OUTL = NC
IN = Gnd, LPM = Gnd
OUTH = VEE, OUTL = NC
IN = Gnd, LPM = Vcc,
OUTL = NC, CB = OUTH = Vee
IBOUTH_pl
CB pin pulsed sourced current – normal mode
90
200
—
Min pulse length 2us guaranteed by design
IBOUTHLQ
CB pin sourced current – low power mode
0.5
5
23
IOUTH+ /IOUTL-
OUTH /OUTL pins output current capability
10
—
—
A
IN = Gnd, LPM = Gnd,
OUTL = NC, CB = OUTH = Vee
LPM = X
VOUTL-: t < 100us, VOUTH+: CB charged
Vcc-VinH
IN pin – output ON voltage
1.5
2.5
—
Vcc-VinL
IN pin – output OFF voltage
—
4.5
5.5
IN pin voltage hysteresis
1
2
—
V
Vcc-Gnd > Vccuv+
IQEEUV
IQB
IQOUTH0
IQOUTH0LQ
IBOUTH
VINhys
Vcc-VLPMH
LPM pin normal mode voltage
1.4
2
—
Vcc-VLPML
LPM pin low power mode voltage
—
3.2
3.8
LPM pin voltage hysteresis
0.3
1.1
—
IN pin sourced current
40
90
180
VLPMhys
IIN15
IN = X, LPM = X, VCC<VCCUV-
IN = Gnd
µA
ILPM15
LPM pin sourced current
10
25
50
Rdson OUTH
OUTH transistor Rdson
—
100
200
Rdson OUTL
OUTL transistor Rdson
—
200
400
OUTH Pulling- up current source
15
30
120
IPMOS (*)
LPM = Gnd
mΩ
mA
IN = Vcc, Iout 10A, t < 100us,
Gnd = Vee, VCB = VOUTH + 5.5V
-IN = Gnd, Iout = 10A,
t < 100us, Gnd = Vee
IN = Vcc, LPM = X,
Vcc – VOUTH = 1.5V
(*)When VCB – VOUTH < VCBUV, OUTH pin remaining pulled-up to Vcc is guaranteed for at least 3usec with low impedance (=Ron) via VDmos
then continuously with higher impedance via PMos (= Ipmos, see block diagram).
3
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AUIR08152S
Switching Electrical Characteristics
VCC – Gnd = 15V, Vee – Gnd = -9V, Cboot = 15nF, Ron= Roff = 3Ω , CLOAD = 220nF, -40 °C < TA < 125 °C unless otherwise specified.
Symbol
Definition
Min.
Typ.
Max.
Units
Test Conditions
ton
OUTH turn on propagation delay
—
150
350
toff
OUTL turn off propagation delay
—
230
350
OUTL turn off prop. delay when VCB < VCBuv *
—
90
350
tr
OUTH rise time
—
50
150
tf
OUTL fall time
—
50
150
trLQ
OUTH rise time (IN=1, Vcc ramping up, LPM = Gnd)
—
50
250
VEE = LPM = Gnd, IN = Vcc
tfLQ
OUTL fall time
—
50
250
VEE = LPM = Gnd, IN = Vcc
toff_VCBuv
(IN=1, Vcc ramping down, LPM = Gnd)
See parameters definitions
LPM = X
ns
Min Out-ON
ON time for 0.5µs IN pulse
200
600
900
Cload = open
Min Out-OFF
OFF time for 0.5µs IN pulse, CB discharged
200
500
900
Cload = open, CB = 15 nF
OFF time for 0.5µs IN pulse, CB charged
200
400
900
Cload = open, CB = 15 nF
—
0.6
3
—
0.6
3
cb discharged
Min Out-OFF
cb charged
tonLPM
LPM activation time (from LPM edge to ICB < IBOUTH/2
)
toffLPM
LPM deactivation time (from LPM edge to ICB > IBOUTH/2 )
* See also Fig. 5
µs
by design
Truth Table
IN
LPM
VCC
X
Gnd
Gnd
Vcc
Vcc
X
Gnd
Vcc
Gnd
Vcc
< Vccuv
> Vccuv
> Vccuv
> Vccuv
> Vccuv
OUTH
OUTL
Open
Open
Open
Vcc
Vcc
Status
Vee
Vee
Vee
Open
Open
IGBT or MOSFET = OFF
IGBT or MOSFET = OFF
IGBT or MOSFET = OFF
IGBT or MOSFET = ON
IGBT or MOSFET = ON
–
–
–
–
–
Low power mode
Low power mode
Normal mode
Low power mode
Normal mode
Lead Assignments
Lead Definitions
Symbol
Pin
Description
1
CB
External Bootstrap capacitor
Vee
Negative Supply Pin
2
Gate Drive Input, (IN= Vcc forces OutH = high)
3
LPM
Low Power Mode Input, LPM= GND activates the Low Power Mode
4
GND
0V – IGBT Emitter or MOSFET Source Connection
5
OUTL
Gate Drive Output Pull down
6
OUTH
Gate Drive Output Pull up
7
Positive Supply Pin
8
IN
Vcc
4
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(cf. typical connection schematic)
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(cf. typical connection schematic)
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AUIR08152S
Functional Block Diagram
5
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Timing Diagram
Parameters Definitions
Propagation delay definitions
6
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Rise and fall time definitions
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AUIR08152S
Application Tips
The AUIR08152S features a self-clamping gate protection in case of the auxiliary power supply disappears.
A resistor is pulling up the gate of the OUTL internal power MOSFET to keep OutL pulled down until a minimum
Vcc is applied, when Vcc disappears (< about 3V) then the Vgate is clamped via the OUTH ESD diode.
In this situation forcing OutL high injects current into the pin that charges the Vcc decoupling capacitor and
reactivates the internal OUTL output power MOSFET (for more info see the Functional Block Diagram).
7
a)
If no negative bias is used, Vee shall be connected to Gnd
b)
OUTH and OUTL pins shall never be shorted together
c)
Decoupling capacitors shall be ceramic types and implemented
as close as possible of the AUIR08152S supply pins
d)
The decoupling capacitors shall be at least 40 times bigger than
the max. Cload and of low ESR type, in order to avoid any Vccuv
oscillations
e)
IN and LPM pins shall never be left open
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AUIR08152S
Parameters
Figures are given for typical value @ Tj=25°C otherwise specified
Figure 1:
Figure 2:
Figure 3:
Figure 4:
Figure 5:
8
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Figure 6:
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AUIR08152S
Case Outline – SO8
9
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AUIR08152S
Tape & Reel
10
SO8
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AUIR08152S
Part Marking Information
Qualification Information
†
Qualification Level
Moisture Sensitivity Level
Machine Model
ESD
Human Body Model
Charged Device Model
IC Latch-Up Test
RoHS Compliant
†
††
11
Automotive
(per AEC-Q100)
Comments: This family of ICs has passed an
Automotive qualification. IR’s Industrial and
Consumer qualification level is granted by extension
of the higher Automotive level.
SOIC8N
MSL2†† 260°C
(per IPC/JEDEC J-STD-020)
Class M2 (+/-200V)
(per AEC-Q100-003)
Class H2 (+/-2500V)
(per AEC-Q100-002)
Class C4 (Pass +/-1000V)
(per AEC-Q100-011)
Class II, Level A
(per AEC-Q100-004)
Yes
Qualification standards can be found at International Rectifier’s web site http://www.irf.com/
Higher MSL ratings may be available for the specific package types listed here.
Please contact your International Rectifier sales representative for further information.
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AUIR08152S
IMPORTANT NOTICE
Unless specifically designated for the automotive market, International Rectifier Corporation and its subsidiaries
(IR) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its
products and services at any time and to discontinue any product or services without notice. Part numbers
designated with the “AU” prefix follow automotive industry and / or customer specific requirements with regards to
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of sale supplied at the time of order acknowledgment.
IR warrants performance of its hardware products to the specifications applicable at the time of sale in accordance
with IR’s standard warranty. Testing and other quality control techniques are used to the extent IR deems
necessary to support this warranty. Except where mandated by government requirements, testing of all parameters
of each product is not necessarily performed.
IR assumes no liability for applications assistance or customer product design. Customers are responsible for their
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For technical support, please contact IR’s Technical Assistance Center
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WORLD HEADQUARTERS:
101 N. Sepulveda Blvd., El Segundo, California 90245
Tel: (310) 252-7105
12
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AUIR08152S
Revision History
Revision
Date
Notes/Changes
th
A1
A2
A3
A4
A5
A6
August 5 , 2013
August 23rd 2013
August 26th 2013
September 2nd 2013
Dec. 5th, 2013
Aug. 27th, 2014
13
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Preliminary Datasheet AUIR08152S
Advanced datasheet
Advanced datasheet
Final datasheet, updated Iout+ and Iout- definition
Updated cosmetic for production
Updated note * on page 3, updated page footer
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