Infineon ESD208-B1-02EL Ultra low clamping esd / transient protection diode Datasheet

TVS Diode
Transient Voltage Suppressor Diodes
ESD208-B1-02 Series
Ultra Low Clamping ESD / Transient Protection Diode
ESD208-B1-02EL
ESD208-B1-02ELS
Data Sheet
Revision 1.2, 2013-11-29
Final
Power Management & Multimarket
ESD208-B1-02 Series
Revision History Revision 1.1, 2013-11-26
Page or Item
Subjects (major changes since previous revision)
Revision 1.2, 2013-11-29
5
Update of Table 2-2)
Trademarks of Infineon Technologies AG
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PrimePACK™, PrimeSTACK™, PRO-SIL™, PROFET™, RASIC™, ReverSave™, SatRIC™, SIEGET™,
SINDRION™, SIPMOS™, SMARTi™, SmartLEWIS™, SOLID FLASH™, TEMPFET™, thinQ!™,
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Other Trademarks
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development partnership. Bluetooth™ of Bluetooth SIG Inc. CAT-iq™ of DECT Forum. COLOSSUS™,
FirstGPS™ of Trimble Navigation Ltd. EMV™ of EMVCo, LLC (Visa Holdings Inc.). EPCOS™ of Epcos AG.
FLEXGO™ of Microsoft Corporation. FlexRay™ is licensed by FlexRay Consortium. HYPERTERMINAL™ of
Hilgraeve Incorporated. IEC™ of Commission Electrotechnique Internationale. IrDA™ of Infrared Data
Association Corporation. ISO™ of INTERNATIONAL ORGANIZATION FOR STANDARDIZATION. MATLAB™ of
MathWorks, Inc. MAXIM™ of Maxim Integrated Products, Inc. MICROTEC™, NUCLEUS™ of Mentor Graphics
Corporation. Mifare™ of NXP. MIPI™ of MIPI Alliance, Inc. MIPS™ of MIPS Technologies, Inc., USA. muRata™
of MURATA MANUFACTURING CO., MICROWAVE OFFICE™ (MWO) of Applied Wave Research Inc.,
OmniVision™ of OmniVision Technologies, Inc. Openwave™ Openwave Systems Inc. RED HAT™ Red Hat, Inc.
RFMD™ RF Micro Devices, Inc. SIRIUS™ of Sirius Satellite Radio Inc. SOLARIS™ of Sun Microsystems, Inc.
SPANSION™ of Spansion LLC Ltd. Symbian™ of Symbian Software Limited. TAIYO YUDEN™ of Taiyo Yuden
Co. TEAKLITE™ of CEVA, Inc. TEKTRONIX™ of Tektronix Inc. TOKO™ of TOKO KABUSHIKI KAISHA TA.
UNIX™ of X/Open Company Limited. VERILOG™, PALLADIUM™ of Cadence Design Systems, Inc. VLYNQ™
of Texas Instruments Incorporated. VXWORKS™, WIND RIVER™ of WIND RIVER SYSTEMS, INC. ZETEX™ of
Diodes Zetex Limited.
Last Trademarks Update 2010-10-26
Final Data Sheet
2
Revision 1.2, 2013-11-29
ESD208-B1-02 Series
Ultra Low Clamping ESD / Transient Protection Diode
1
Ultra Low Clamping ESD / Transient Protection Diode
1.1
Features
•
•
•
•
•
ESD / transient protection of signal lines in low voltage applications according to:
– IEC61000-4-2 (ESD): ±30 kV air discharge, ±25 kV contact discharge
– IEC61000-4-4 (EFT): ±80 A / ±4 kV (5/50 ns)
– IEC61000-4-5 (Surge): ±4 A (8/20 µs)
Bi-directional, symmetrical working voltage up to VRWM = ±3.3 V
Low capacitance: CL = 6 pF (typical)
Very low clamping voltage due to extremely low dynamic resistance down to: RDYN = 0.2 Ω (typical)
Pb-free (RoHS compliant) and halogen free package, very small form factor down to: 0.62 x 0.32 x 0.31 mm3
1.2
•
•
•
Application Examples
Keypad, touchpad, buttons, convenience keys
LCD displays, Camera, audio lines, mobile communication, Consumer products (E-Book, MP3, DVD, DSC...)
Notebooks tablets and desktop computers and their peripherals
1.3
Product Description
Pin 1
Pin 2
Pin 1 marking
(lasered)
Pin 1
TSLP-2
Pin 1
Pin 2
Pin 2
TSSLP-2
a) Pin configuration
b) Schematic diagram
P G-TS (S)LP -2_Dual_Diode_S erie_P inConf_and_S c hematic Diag. v s d
Figure 1-1 Pin Configuration and Schematic Diagram
Table 1-1
Ordering Information
Type
Package
Configuration
Marking code
ESD208-B1-02EL
TSLP-2-19
1 line, bi-directional
C
ESD208-B1-02ELS
TSSLP-2-3
1 line, bi-directional
C
Final Data Sheet
3
Revision 1.2, 2013-11-29
ESD208-B1-02 Series
Characteristics
2
Characteristics
Table 2-1
Maximum Ratings at TA = 25 °C, unless otherwise specified 1)
Parameter
Symbol
Values
Unit
Min.
Typ.
Max.
–
–
–
–
30
25
IPP
–
–
4
A
Peak pulse power (tp = 8/20 μs)
PPK
–
–
30
W
Operating temperature range
TOP
-55
–
125
°C
Storage temperature
Tstg
-65
–
150
°C
ESD discharge
air
contact
2)
kV
VESD
Peak pulse current (tp = 8/20 μs)3)
3)
1) Device is electrically symmetrical
2) VESD according to IEC61000-4-2 (R = 330 Ω, C = 150 pF)
3) IPP according to IEC61000-4-5 (tp = 8/20 μs)
Attention: Stresses above the max. values listed here may cause permanent damage to the device.
Exposure to absolute maximum rating conditions for extended periods may affect device
reliability. Maximum ratings are absolute ratings; exceeding only one of these values may
cause irreversible damage to the integrated circuit.
2.1
Electrical Characteristics at TA = 25 °C, unless otherwise specified
!"# Figure 2-1 Definitions of electrical characteristics
Final Data Sheet
4
Revision 1.2, 2013-11-29
ESD208-B1-02 Series
Characteristics
Table 2-2
DC Characteristics at TA = 25 °C, unless otherwise specified 1)
Parameter
Symbol
Values
Unit
Note /
Test Condition
Min.
Typ.
Max.
Reverse working voltage VRWM
–
–
3.3
V
Reverse current
IR
–
<10
50
nA
Trigger voltage
Vt1
3.65
–
–
V
Holding voltage
Vh
3.65
4
–
V
IR = 10 mA
Unit
Note /
Test Condition
pF
VR = 0 V, f = 1 MHz
VR = 3.3 V
1) Device is electrically symmetrical
Table 2-3
AC Characteristics at TA = 25 °C, unless otherwise specified
Parameter
Symbol
Line capacitance
Table 2-4
CL
Values
Min.
Typ.
Max.
–
6
9
6
9
VR = 0 V, f = 1 GHz
ESD and Surge Characteristics at TA = 25 °C, unless otherwise specified 1)
Parameter
Symbol
2)
Clamping voltage
VCL
Clamping voltage3)
Dynamic resistance
2)
RDYN
Values
Unit
Note /
Test Condition
V
ITLP = 16 A,
tp = 100 ns
Min.
Typ.
Max.
–
8
9.5
–
11
12.5
ITLP = 30 A,
tp = 100 ns
–
4.8
6.3
IPP = 1 A, tp = 8/20 µs
–
5.8
7.3
IPP = 3 A, tp = 8/20 µs
–
6.6
8.1
IPP = 4 A, tp = 8/20 µs
–
0.20
0.25
Ω
tp = 100 ns
1) Device is electrically symmetrical
2) Please refer to Application Note AN210 [1]TLP parameters: Z0 = 50 Ω , tp = 100 ns, tr = 0.6 ns, averaging window:
t1 = 30 ns to t2 = 60 ns, extraction of dynamic resistance using least squares fit of TLP characteristics between ITLP1 = 10 A
and ITLP2 = 40 A.
3) IPP according to IEC61000-4-5 (tp = 8/20 μs)
Final Data Sheet
5
Revision 1.2, 2013-11-29
ESD208-B1-02 Series
Typical Characteristics at TA = 25 °C, unless otherwise specified
3
Typical Characteristics at TA = 25 °C, unless otherwise specified
10-6
10-7
IR [mA]
10-8
-9
10
10-10
-11
10
-4
-3
-2
-1
0
VR [V]
1
2
3
4
100
125
150
Figure 3-1 Reverse current: IR = f(VR)
100
90
80
IR [nA]
70
60
50
40
30
20
10
0
-50
-25
0
25
50
TA [V]
75
Figure 3-2 Reverse current: IR = f(TA), VR = 3.3 V
Final Data Sheet
6
Revision 1.2, 2013-11-29
ESD208-B1-02 Series
Typical Characteristics at TA = 25 °C, unless otherwise specified
6.5
6
CL [pF]
f = 1 MHz
f = 1 GHz
5.5
5
4.5
4
-4
-3
-2
-1
0
VR [V]
1
2
3
4
Figure 3-3 Line capacitance: CL = f(VR)
800
700
PPK [W]
600
500
400
300
200
100
0
10-7
10-6
tp [s]
10-5
Figure 3-4 Peak pulse power: PPK = f (tp)
Final Data Sheet
7
Revision 1.2, 2013-11-29
ESD208-B1-02 Series
Typical Characteristics at TA = 25 °C, unless otherwise specified
30
ESD208-B1-02series
RDYN
50
25
40
20
30
15
ITLP [A]
20
RDYN = 0.20 Ω
10
10
5
0
0
-10
-5
-20
RDYN = 0.20 Ω
-10
-30
-15
-40
-20
-50
-25
-60
-20
-15
-10
Equivalent VIEC [kV]
60
-5
0
5
10
15
-30
20
VTLP [V]
Figure 3-5 Clamping voltage (TLP): ITLP = f(VTLP) according ANSI/ESD STM5.5.1 - Electrostatic Discharge
Sensitivity Testing using Transmission Line Pulse (TLP) Model. TLP conditions: Z0 = 50 Ω,
tp = 100 ns, tr = 0.6 ns, ITLP and VTLP averaging window: t1 = 30 ns to t2 = 60 ns, extraction of
dynamic resistance using squares fit to TLP characteristics between ITLP1 = 10 A and
ITLP2 = 40 A. Please refer to Application Note AN210 [1]
Final Data Sheet
8
Revision 1.2, 2013-11-29
ESD208-B1-02 Series
Typical Characteristics at TA = 25 °C, unless otherwise specified
5
ESD208-B1-02Eseries
RDYN
4
RDYN = 0.64 Ω
3
2
IPP [A]
1
0
-1
-2
RDYN = 0.72 Ω
-3
-4
-5
-10
-8
-6
-4
-2
0
VCL [V]
2
4
6
8
10
Figure 3-6 Pulse current (IEC61000-4-5) versus clamping voltage: IPP = f(VCL)
Final Data Sheet
9
Revision 1.2, 2013-11-29
ESD208-B1-02 Series
Typical Characteristics at TA = 25 °C, unless otherwise specified
100
Scope: 6 GHz, 20 GS/s
VCL [V]
75
VCL-max-peak = 59 V
50
VCL-30ns-peak = 6 V
25
0
-25
-50
0
50
100
150
200
tp [ns]
250
300
350
400
450
Figure 3-7 IEC61000-4-2 : VCL = f(t), 8 kV positive pulse from pin 1 to pin 2
25
Scope: 6 GHz, 20 GS/s
VCL [V]
0
-25
-50
VCL-max-peak = -61 V
VCL-30ns-peak = -6 V
-75
-100
-50
0
50
100
150
200
tp [ns]
250
300
350
400
450
Figure 3-8 IEC61000-4-2 : VCL = f(t), 8 kV negative pulse from pin 1 to pin 2
Final Data Sheet
10
Revision 1.2, 2013-11-29
ESD208-B1-02 Series
Typical Characteristics at TA = 25 °C, unless otherwise specified
125
Scope: 6 GHz, 20 GS/s
100
VCL [V]
75
VCL-max-peak = 91 V
50
VCL-30ns-peak = 9 V
25
0
-25
-50
-50
0
50
100
150
200
tp [ns]
250
300
350
400
450
Figure 3-9 IEC61000-4-2 : VCL = f(t), 15 kV positive pulse from pin 1 to pin 2
50
Scope: 6 GHz, 20 GS/s
25
VCL [V]
0
-25
-50
VCL-max-peak = -107 V
-75
VCL-30ns-peak = -7 V
-100
-125
-50
0
50
100
150
200
tp [ns]
250
300
350
400
450
Figure 3-10 IEC61000-4-2 : VCL = f(t), 15 kV negative pulse from pin 1 to pin 2
Final Data Sheet
11
Revision 1.2, 2013-11-29
ESD208-B1-02 Series
Application Information
4
Application Information
Insertion Loss
in the application
Networkanalysor
50 Ohm port1
Line
Networkanalysor
50 Ohm port2
Line
ESD208_B1-02series
ESD 208-B1-02series_insertion_loss.vsd
Figure 4-1 Insertion loss measured in 50 Ω environment
0
-2
Insertion Loss [dB]
-4
-6
-8
-10
-12
-14
-16
-18
-20
100
ESD208-B1-02EL
ESD208-B1-02ELS
101
102
f [MHz]
103
104
Figure 4-2 Insertion loss vs. frequency of ESD208-B1-02xx in a 50 Ω system
Final Data Sheet
12
Revision 1.2, 2013-11-29
ESD208-B1-02 Series
Connector
Application Information
Protected signal line
ESD
I/O sensitive
device
1
2
The protection diode should be placed very close to the location
where the ESD or other transients can occur to keep loops and
inductances as small as possible .
Pin 2 (or pin 1) should be connected directly to a ground plane on
the board .
A pplic ation_E S D5V3S 1B-02LS .v s d
Figure 4-3 Single line, bi-directional ESD / Transient protection
Final Data Sheet
13
Revision 1.2, 2013-11-29
ESD208-B1-02 Series
Package Information
5
Package Information
5.1
TSLP-2-19
Top view
Bottom view
0.31 +0.01
-0.02
0.6 ±0.05
1±0.05
2
1
0.25 ±0.035 1)
0.65 ±0.05
0.05 MAX.
0.5 ±0.035 1)
Cathode
marking
1) Dimension applies to plated terminals
TSLP-2-19, -20-PO V01
Figure 5-1 TSLP-2-19: Package overview (dimension in mm)
0.28
0.35
Solder mask
0.38
0.93
0.3
1
Copper
0.28
0.45
0.35
0.6
Stencil apertures
TSLP-2-19, -20-FP V01
Figure 5-2 TSLP-2-19: Footprint (dimension in mm)
0.4
1.16
Cathode
marking
8
4
0.76
TSLP-2-19, -20-TP V02
Figure 5-3 TSLP-2-19: Tape information (dimension in mm)
Type code
12
Cathode marking
TSLP-2-19, -20-MK V01
Figure 5-4 TSLP-2-19: Marking (example)
Final Data Sheet
14
Revision 1.2, 2013-11-29
ESD208-B1-02 Series
Package Information
5.2
TSSLP-2-3
Top view
Bottom view
0.31 +0.01
-0.02
0.32 ±0.05
0.355
0.62 ±0.05
2
0.05 MAX.
Cathode
marking
0.26 ±0.035
0.2 ±0.035 1)
1
1)
1) Dimension applies to plated terminals
TSSLP-2-3, -4-PO V01
Figure 5-5 TSSLP-2-3: Package outline(dimension in mm)
0.19
0.24
Solder mask
0.19
0.57
0.14
0.62
Copper
0.19
0.27
0.24
0.32
Stencil apertures
TSSLP-2-3, -4-FP V02
Figure 5-6 TSSLP-2-3: Footprint (dimension in mm)
g
0.35
4
8
Ey
Tape type
Ex Ey
Punched Tape
0.43 0.73
Embossed Tape 0.37 0.67
Deliveries can be both tape types (no selection possible).
Specification allows identical processing (pick & place) by users.
Cathode
marking
Ex
TSSLP-2-3, -4-TP V03
Figure 5-7 TSSLP-2-3: Tape information (dimension in mm)
1
Type code
Cathode marking
TSSLP-2-3, -4-MK V01
Figure 5-8 TSSLP-2-3: Marking (example)
Final Data Sheet
15
Revision 1.2, 2013-11-29
ESD208-B1-02 Series
References
References
[1]
Infineon AG - Application Note AN210: Effective ESD Protection design at System Level Using VF-TLP
Characterization Methodology
[2]
Infineon AG - Recommendations for PCB Assembly of Infineon TSLP and TSSLP Packages
Final Data Sheet
16
Revision 1.2, 2013-11-29
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