Rohm BD91361MUV-E2 Synchronous buck converter with integrated fet Datasheet

Datasheet
2.7V to 5.5V, 4A 1ch
Synchronous Buck Converter with
Integrated FET
BD91361MUV
General Description
Key Specifications
BD91361MUV is ROHM’s high efficiency step-down
switching regulator designed to provide a voltage as
low as 0.8V from a supply voltage of 5.5V/3.3V. It
offers high efficiency by using pulse skip control
technology and synchronous switches, and provides
fast transient response to sudden load changes by
implementing current mode control.








Features
Input Voltage Range:
Output Voltage Range:
Output Current:
Switching Frequency:
High side FET ON-Resistance:
Low side FET ON-Resistance:
Standby Current:
Operating Temperature Range:
Package
 Fast Transient Response because of Current Mode
PWM Control System
 High Efficiency for All Load Ranges because of
Synchronous Rectifier (Nch/Nch FET)
and SLLMTM (Simple Light Load Mode)
 Soft-Start Function
 Thermal Shutdown and UVLO Functions
 Short-Circuit Protection with Time Delay Function
 Shutdown Function
2.7V to 5.5V
0.8V to 3.3V
4.0A (Max)
1MHz(Typ)
60mΩ(Typ)
55mΩ(Typ)
0μA (Typ)
-40°C to +105°C
W(Typ) x D(Typ) x H(Max)
Applications
Power Supply for LSI including DSP, Microcomputer
and ASIC
VQFN020V4040
4.00mm x 4.00mm x 1.00mm
Typical Application Circuit
Rf
VCC
Cf
CIN
PVCC
EN
VCC
CBST
ADJ
ITH
RITH
L
SW
VID<1> VID<0>
VOUT
R2
CITH
CO
VCC
R1
Figure 1. Typical Application Circuit
○Product structure:Silicon monolithic integrated circuit
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Pin Configuration
(TOP VIEW)
GND
ADJ
ITH
VID<1>
VID<0>
15 14 13 12 11
N.C. 16
EN
PGND
10 VCC
17
9
18
8
19
7
20
6
1
2
3
4
BST
PVCC
5
SW
Figure 2. Pin Configuration
Pin Description
Pin
No.
1
Pin
Name
SW
Power switch node
Pin
No.
11
Pin
Name
GND
2
SW
Power switch node
12
ADJ
3
SW
Power switch node
13
ITH
4
SW
Power switch node
14
VID<1>
Output voltage detection pin
GmAmp output pin/connected to
phase compensation capacitor
Output voltage control pin<1>
5
SW
Power switch node
15
VID<0>
Output voltage control pin<0>
6
PVCC
Power switch supply pin
16
N.C.
7
PVCC
Power switch supply pin
17
EN
Enable pin (active high)
8
PVCC
Power switch supply pin
18
PGND
Power switch ground pin
9
BST
Bootstrapped voltage input pin
19
PGND
Power switch ground pin
10
VCC
Power supply input pin
20
PGND
Power switch ground pin
Function
Function
Ground pin
No connection
Block Diagram
V CC
EN
VCC
V
CC
VREF
BST
Current Comp
VID<0>
SELECTOR
R Q
+
VID<1>
Current
Sense/
Protect
PVCC
PV
CC
Input
S
Gm Amp
+
Soft
Start
SLOPE
CLK
OSC
VCC
SW
+
Driver
Logic
UVLO
Output
PVCC
PGND
TSD
SCP
GND
ITH
ADJ
R
R2
2
R
RITH
CITH
C
ITH
ITH
RR1
1
Figure 3. Block Diagram
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Absolute Maximum Ratings (Ta=25°C)
Parameter
VCC Voltage
PVCC Voltage
BST Voltage
BST_SW Voltage
EN Voltage
SW,ITH Voltage
Power Dissipation 1
Power Dissipation 2
Power Dissipation 3
Power Dissipation 4
Operating Temperature Range
Storage Temperature Range
Maximum Junction Temperature
Symbol
VCC
PVCC
VBST
VBST-SW
VEN
VSW, VITH
Pd1
Pd2
Pd3
Pd4
Topr
Tstg
Tjmax
Rating
-0.3 to +7 (Note 1)
-0.3 to +7 (Note 1)
-0.3 to +13
-0.3 to +7
-0.3 to +7
-0.3 to +7
0.34 (Note 2)
0.70 (Note 3)
2.21 (Note 4)
3.56 (Note 5)
-40 to +105
-55 to +150
+150
Unit
V
V
V
V
V
V
W
W
W
W
°C
°C
°C
(Note 1) Pd should not be exceeded.
(Note 2) IC only
(Note 3) Mounted on a 1-layer 74.2mmx74.2mmx1.6mm glass-epoxy board, occupied area by copper foil : 10.29mm2
(Note 4) Mounted on a 4-layer 74.2mmx74.2mmx1.6mm glass-epoxy board, 1st and 4th copper foil area : 10.29mm2, 2nd and 3rd copper foil area : 5505mm2
(Note 5) Mounted on a 4-layer 74.2mmx74.2mmx1.6mm glass-epoxy board, occupied area by copper foil : 5505mm2, in each layers
Caution: Operating the IC over the absolute maximum ratings may damage the IC. In addition, it is impossible to predict all destructive situations such as
short-circuit modes, open circuit modes, etc. Therefore, it is important to consider circuit protection measures, like adding a fuse, in case the IC is operated in
a special mode exceeding the absolute maximum ratings.
Recommended Operating Conditions (Ta=-40°C to +105°C)
Parameter
Power Supply Voltage
EN Voltage
Logic Input Voltage
Output Voltage Setting Range
SW Average Output Current
VCC
Min
2.7
Rating
Typ
3.3
Max
5.5
PVCC
2.7
3.3
5.5
V
VEN
0
-
5.5
V
VVID<1:0>
0
-
5.5
V
VOUT
0.8
-
3.3 (Note 6)
V
-
(Note 7)
A
Symbol
ISW
-
4.0
Unit
V
(Note 6) In case the output voltage is set to 1.6V or more, VCCMin = VOUT+1.2V.
(Note 7) Pd should not be exceeded.
Electrical Characteristics
(Unless otherwise specified, Ta=25°C VCC=PVCC=3.3V, VEN=VCC, VID<1>=VID<0>=0V, R1=10kΩ, R2=5kΩ)
Parameter
Standby Current
Active Current
EN Low Voltage
EN High Voltage
EN Input Current
VID Low Voltage
VID High Voltage
VID Input Current
Oscillation Frequency
High Side FET ON-Resistance
Low Side FET ON-Resistance
ADJ Voltage
ITH Sink Current
ITH Source Current
UVLO Threshold Voltage
UVLO Release Voltage
Soft-Start Time
Timer Latch Time
Output Short Circuit Threshold Voltage
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Symbol
ISTB
ICC
VENL
VENH
IEN
VVIDL
VVIDH
IVID
fOSC
RONH
RONL
VADJ
ITHSI
ITHSO
VUVLO1
VUVLO2
tSS
tLATCH
VSCP
Min
2.0
2.0
0.8
0.788
10
10
2.400
2.425
0.5
0.5
-
3/23
Limit
Typ
0
250
GND
VCC
3
GND
VCC
3
1
60
55
0.800
18
18
2.500
2.550
1
1
0.40
Max
10
500
0.8
10
0.8
10
1.2
90
85
0.812
2.600
2.700
2
2
0.56
Unit
µA
µA
V
V
µA
Conditions
EN=GND
Standby mode
Active mode
VEN=3.3V
VVID=3V
MHz
mΩ
mΩ
V
µA
µA
V
V
ms
ms
V
PVCC=3.3V
PVCC=3.3V
VVID<1:0>=(0,0)
VADJ=1V
VADJ=0.6V
VCC=3.3V to 0V
VCC=0V to 3.3V
VADJ =0.8V to 0V
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Datasheet
Typical Performance Curves
[VOUT=1.2V]
Output Voltage: VOUT [V]
Output Voltage: VOUT [V]
[VOUT=1.2V]
VCC=5V
Ta=25°C
IO=3A
Ta=25°C
IO=3A
Input Voltage: VCC[V]
EN Voltage: VEN [V]
Figure 4. Output Voltage vs Input Voltage
Figure 5. Output Voltage vs EN Voltage
[VOUT=1.2V]
Output Voltage: VOUT [V]
Output Voltage: VOUT [V]
[VOUT=1.2V]
Ta=25°C
VCC=2.7V
VCC=5V
IO=0A
VCC=5V
Output Current: IOUT [A]
Temperature: Ta[°C]
Figure 7. Output Voltage vs Temperature
Figure 6. Output Voltage vs Output Current
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Typical Performance Curves - continued
Efficiency: η [%]
Frequency: fOSC [kHz]
【VOUT=1.2V】
VCC=5V
Ta=25°C
VCC=5V
Temperature: Ta [°C]
Figure 8. Efficiency vs Output Current
Figure 9. Frequency vs Temperature
ON-Resistance: RON[Ω]
EN Voltage: VEN [V]
Output Current: IOUT [mA]
VCC=3.3V
VCC=5V
Temperature: Ta [°C]
Temperature: Ta [°C]
Figure 10. ON-Resistance vs Temperature
Figure 11. EN Voltage vs Temperature
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Circuit Current: VOUT [µA]
Frequency: fOSC [kHz]
Typical Performance Curves - continued
Ta=25°C
VCC=5V
Temperature: Ta [°C]
Input Voltage: VCC [V]
Figure 12. Circuit Current vs Temperature
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Figure 13. Frequency vs Input Voltage
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Typical Waveforms
[SLLMTM control
[VOUT=1.2V]
VCC=PVCC
VOUT=1.2V]
SW
=EN
VOUT
VOUT
VCC=5V
Ta=25°C
IO=0A
VCC=5V
Ta=25°C
Figure 15. SW Waveform
(IO=0mA)
Figure 14. Soft-Start Waveform
[PWM control
VOUT=1.2V]
[VOUT=1.2V]
VOUT
SW
IOUT
VCC = 5V
VCC = 5V
Figure 16. SW Waveform
(IO=4A)
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Figure 17. Transient Response
(IO=1A to 4A, 20µs)
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Typical Waveforms - continued
[VOUT=1.2V]
[VOUT=1.2V]
VOUT
VCC = 5V
IOUT
Figure 18. Transient Response
(IO=4A to 1A, 20µs)
Figure 19. Change Response
[VOUT=1.2V]
Figure 20. Change Response
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Application Information
1. Operation
BD91361MUV is a synchronous step-down switching regulator that achieves fast transient response by employing
current mode PWM control system. It utilizes switching operation in PWM (Pulse Width Modulation) mode for heavier
load, while it utilizes SLLMTM (Simple Light Load Mode) operation for lighter load to improve efficiency.
(1) Synchronous Rectifier
Integrated synchronous rectification using two MOSFETS reduces power dissipation and increases efficiency
when compared to converters using external diodes. Internal shoot-through current limiting circuit further reduces
power dissipation.
(2) Current Mode PWM Control
The PWM control signal of this IC depends on two feedback loops, the voltage feedback and the inductor current
feedback.
(a) PWM (Pulse Width Modulation) Control
The clock signal coming from OSC has a frequency of 1Mhz. When OSC sets the RS latch, the P-Channel
MOSFET is turned ON and the N-Channel MOSFET is turned OFF. The opposite happens when the current
comparator (Current Comp) resets the RS latch i.e. the P-Channel MOSFET is turned off and the N-Channel
MOSFET is turned ON. Current Comp’s output is a comparison of two signals, the current feedback control
signal “SENSE” which is a voltage proportional to the current IL, and the voltage feedback control signal, FB.
(b) SLLMTM (Simple Light Load Mode) Control
When the control mode is shifted by PWM from heavier load to lighter load or vice versa, the switching pulse is
designed to turn OFF with the device held operating in normal PWM control loop. This allows linear operation
without voltage drop or deterioration in transient response during the sudden load changes. Although the PWM
control loop continues to operate with a SET signal from OSC and a RESET signal from Current Comp, it is so
designed such that the RESET signal is continuously sent even if the load is changed to light mode where the
switching is tuned OFF and the switching pulses disappear. Activating the switching discontinuously reduces
the switching dissipation and improves the efficiency.
SENSE
Current
Comp
RESET
VOUT
Level
Shift
R Q
FB
SET
Gm Amp
IL
S
Driver
Logic
VOUT
SW
Load
OSC
RITH
Figure 21. Diagram of Current Mode PWM Control
PVCC
Current
Comp
SENSE
PVCC
SENSE
Current
Comp
FB
SET
FB
GND
SET
GND
RESET
GND
RESET
GND
SW
GND
SW
IL
GND
IL(AVE)
IL
0A
VOUT
VOUT
VOUT(AVE)
VOUT(AVE)
Not switching
Figure 23. SLLMTM Switching Timing Diagram
Figure 22. PWM Switching Timing Diagram
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2. Description of Functions
(1) Soft-Start Function
During start-up, the soft-start circuit gradually establishes the output voltage to limit the input current. This prevents
the overshoot in the output voltage and inrush current.
(2) Shutdown Function
When EN terminal is set to “Low”, the device operates in Standby Mode, and all the functional blocks such as
reference voltage circuit, internal oscillator and drivers are turned to OFF. Circuit current during standby is 0µA
(Typ).
(3) UVLO Function
This circuit detects whether the supplied input voltage is sufficient to provide the output voltage of this IC.
A hysteresis width of 50mV (Typ) is provided to prevent the output from chattering.
Hysteresis 50mV
VCC
EN
VOUT
tSS
tSS
tSS
Soft start
Standby Mode
Operating Mode
Standby
Mode
Operating Mode
UVLO
UVLO
Standby
Mode
Operating Mode
EN
Standby Mode
UVLO
Figure 24. Soft-Start, Shutdown, UVLO Timing Chart
(4) Short-Circuit Protection with Time Delay Function
To protect the IC from breakdown, the short-circuit turns the output OFF when the internal current limiter is
activated continuously for a fixed time (tLATCH) or more. The output that is kept OFF may be turned ON again by
restarting EN or by resetting UVLO.
EN
1msec
VOUT
Output Current in non-control
1/2VOUT
Until output voltage goes up the half of
VO or over, timer latch is not operated.
(No timer latch, only limit to the output current)
Limit
Output voltage OFF Latch
IL
Output Current in control by limit value
(With fall of the output voltage, limit value goes down)
Standby Mode
Operated Mode
Operated Mode
Standby Mode
EN
Timer Latch
EN
Figure 25. Short-Circuit Protection with Time Delay Diagram
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3. Information on Advantages
Advantage 1: Offers fast transient response by using current mode control system.
BD91361MUV (Load response IO=1A to 3A)
Conventional product (Load response IO=1A to 3A)
VOUT
VOUT
62mV
145mV
IOUT
IOUT
Voltage drop due to sudden change in load was reduced.
Figure 26. Comparison of Transient Response
Advantage 2:
Offers high efficiency for all load ranges.
(a) For lighter load:
This IC utilizes the current mode control called SLLMTM, which reduces various dissipations such as switching
dissipation (PSW), gate charge/discharge dissipation (PGATE), ESR dissipation of output capacitor (PESR) and
ON-Resistance dissipation (PRON) that may otherwise cause reduction in efficiency.
Achieves efficiency improvement for lighter load.
(b) For heavier load:
This IC utilizes the synchronous rectifying mode and uses low ON-Resistance power MOSFETs.
ON-Resistance of High side MOSFET : 60mΩ(Typ)
ON-Resistance of Low side MOSFET : 55mΩ(Typ)
100
SLLMTM
Efficiency η[%]
②
Achieves efficiency improvement for heavier load.
50
①
PWM
①improvement by SLLM system
②improvement by synchronous rectifier
0
0.001
Offers high efficiency for all load ranges with the improvements mentioned above.
0.01
0.1
Output current IOUT[A]
1
Figure 27. Efficiency
Advantage 3: ・Supplied in smaller package due to small-sized power MOS FET.
・Required output capacitance, CO ,for current mode control: 22µF ceramic capacitor
・Required inductance, L, for the operating frequency of 1 MHz: 2.2µH inductor
・Incorporates FET + Boot strap diode
Reduces mounting area requirement.
Vcc
EN
20mm
VCC
VREF
BST
Current
Comp
VID<0>
SELECTOR
+
VID<1>
Gm Amp
+
Soft
Start
SLOPE
VCC
CLK
UVLO
TSD
SCP
PVCC
Current
Sense/
Protect
+
Driver
Logic
SW
Rf
Input
Output
15mm
PVCC
R1
R2
PGND
GND
Cf CBST
L
CIN
RITH
CITH
Co
ITH
ADJ
R2
RITH CITH
R1
Figure 28. Example Application
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4. Setting the Output Voltage
Output voltage shifts step by step, depending on the bit setting, to control the overshoot/undershoot that happens when
changing the setting of output voltage. A delay of 8 steps (Max) will occur from the bit switching until output voltage
reaches the setting value.
(0,1)
VID<2:0>
(1,1)
0.96V
0.72V
VOUT
tVID (Max)=0.04ms
(a) Switching 2 bits synchronously
(c) Switching the bit during counting
VID<1>
<1>
VID<0>
<0>
Count STOP
Count STOP
VOUT
VOUT
5µs(Max)
About 10µs from bit switching
About 10µs from bit switching
(b) Switching 2 bits with the time lag
VID<1>
VID<0>
Count STOP
VOUT
About 10µs from switching the last bit
Figure 29. Timing Diagram of Setting the Output Voltage
It is possible to set the output voltage by setting VID<0> to <1> 0 or 1, as shown in the table below.
By default, VID<1:0> terminal is set to (0,0) by the high impedance pull down resistor inside the IC.
By pulling up/down the resistor for about 10kΩ, the default value can be changed.
VID<1>
Diagram 1. Table of Output Voltage Setting
VID<0>
VOUT
0
0
VOUT
0
1
0.9 X VOUT
1
0
1.1 X VOUT
1
1
1.2 X VOUT
(Note )
After 10µs(Max) from the bit change, VOUT starts to change.
Required time for one step (10% shift of VOUT) of VOUT is 10µs(Max).
From bit switching until the output voltage reaches the setting value, a delay of tVID (Max)=0.04ms will occur.
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5. Switching Regulator Efficiency
Efficiency η may be expressed by the equation shown below:
  VOUT  IOUT
VIN I IN
 100 
POUT
POUT
 100 
 100
PIN
POUT  Pd
%
Efficiency may be improved by reducing the switching regulator power dissipation factors Pdα as follows:
Dissipation factors:
(1) ON-Resistance Dissipation of Inductor and FET:Pd(I2R)
 
Pd I 2 R  I OUT 2  RCOIL  RON 
where:
RCOIL is the DC Resistance of inductor.
RON is the ON-Resistance of FET.
IOUT is the Output current.
(2) Gate Charge/Discharge Dissipation:Pd(Gate)
PdGate  Cgs  f  V 2
where:
Cgs is the Gate capacitance of FET.
f is the Switching frequency.
V is the Gate driving voltage of FET.
(3) Switching Dissipation:Pd(SW)
Pd ( SW ) 
V IN 2  C RSS  I OUT  f
I DRIVE
where:
CRSS is the Reverse transfer capacitance of FET.
IDRIVE is the Peak current of gate.
(4) ESR Dissipation of Capacitor:Pd(ESR)
Pd( ESR)  I RMS 2  ESR
where
IRMS is the Ripple current of capacitor.
ESR is the Equivalent series resistance.
(5) Operating Current Dissipation of IC:Pd(IC)
Pd( IC)  VIN  I CC
where:
ICC is the Circuit current.
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6. Consideration on Permissible Dissipation and Heat Generation
Since this IC functions with high efficiency without significant heat generation in most applications, no special
consideration is needed on permissible dissipation or heat generation. In case of extreme conditions, (such as lower
input voltage, higher output voltage, heavier load, and/or higher temperature), the permissible dissipation and/or heat
generation must be carefully considered.
For dissipation, only conduction losses due to DC resistance of inductor and ON-Resistance of FET are considered.
This is because the conduction losses are the most significant among other dissipation mentioned above including gate
charge/discharge dissipation and switching dissipation.
4
① 4 layers (Copper foil area : 5505mm2)
copper foil in each layers.
θj-a=35.1°C/W
② 4 layers (1st and 4th copper foil area : 10.29m2)
(2nd and 3rd copper foil area: 5505m2)
θj-a=56.6°C/W
③ 1 layer (Copper foil area : 10.29m2)
θj-a=178.6°C/W
④ IC only.
θj-a=367.6°C/W
Power dissipation:Pd [W]
①3.56W
3
②2.21W
2
P  I OUT 2  RON
RON  D  RONH  1  D RONL
1
③0.70W
④0.34W
0
0
25
50
75
100105 125
150
Where:
D is the ON duty (=VOUT/VCC).
RONH is the ON-Resistance of Highside MOSFET.
RONL is the ON-Resistance of Lowside MOSFET.
IOUT is the Output current.
Ambient temperature:Ta [°C]
Figure 30. Thermal Derating Curve
(VQFN020V4040)
If VCC=3.3V, VOUT=1.8V, RONH=60mΩ, RONL=55mΩ IOUT=4A
D  VOUT / VCC  1.8 / 3.3  0.545
RON  0.545 0.06  1  0.545  0.55
 0.0327 0.0250
 0.0577 
P  4 2  0.0577  0.2309 W 
Since RONH is greater than RONL in this IC, the dissipation increases as the ON duty time increases. Taking into
consideration the dissipation as shown above, thermal design must be carried out with allowable sufficient margin.
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7. Selection of Components Externally Connected
(1) Selection of Inductor (L)
The inductance significantly affects the output ripple current. As seen
in the equation (1), the ripple current decreases as the inductor
and/or switching frequency increases.
IL
ΔIL
I L 
VCC
VCC  VOUT   VOUT
L  VCC  f
A
・・・(1)
Appropriate ripple current at output should be ±20% of the maximum
output current.
IL
VOUT
L
I L  0.2  I OUTMax
A
・・・(2)
VCC  VOUT  VOUT
H 
・・・(3)
CO
L
I L  VCC  f
where:
ΔIL is the Output ripple current.
f is the Switching frequency.
Figure 31. Output Ripple Current
Note: Current exceeding the current rating of the inductor results in magnetic saturation of the inductor, which
decreases efficiency. The inductor must be selected allowing sufficient margin with which peak current may
not exceed its current rating.
If VCC =5.0V, VOUT=1.2V, f=1MHz, ΔIL=0.2x3A=0.6A, for example, (BD91361MUV)
L
5.0  1.21.2  1.52  2.0
0.6  5  1M
H 
Note: Select an inductor with low resistance (such as DCR and ACR) to minimize inductor dissipation for better
efficiency.
(2) Selection of Output Capacitor (CO)
VCC
Output capacitor should be selected with the consideration on the stability region
and the equivalent series resistance required to minimize ripple voltage.
Output ripple voltage is determined by the equation (4):
VOUT
L
VOUT  I L  ESR
ESR
V 
・・・(4)
where:
ΔIL is the Output ripple current.
ESR is the Equivalent series resistance of output capacitor.
CO
Figure 32. Output Capacitor
Note: Rating of the capacitor should be determined by allowing sufficient margin
against output voltage. A 22µF to 100µF ceramic capacitor is recommended.
Less ESR allows reduction in output ripple voltage.
(3) Selection of Input Capacitor (CIN)
VCC
Input capacitor must be a low ESR capacitor with capacitance sufficient to cope
with high ripple current to prevent high transient voltage.
The ripple current IRMS is given by the equation (5):
CIN
VOUT
L
I RMS  IOUT 
VOUT VCC  VOUT 
VCC
Co
A
・・・(5)
< Worst case > IRMSMax
VCC  2  VOUT , IRMS 
Figure 33. Input Capacitor
IOUT
2
If VCC=3.3V, VOUT=1.8V, and IOUTMax=3A, (BD91361MUV)
I RMS  3 
1.83.3  1.8
3.3
 1.49
ARMS 
A low ESR 22µF/10V ceramic capacitor is recommended to reduce ESR dissipation of input capacitor for better
efficiency.
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(4) Calculating RITH, CITH for Phase Compensation
Since the Current Mode Control is designed to limit a inductor current, a pole (phase lag) appears in the low
frequency area due to a CR filter consisting of a output capacitor and a load resistance, while a zero (phase lead)
appears in the high frequency area due to the output capacitor and its ESR. Therefore, the phases are easily
compensated by adding a zero to the power amplifier output with C and R as described below to cancel a pole at
the power amplifier.
1
fp 
2  RO  CO
fp(Min)
A
f Z ESR 
fp(Max)
Gain
[dB]
0
1
2  ESR CO
fZ(ESR)
IOUTMin
Phase
[deg]
Pole at power amplifier
IOUTMax
When the output current decreases, the load resistance
Ro increases and the pole frequency decreases.
0
-90
fpMin 
Figure 34. Open Loop Gain Characteristics
fpMax 
Hz  with lighterload
1
2  ROMax  CO
Hz  with heavier load
1
2  ROMin  CO
A
fZ(Amp)
Zero at power amplifier
Gain
[dB]
Increasing capacitance of the output capacitor lowers the
pole frequency while zero frequency does not change.
(This is because when the capacitance is doubled, the capacitor
ESR is reduced to half.)
0
0
Phase
[deg]
-90
f Z  Amp  
1
2  RITH  CITH
Figure 35. Error Amp Phase Compensation Characteristics
Rf
VCC
CIN
EN
ADJ
ITH
RITH
PVCC
Cf
VCC
CBST
L
VID<1> VID<0> GND,PGND
SW
VOUT
R2
CITH
VCC
CO
VCC
R2
Figure 36. Typical Application
Stable feedback loop may be achieved by canceling the pole fp(Min) produced by the output capacitor and the load
resistance. This is done by using CR zero correction of the error amplifier.
f Z  Amp   f P Min
1
1


2  RITH  CITH 2  ROMAX  CO
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(5) Setting the Output Voltage
The output voltage VOUT is determined by the equation (6):
L
VOUT  R2 / R1  1VADJ ・・・(6)
6
Where:
VADJ: Voltage at ADJ terminal (0.8V Typ)
1
Output
SW
CO
R2
ADJ
R1
The required output voltage may be determined by adjusting R1 and R2.
Figure 37. Determination of Output Voltage
Adjustable output voltage range: 0.8V to 3.3V
Use 1 kΩ to 100 kΩ resistor for R1. If the resistance is higher than 100 kΩ, carefully check the assembled set for
ripple voltage etc.
3.7
The lower limit of input voltage depends on the output
voltage.
Basically, the recommended operating condition is
Figure 38. shows the necessary output current value at the
lower limit of input voltage. (DCR of inductor : 20mΩ)
This data is the characteristic value, so it’ doesn’t guarantee
the operation range.
Input Voltage : VCC[V]
VCCMin VOUT  1.2V
3.5
VO=2.5V
3.3
VO=2.0V
3.1
VO=1.8V
2.9
2.7
0
1
2
3
Output Current : IOUT[A]
Figure 38. Minimum Input Voltage in Each Output Voltage
8. BD91361MUV Cautions on PC Board Layout
Figure 39. Layout Diagram
(1) Layout the input ceramic capacitor CIN as close as possible to the PVCC and PGND pins, and the output capacitor
CO as close as possible to the PGND pin.
(2) Layout CITH and RITH between the pins ITH and GND as near as possible with the shortest possible trace.
Note: VQFN020V4040 (BD91361MUV) has thermal PAD on the reverse of the package.
The package thermal performance may be enhanced by bonding the PAD to GND plane which occupies a large
area of the PCB.
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9. Recommended Components Lists on above Application
Symbol
Value
Manufacturer
Coil
2.0µH
Sumida
CDR6D28MNNP-2R0NC
CIN
Ceramic capacitor
22µF
Murata
GRM32EB11A226KE20
CO
Ceramic capacitor
22µF
Murata
GRM31CB30J226KE18
CITH
Ceramic capacitor
1000pF
Murata
GRM18 Series
6.8kΩ
Rohm
MCR03 Series
1000 pF
Murata
GRM18 Series
10Ω
Rohm
MCR03 Series
0.1µF
Murata
GRM18 Series
L
Part
Series
VOUT=1.2V
RITH
Resistance
Cf
Ceramic capacitor
Rf
Resistance
CBST
Ceramic capacitor
Note: The parts list presented above is an example of recommended parts. Although the parts are standard, actual circuit
characteristics should be carefully checked on your application before use. Be sure to allow a sufficient margin to
accommodate variations between external devices and this IC when employing the depicted circuit with other circuit
constants modified. Both static and transient characteristics should also be considered in establishing these margins.
When switching noise is significant and may affect the system, a low pass filter should be inserted between the VCC and
PVCC pins, and a schottky barrier diode or snubber established between the SW and PGND pins.
I/O Equivalent Circuit
・EN pin
・SW pin
PVCC
PVCC
PVCC
EN
SW
・ADJ pin
・ITH pin
VCC
ADJ
ITH
・BST pin
・VID pin ( VID<0>, VID<1> are the same composition
PVCC
PVCC
BST
VID
SW
Figure 40. I/O Equivalent Circuit
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Operational Notes
1.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power
supply pins.
2.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the
digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog
block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and
aging on the capacitance value when using electrolytic capacitors.
3.
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5.
Thermal Consideration
Should by any chance the power dissipation rating be exceeded the rise in temperature of the chip may result in
deterioration of the properties of the chip. In case of exceeding this absolute maximum rating, increase the board size
and copper area to prevent exceeding the Pd rating.
6.
Recommended Operating Conditions
These conditions represent a range within which the expected characteristics of the IC can be approximately
obtained. The electrical characteristics are guaranteed under the conditions of each parameter.
7.
Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush
current may flow instantaneously due to the internal powering sequence and delays, especially if the IC
has more than one power supply. Therefore, give special consideration to power coupling capacitance,
power wiring, width of ground wiring, and routing of connections.
8.
Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
9.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may
subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply
should always be turned off completely before connecting or removing it from the test setup during the inspection
process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during
transport and storage.
10. Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment)
and unintentional solder bridge deposited in between pins during assembly to name a few.
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Operational Notes – continued
11. Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and
cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the
power supply or ground line.
12. Regarding the Input Pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should
be avoided.
Resistor
Transistor (NPN)
Pin A
Pin B
C
E
Pin A
N
P+
P
N
N
P+
N
Pin B
B
Parasitic
Elements
N
P+
N P
N
P+
B
N
C
E
Parasitic
Elements
P Substrate
P Substrate
GND
GND
Parasitic
Elements
GND
Parasitic
Elements
GND
N Region
close-by
Figure 41. Example of monolithic IC structure
13. Thermal Shutdown Circuit(TSD)
This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always
be within the IC’s power dissipation rating. If however the rating is exceeded for a continued period, the junction
temperature (Tj) will rise which will activate the TSD circuit that will turn OFF all output pins. When the Tj falls below
the TSD threshold, the circuits are automatically restored to normal operation.
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from
heat damage.
14. Selection of Inductor
It is recommended to use an inductor with a series resistance element (DCR) 0.1Ω or less. Especially, note that use
of a high DCR inductor will cause an inductor loss, resulting in decreased output voltage. Should this condition
continue for a specified period (soft start time + timer latch time), output short circuit protection will be activated and
output will be latched OFF. When using an inductor over 0.1Ω, be careful to ensure adequate margins for variation
between external devices and this IC, including transient as well as static characteristics. Furthermore, in any case, it
is recommended to start up the output with EN after supply voltage is within.
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Datasheet
Ordering Information
B
D
9
1
3
Part Number
6
1
Type
Adjustable
(0.8V to 3.3V)
M
U
V
Package
MUV : VQFN020V4040
E2
Packaging and forming specification
E2: Embossed tape and reel
Marking Diagram
VQFN020V4040 (TOP VIEW)
Part Number Marking
D 9 1 3 6
LOT Number
1
1PIN MARK
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Datasheet
Physical Dimension, Tape and Reel Information
Package Name
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Revision History
Date
Revision
02.Mar.2012
06.Oct.2014
001
002
Changes
New Release
Applied the ROHM Standard Style and improved understandability.
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Notice
Precaution on using ROHM Products
1.
Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
(Note 1)
intend to use our Products in devices requiring extremely high reliability (such as medical equipment
, transport
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual
ambient temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice – GE
© 2014 ROHM Co., Ltd. All rights reserved.
Rev.003
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
QR code printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since our Products might fall under controlled goods prescribed by the applicable foreign exchange and foreign trade act,
please consult with ROHM representative in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data. ROHM shall not be in any way responsible or liable
for infringement of any intellectual property rights or other damages arising from use of such information or data.:
2.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the information contained in this document.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice – GE
© 2014 ROHM Co., Ltd. All rights reserved.
Rev.003
Datasheet
General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3.
The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or
concerning such information.
Notice – WE
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Datasheet
BD91361MUV - Web Page
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Distribution Inventory
Part Number
Package
Unit Quantity
Minimum Package Quantity
Packing Type
Constitution Materials List
RoHS
BD91361MUV
VQFN020V4040
2500
2500
Taping
inquiry
Yes
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