ON FAN6604MLMX Highly integrated green-mode pwm controller Datasheet

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FAN6604
Highly Integrated Green-Mode PWM Controller
Features
Description





High-Voltage Startup
The highly integrated FAN6604 PWM controller
provides several features to enhance the performance
of flyback converters. To minimize standby power
consumption, a proprietary Green-Mode function
provides off-time modulation to continuously decrease
the switching frequency under light-load conditions.












Frequency Hopping to Reduce EMI Emission


SENSE Short-Circuit Protection (SSCP)
AC Input Brownout Protection with Hysteresis
Line Compensation by Current Limit
Low Operating Current: 1.5 mA
Linearly Decreasing PWM Frequency to 22 kHz
with Cycle Skipping
Under zero-load and very light-load conditions,
FAN6604 saves PWM pulses by entering "deep" Burst
Mode. Burst Mode enables the power supply to meet
international power conservation requirements.
Fixed PWM Frequency: 65 kHz
FAN6604 also integrates a frequency-hopping function
that helps reduce EMI emission of a power supply with
minimum line filters. The built-in synchronized slope
compensation helps achieve stable peak-current
control. Add in current limit to keep constant output
power over universal AC input range. The gate output is
clamped at 13 V to protect the external MOSFET from
over-voltage damage.
Peak-Current-Mode Control
Cycle-by-Cycle Current Limiting
Leading-Edge Blanking (LEB)
Internal Open-Loop Protection
GATE Output Maximum Voltage Clamp: 13 V
VDD Under-Voltage Lockout (UVLO)
FAN6604 — Highly Integrated Green-Mode PWM Controller
January 2015
Other protection functions include AC input brownout
protection with hysteresis, sense pin short-circuit
protection, and VDD over-voltage protection. For overtemperature protection, an external NTC thermistor can
be applied to sense the external switcher’s temperature.
When VDD OVP or OTP are activated, an internal latch
circuit is used to latch-off the controller. The Latch Mode
is reset when the VDD supply is removed.
VDD Over-Voltage Protection (OVP)
Programmable Over-Temperature Protection (OTP)
Internal Latch Circuit (OVP, OTP)
Open-Loop Protection (OLP); Restart for
FAN6604MRMX, Latch for FAN6604MLMX
FAN6604 is available in an 8-pin SOP package.
Built-in 8 ms Soft-Start Function
Applications
General-purpose switch-mode power supplies (SMPS)
and flyback power converters, including:

Power Adapters
Ordering Information
Part Number
FAN6604MRMX
FAN6604MLMX
Operating
Temperature Range
Package
Packing Method
-40 to +105°C
8-Pin, Small Outline Package (SOP)
Tape & Reel
© 2014 Fairchild Semiconductor Corporation
FAN6604 • Rev. 1.1
1
www.fairchildsemi.com
FAN6604 — Highly Integrated Green-Mode PWM Controller
Application Diagram
N
EMI
Filter
Vo+
+
+
L
Vo+
+
7
VDD
4
HV
3
NC
2
FB
GATE 8
SENSE 6
GND
RT 5
1
FAN6604
Figure 1. Typical Application
Internal Block Diagram
HV
NC
4
3
OVP
OTP
OLP for ML
Line Voltage
Sample Circuit
Latch
Protection
SSCP
Re-Start
Protection
OLP for MR
Brownout Protection
Soft
Driver
VPWM
VDD
Cycle
Skipping
Internal
BIAS
7
UVLO
S
Q
SSCP
R
SSCP
Delay
VRESET
OSC
Soft-Start
Comparator
17V/10V
Pattern
Generator
8
GATE
6
SENSE
0.05V
SSCP
Comparator
Soft-Start
Circuit
Blanking
Current Limit
Comparator
VRESET
VLimit
Debounce
OVP
Green
Mode
VDD-OVP
PWM
Comparator
5V
Max.
Duty
IRT
RT
5
Slope
Compensation
3R
VPWM
2
tD-OTP1
OTP
Counter
OLP
1.05V
OLP
Delay
tD-OTP2
Counter
OLP
Comparator
0.7V
FB
R
4.6V
1
GND
Figure 2. Functional Block Diagram
© 2014 Fairchild Semiconductor Corporation
FAN6604 • Rev. 1.1
www.fairchildsemi.com
2
ZXYTT
6604MR
TM
F - Fairchild Logo
Z - Plant Code
X - 1-Digit Year Code
Y - 1-Digit Week Code
TT - 2-Digit Die Run Code
T - Package Type (M=SOP)
M - Manufacture Flow Code
ZXYTT
6604ML
TM
Figure 3. Top Mark
Pin Configuration
SOP-8
GND
1
8
GATE
FB
2
7
VDD
NC
3
6
SENSE
HV
4
5
RT
Figure 4. Pin Configuration (Top View)
Pin Definitions
Pin #
Name
1
GND
Description
Ground. This pin is used for the ground potential of all the pins. A 0.1 µF decoupling capacitor
placed between VDD and GND is recommended.
2
FB
Feedback. The output voltage feedback information from the external compensation circuit is fed
into this pin. The PWM duty cycle is determined by this pin and the current-sense signal from Pin
6. FAN6604 performs open-loop protection (OLP); if the FB voltage is higher than a threshold
voltage (around 4.6 V) for more than 56 ms, the controller latches off the PWM.
3
NC
No Connection
4
HV
High-Voltage Startup. This pin is connected to the line input via a 1N4007 and 200 k resistor
to achieve brownout. Once the voltage on the HV pin is lower than the brownout voltage, PWM
output turns off.
5
RT
Over-Temperature Protection. An external NTC thermistor is connected from this pin to GND.
The impedance of the NTC decreases at high temperatures. Once the voltage on the RT pin
drops below the threshold voltage, the controller latches off the PWM. If RT pin is not connected
to an NTC resistor for Over-Temperature Protection, a 100 k resistor is recommend to connect
the RT pin to the GND pin. This pin is limited by an internal clamping circuit.
6
SENSE
7
VDD
Supply Voltage. IC operating current and MOSFET driving current are supplied using this pin.
This pin is connected to an external bulk capacitor of typically 47 µF. The threshold voltages for
turn-on and turn-off are 17 V and 10 V, respectively. The operating current is lower than 2 mA.
8
GATE
Gate Drive Output. The totem-pole output driver for the power MOSFET. It is internally clamped
below 13 V.
Current Sense. This pin is used to sense the MOSFET current for the current-mode PWM and
current limiting. To achieve high/low line compensation, current limit is built-in.
© 2014 Fairchild Semiconductor Corporation
FAN6604 • Rev. 1.1
www.fairchildsemi.com
3
FAN6604 — Highly Integrated Green-Mode PWM Controller
Marking Information
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Parameter
Min.
(1,2)
Max.
Unit
30
V
VVDD
DC Supply Voltage
VFB
FB Pin Input Voltage
-0.3
6.0
V
SENSE Pin Input Voltage
-0.3
6.0
V
VRT
RT Pin Input Voltage
-0.3
6.0
V
VHV
HV Pin Input Voltage
500
V
PD
Power Dissipation (TA<50°C)
400
mW
JA
Thermal Resistance (Junction-to-Air)
150
C/W
TJ
Operating Junction Temperature
-40
+125
C
Storage Temperature Range
-55
+150
C
+260
C
VSENSE
TSTG
TL
ESD
Lead Temperature (Wave Soldering or IR, 10 Seconds)
Human Body Model;
Electrostatic Discharge Capability, JESD22-A114
All Pins Except HV Pin
Charged Device Model;
JESD22-C101
5000
V
2000
Notes:
1. All voltage values, except differential voltages, are given with respect to the network ground terminal.
2. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device.
3. ESD with HV pin: CDM=1000 V and HBM=1000 V.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
RHV
Parameter
HV Startup Resistor
© 2014 Fairchild Semiconductor Corporation
FAN6604 • Rev. 1.1
Min.
Typ.
Max.
Unit
150
200
250
k
www.fairchildsemi.com
4
FAN6604 — Highly Integrated Green-Mode PWM Controller
Absolute Maximum Ratings
VDD=11~24 V and TA=-40~105C unless otherwise noted.
Symbol
Parameter
Condition
Min.
Typ.
Max.
Unit
24
V
17
18
V
VDD Section
VOP
Continuously Operating Voltage
VDD-ON
Start Threshold Voltage
16
VDD-OFF
Minimum Operating Voltage
9
10
11
V
VDD-OLP
IDD-OLP Off Voltage
5
6.5
8
V
VDD-LH
Threshold Voltage on VDD Pin for
Latch-Off Release Voltage
3.5
4.0
4.5
V
VDD-AC
Threshold Voltage on VDD Pin for
Disable AC Recovery to Avoid
Startup Failed
VDD-OFF
+2.8
VDD-OFF
+3.3
VDD-OFF
+3.8
V
IDD-ST
Startup Current
VDD-ON – 0.16 V
30
µA
IDD-OP1
Operating Supply Current,
PWM Operation
VDD=20 V, FB=3 V Gate
Open
1.5
2.0
mA
IDD-OP2
Operating Supply Current,
Gate Stop
VDD=20 V, FB=3 V
1.0
1.5
mA
Operating Current at PWM-Off
Phase Under Latch-Off
Conduction
VDD=5 V
30
60
90
µA
ILH
IDD-OLP
Internal Sink Current Under LatchVDD-OLP+0.1 V, TA=25C
Off Conduction
150
180
210
µA
VDD-OVP
VDD Over-Voltage Protection
24
25
26
V
tD-VDDOVP
VDD Over-Voltage Protection
Debounce Time
90
180
270
µs
2.0
3.5
5.0
mA
1
20
µA
HV Section
Supply Current from HV Pin
VAC=90 V (VDC=120 V),
VDD=0 V, TA=25C
Leakage Current after Startup
HV=500 V,
VDD=VDD-OFF+1 V
VAC-OFF
Brownout Threshold
DC Source Series
R=200 k to HV Pin
See Equation (1)
92
102
112
V
VAC-ON
Brown-In Threshold
DC Source Series
R=200 kΩ to HV Pin
See Equation (2)
104
114
124
V
VAC-ON - VAC-OFF
DC Source Series
R=200 kΩ to HV Pin
6
12
18
V
IHV
IHV-LC
VAC
tS-CYCLE
tH-TIME
tD-AC-OFF
(4)
Line Voltage Sample Cycle
FB > VFB-N
220
FB < VFB-G
650
(4)
Line Voltage Hold Period
PWM Turn-off Debounce Time
µs
20
µs
FB > VFB-N
58
70
82
ms
FB < VFB-G
150
200
250
ms
Note:
4. Guaranteed by design.
Continued on the following page…
© 2014 Fairchild Semiconductor Corporation
FAN6604 • Rev. 1.1
www.fairchildsemi.com
5
FAN6604 — Highly Integrated Green-Mode PWM Controller
Electrical Characteristics
FAN6604 — Highly Integrated Green-Mode PWM Controller
N
EMI
Filter
+
L
IHV
D1
+
VIN
-
RHV
Startup
Circuit
HV
Brownout
Circuit
VDD
Brownout
Detection
Figure 5. Brownout Circuit
VIN-ON
VIN-OFF
VIN
Gate
Gate start
Brownout debounce time
Gate stop
Figure 6. Brownout Behavior
VDD-AC
VDD-ON
VDD-ON
VDD-OFF
VDD-AC
VDD-OFF
VDD
VDD
AC Recovery Level
AC Recovery Level
VHV
VHV
GATE
GATE
VDD > VDD-AC AC Recovery
VDD < VDD-AC AC Recovery
Figure 7. VDD-AC and AC Recovery
© 2014 Fairchild Semiconductor Corporation
FAN6604 • Rev. 1.1
www.fairchildsemi.com
6
VDD=11~24 V and TA=-40~105C unless otherwise noted.
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
61
65
69
±3.7
±4.2
±4.7
12.0
13.5
15.0
ms
19
22
25
kHz
Oscillator Section
fOSC
Frequency in Normal Mode
tHOP
Hopping Period
fOSC-G
Center Frequency,
TA=25C
Hopping Range
Green-Mode Frequency
kHz
fDV
Frequency Variation vs. VDD Deviation
VDD=11 V to 22 V
5
%
fDT
Frequency Variation vs. Temperature Deviation TA=-40 to +105C
5
%
1/3.5
V/V
Feedback Input Section
AV
Input Voltage to Current-Sense Attenuation
ZFB
Input Impedance
VFB-OPEN
Output High Voltage
VFB-OLP
1/4.5
FB Pin Open
1/4.0
13
15
17
kΩ
4.8
5.0
5.2
V
FB Open-Loop Trigger Level
4.3
4.6
4.9
V
tD-OLP
Delay Time of FB Pin Open-Loop Protection
50
57
64
ms
VFB-N
Green-Mode Entry FB Voltage
Pin, FB Voltage
(FB =VFB-N), TA=25C
2.6
2.8
3.0
V
Hopping Range
±3.7
±4.2
±4.7
kHz
2.1
2.3
2.5
V
±1.27
±1.45
±1.62
kHz
(VFB-N+VFB-G)/2
2.35
2.55
2.75
V
180
200
220
ms
VFB-G
Pin, FB Voltage
(FB =VFB-G)
Green-Mode Ending FB Voltage
Hopping Range
VFB-SKIP
tSKIP-N
tSKIP-G
FB Threshold Voltage for Cycle Skipping
(5)
Period Divide
(5)
Cycle Skipping Period
(5)
VFB-SKIP < VFB < VFB-N
Cycle Skipping Period
(5)
VFB-G < VFB < VFB-SKIP
90
100
110
ms
VFB-ZDCR
FB Threshold Voltage for Zero-Duty Recovery
1.9
2.1
2.3
V
VFB-ZDC
FB Threshold Voltage for Zero-Duty
1.8
2.0
2.2
V
Note:
5. Guaranteed by design.
Continued on the following page…
PWM Frequency
with cycle skipping
fOSC
fOSC-G
VFB- ZDC VFB- ZDCR VFB-G VFB-SKIP
VFB-N
VFB
Figure 8. VFB vs. PWM Frequency
© 2014 Fairchild Semiconductor Corporation
FAN6604 • Rev. 1.1
www.fairchildsemi.com
7
FAN6604 — Highly Integrated Green-Mode PWM Controller
Electrical Characteristics (Continued)
VDD=11~24 V and TA=-40~105C unless otherwise noted.
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
Current-Sense Section
tPD
Delay to Output
tLEB
Leading-Edge Blanking Time
100
250
ns
210
260
310
ns
VSTHFL
Flat Threshold Voltage for Current Limit
Duty>62%, FB > VFB-N
0.46
0.50
0.54
V
VSTHVA
Valley Threshold Voltage for Current
Limit
Duty=0%
0.31
0.34
0.37
V
VSSCP
Threshold Voltage for Sense Short-Circuit Protection
0.03
0.05
0.07
V
tON-SSCP
On Time for VSSCP Checking
3.85
4.40
4.95
µs
tD-SSCP
Delay for Sense Short-Circuit Protection
VSENSE<0.05 V
60
120
180
µs
Soft-Start Time
Startup Time
5.5
7.5
9.5
ms
75.0
82.5
90.0
%
1.5
V
tSS
GATE Section
DCYMAX
Maximum Duty Cycle
VGATE-L
Gate Low Voltage
VGATE-H
Gate High Voltage
IGATE-SINK Gate Sink Current
IGATESOURCE
VDD=15 V, IO=50 mA
Gate Source Current
8
V
VDD=15 V
300
mA
VDD=15 V, GATE=6 V
250
mA
VDD=12 V, IO=50 mA
(5)
(5)
tr
Gate Rising Time
VDD=15 V, CL=1 nF
100
ns
tf
Gate Falling Time
VDD=15 V, CL=1 nF
50
ns
Gate Output Clamping Voltage
VDD=22 V
VGATECLAMP
9
13
17
V
µA
RT Section
IRT
VRTTH1
VRTTH2
Output Current from RT Pin
Over-Temperature Protection Threshold
Voltage
tD-OTP1
Over-Temperature Latch-Off Debounce
tD-OTP2
92
100
108
0.7 V < VRT < 1.05 V, after
12 ms Latch Off
1.000
1.035
1.070
VRT < 0.7 V, After 100 µs
Latch Off
0.65
0.70
0.75
VRTTH2 < VRT < VRTTH1
FB > VFB-N
12
16
20
VRTTH2 < VRT < VRTTH1
FB < VFB-G
35.5
46.5
57.5
VRT< VRTTH2, FB > VFB-N
110
185
260
VRT< VRTTH2, FB < VFB-G
215
500
785
V
ms
µs
Note:
6. Guaranteed by design.
© 2014 Fairchild Semiconductor Corporation
FAN6604 • Rev. 1.1
www.fairchildsemi.com
8
FAN6604 — Highly Integrated Green-Mode PWM Controller
Electrical Characteristics (Continued)
Figure 10.
Figure 9. Startup Current (IDD-ST) vs. Temperature
Figure 11. Start Threshold Voltage (VDD-ON)
vs. Temperature
Figure 13.
Figure 12. Minimum Operating Voltage (VDD-OFF)
vs. Temperature
Supply Current Drawn from HV Pin (IHV)
vs. Temperature
Figure 14.
Figure 15. Frequency in Normal Mode (fOSC)
vs. Temperature
© 2014 Fairchild Semiconductor Corporation
FAN6604 • Rev. 1.1
Operation Supply Current (IDD-OP1)
vs. Temperature
HV Pin Leakage Current After Startup
(IHV-LC) vs. Temperature
Figure 16.
Maximum Duty Cycle (DCYMAX)
vs. Temperature
www.fairchildsemi.com
9
FAN6604 — Highly Integrated Green-Mode PWM Controller
Typical Performance Characteristics
Figure 17. FB Open-Loop Trigger Level (VFB-OLP)
vs. Temperature
Figure 18. Delay Time of FB Pin Open-Loop
Protection (tD-OLP) vs. Temperature
Figure 19. VDD Over-Voltage Protection (VDD-OVP)
vs. Temperature
Figure 20. Output Current from RT Pin (IRT)
vs. Temperature
Figure 21. Over-Temperature Protection Threshold
Voltage (VRTTH1) vs. Temperature
Figure 22. Over-Temperature Protection Threshold
Voltage (VRTTH2) vs. Temperature
Figure 23. Brown-In (VAC-ON) vs. Temperature
Figure 24. Brownout (VAC-OFF) vs. Temperature
© 2014 Fairchild Semiconductor Corporation
FAN6604 • Rev. 1.1
www.fairchildsemi.com
10
FAN6604 — Highly Integrated Green-Mode PWM Controller
Typical Performance Characteristics (Continued)
Startup Current
Gate Output / Soft Driving
For startup, the HV pin is connected to the line input
through an external diode and resistor; R HV, (1N4007 /
200 kΩ recommended). Peak startup current drawn
from the HV pin is (VAC × 2 ) / RHV and charges the
hold-up capacitor through the diode and resistor.
When the VDD capacitor level reaches V DD-ON, the
startup current switches off. At this moment, the V DD
capacitor only supplies the FAN6604 to keep the V DD
until the auxiliary winding of the main transformer
provides the operating current.
The BiCMOS output stage is a fast totem-pole gate
driver. Cross conduction has been avoided to minimize
heat dissipation, increase efficiency, and enhance
reliability. The output driver is clamped by an internal
13 V Zener diode to protect power MOSFET transistors
against undesirable gate over voltage. A soft driving
waveform is implemented to minimize EMI.
Soft-Start
For many applications, it is necessary to minimize the
inrush current at startup. The built-in 8 ms soft-start
circuit significantly reduces the startup current spike and
output voltage overshoot.
Operating Current
Operating current is around 1.5 mA. The low operating
current enables better efficiency and reduces the
requirement of VDD hold-up capacitance.
Slope Compensation
The sensed voltage across the current-sense resistor is
used for peak-current-mode control and cycle-by-cycle
current limiting. Built-in slope compensation improves
stability and prevents sub-harmonic oscillation.
FAN6604 inserts a synchronized, positive-going, ramp
at every switching cycle.
Green-Mode Operation
The proprietary Green-Mode function provides off-time
modulation to reduce the switching frequency in lightload and no-load conditions. VFB, which is derived from
the voltage feedback loop, is taken as the reference.
Once VFB is lower than the threshold voltage (VFB-N), the
switching frequency is continuously decreased to the
minimum Green-Mode frequency of around 22 kHz with
cycle skipping.
Constant Output Power Limit
When the SENSE voltage across sense resistor RSENSE
reaches the threshold voltage, the output GATE drive is
turned off after a small delay, tPD. This delay introduces
an additional current proportional to tPD • VIN / LP. Since
the delay is nearly constant, regardless of the input
voltage VIN, higher input voltage results in larger
additional power. Therefore, the maximum output power
at high line is higher than that of low line. To
compensate this variation for a wide AC input range, a
current limit uses to solve the unequal power-limit
problem. The power limiter is fed to the inverting input of
the current limiting comparator. This results in a lower
current limit at high-line inputs than at low-line inputs.
Current Sensing / PWM Current Limiting
Peak-current-mode control is utilized to regulate output
voltage and provide pulse-by-pulse current limiting. The
switch current is detected by a sense resistor into the
SENSE pin. The PWM duty cycle is determined by this
current-sense signal and VFB, the feedback voltage.
When the voltage on the SENSE pin reaches around
VCOMP = (VFB–0.6)/4, the switch cycle is terminated
immediately.
Leading-Edge Blanking (LEB)
Brownout by the HV Pin
Each time the power MOSFET is switched on, a turn-on
spike occurs on the sense-resistor. To avoid premature
termination of the switching pulse, a leading-edge
blanking time is built in. During this blanking period, the
current-limit comparator is disabled and cannot switch
off the gate driver.
Unlike previous PWM controllers, the FAN6604 HV pin
can detect the AC line voltage to perform brownout
protection. Using a fast diode and startup resistor to
sample the AC line voltage, the peak value refreshes
and is stored in a register at each sampling cycle. When
internal update time is met, this peak value is used for
brownout and current-limit level judgment. Equation (1)
and (2) calculate the level of brown-in or brownout
converted to RMS value. For power saving, FAN6604
enlarges the sampling cycle to lower the power loss
from HV sampling at light-load condition.
Under-Voltage Lockout (UVLO)
The turn-on and turn-off thresholds are fixed internally at
17 V and 10 V, respectively. During startup, the hold-up
capacitor must be charged to 17 V through the startup
resistor to enable the IC. The hold-up capacitor
continues to supply VDD until the energy can be
delivered from auxiliary winding of the main transformer.
VDD must not drop below 10 V during startup. This
UVLO hysteresis window ensures that hold-up capacitor
is adequate to supply VDD during startup.
© 2014 Fairchild Semiconductor Corporation
FAN6604 • Rev. 1.1
VAC - ON (RMS)  ( 0.9V 
(RHV  1.6)
)/ 2
1.6
(1)
VAC - OFF (RMS)  ( 0.81V 
(RHV  1.6)
)/ 2
1.6
(2)
where RHV is in k.
www.fairchildsemi.com
11
FAN6604 — Highly Integrated Green-Mode PWM Controller
Functional Description
VDD over-voltage protection prevents damage due to
abnormal conditions. If the VDD voltage exceeds the
over-voltage protection level (VDD-OVP) and lasts for
tD-VDDOVP, the PWM pulses are disabled and VDD begins
to drop. As VDD drops to VDD-OLP, the internal HV startup
circuit is activated and VDD is charged to VDD-ON to
restart IC. Over-voltage conditions are usually caused
by open feedback loops.
Limited Power Control
The FB voltage is pulled HIGH once the power supply
cannot sustain the output load, such as during outputshort or overload conditions. If the FB voltage remains
higher than a built-in threshold for longer than tD-OLP,
PWM output is turned off. As PWM output is turned off,
VDD begins decreasing. When VDD goes below the turnoff threshold (10 V) the controller is totally shut down
and VDD is continuously discharged to VDD-OLP (6.5 V) by
IDD-OLP to lower the average input power. This is called
two-level UVLO. VDD is cycled again. This protection
feature continues as long as the overloading condition
persists. This prevents the power supply from
overheating due to overloading conditions.
Sense-Pin Short-Circuit Protection
The FAN6604 provides safety protection for Limited
Power Source (LPS) tests. When the sense resistor is
shorted by soldering during production, the pulse-bypulse current limiting loses efficiency for the purpose of
providing over-power protection for the unit. The unit
may be damaged when the loading is larger than the
maximum load. To protect against a short circuit across
the current-sense resistor, the controller is designed to
immediately shut down if a continuously low voltage
(around 0.05 V/120 µs) on the SENSE pin is detected.
Noise Immunity
Noise on the current sense or control signal may cause
significant pulse-width jitter, particularly in continuousconduction mode. Slope compensation helps alleviate
this problem. Good placement and layout practices
should be followed. Avoiding long PCB traces and
component leads, locating compensation and filter
components near the FAN6604, and increasing the
power MOS gate resistance improve performance.
Thermal Protection
An NTC thermistor, RNTC, in series with resistor RA, can
be connected from the RT pin to ground. A constant
current, IRT, is output from the RT pin. The voltage on
the RT pin can be expressed as VRT=IRT • (RNTC + RPTC),
where IRT is 100 µA. At high ambient temperature, the
RNTC is smaller and so that VRT decreased. When VRT is
less than 1.035 V (VRTTH1), the PWM turns off after
16 ms (tD-OTP1). If VRT is less than 0.7 V (VRTTH2), the
PWM turns off after 185 µs (tD-OTP2). If the RT pin is not
© 2014 Fairchild Semiconductor Corporation
FAN6604 • Rev. 1.1
resistor for over-temperature
a series one 100 kΩ resistor to
from noise interference is
pin is limited by an internal
www.fairchildsemi.com
12
FAN6604 — Highly Integrated Green-Mode PWM Controller
connected to NTC
protection, connecting
ground to prevent
recommended. This
clamping circuit.
VDD Over-Voltage Protection (OVP)
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