TI BQ25071DQCT Bq25071 1-a, single-input, single-cell lifepo4 linear battery charger with 50 ma ldo Datasheet

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bq25071
SLUSBK6 – JULY 2014
bq25071 1-A, Single-Input, Single-Cell LiFePO4 Linear Battery Charger with 50 mA LDO
1 Features
3 Description
•
•
The bq25071 is a highly integrated, linear, LiFePO4
battery charger targeted at space-limited portable
applications. It accepts power from either a USB port
or AC adapter and charges a single-cell LiFePO4
battery with up to 1 A of charge current. The 30 V
input rating with 10.5 V input overvoltage protection
supports low-cost unregulated adapters.
1
•
•
•
•
•
•
•
Single Cell LiFePO4 Charging Algorithm
30V Input Rating, With 10.5 V Overvoltage
Protection (OVP)
50mA Integrated Low Dropout Linear Regulator
(LDO)
Programmable Charge Current Through ISET and
EN Terminals
7% Charge Current Regulation Accuracy
Thermal Regulation and Protection
Soft-Start Feature to Reduce Inrush Current
Battery NTC Monitoring
Charging Status Indication
The bq25071 has a single power output that
simultaneously charges the battery and powers the
system. The input current is programmable from 100
mA up to 1 A using the ISET input or configurable for
USB500. There is also a 4.9 V ±10% 50 mA LDO
integrated into the IC for supplying low power
external circuitry.
The LiFePO4 charging algorithm removes the current
taper typically seen as part of the constant voltage
mode control used in Li-Ion battery charge cycles
which reduces charge time significantly. Instead, the
battery is fast charged to the overcharge voltage and
then allowed to relax to a lower float charge voltage
threshold. The charger integrates the power stage
with the charge current and voltage sense to achieve
a high level of accuracy in the current and voltage
regulation loops. An internal control loop monitors the
IC junction temperature through the charge cycle and
reduces the charge current if an internal temperature
threshold is exceeded.
2 Applications
•
•
•
•
Smart Phones
Mobile Phones
Portable Media Players
Low Power Handheld Devices
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
bq25071
WSON (10)
2.00mm x 3.00mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
4 Application Schematic
Pull-Up
bq25071
STATUS
USB or TA
CHG
VBUS
GND
IN
VDD
OUT
D+
D-
ABB
EN
BAT
PACK+
TS
TEMP
ISET
PACK-
GND
LDO
PWRPD
VCHG DET
USB DET
VUSBIN
ACDET
GPIO
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
bq25071
SLUSBK6 – JULY 2014
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Table of Contents
1
2
3
4
5
6
7
8
9
Features ..................................................................
Applications ...........................................................
Description .............................................................
Application Schematic ..........................................
Revision History.....................................................
Device Comparison Table.....................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
1
2
3
3
4
8.1
8.2
8.3
8.4
8.5
8.6
8.7
4
4
4
4
5
6
7
Absolute Maximum Ratings .....................................
Handling Ratings.......................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Timing Requirements ................................................
Typical Characteristics ..............................................
9.1
9.2
9.3
9.4
Overview ................................................................... 8
Functional Block Diagram ......................................... 9
Feature Description................................................. 10
Device Functional Modes........................................ 12
10 Application and Implementation........................ 14
10.1 Application Information.......................................... 14
10.2 Typical Application ............................................... 14
11 Power Supply Recommendations ..................... 17
12 Layout................................................................... 17
12.1 Layout Guidelines ................................................. 17
12.2 Layout Example .................................................... 17
13 Device and Documentation Support ................. 19
13.1 Trademarks ........................................................... 19
13.2 Electrostatic Discharge Caution ............................ 19
13.3 Glossary ................................................................ 19
14 Mechanical, Packaging, and Orderable
Information ........................................................... 19
Detailed Description .............................................. 8
5 Revision History
2
DATE
REVISION
NOTES
July 2014
*
Initial release.
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6 Device Comparison Table
PART NUMBER
VBAT(OVCH)
VBAT(FLOAT)
V(OVP)
V(LDO)
bq25071DQCR
3.7 V
3.5 V
10.5 V
4.9 V
bq25071DQCT
3.7 V
3.5 V
10.5 V
4.9 V
7 Pin Configuration and Functions
bq25071
(TOP VIEW)
IN
1
10
OUT
2
9
GND
GND
3
8
CHG
LDO
4
7
EN
TS
5
6
BAT
ISET
10 -pin 2mm x 3mm DFN
Pin Functions
PIN
NAME
NO.
I/O
DESCRIPTION
IN
1
I
Input power supply. IN is connected to the external DC supply (AC adapter or USB port). Bypass IN to GND
with at least a 0.1 μF ceramic capacitor.
ISET
2
O
Input current programming bias pin. Connect a resistor from ISET to GND to program the input current limit
when the user programmable mode is selected by grounding the EN pin. The resistor range is between 1 kΩ
and 10 kΩ to set the current between 100 mA and 1 A.
GND
3, 9
–
Ground pin. Connect to the thermal pad and the ground plane of the circuit.
LDO
4
O
LDO output. LDO is regulated to 4.9V and drives up to 50 mA. Bypass LDO to GND with a 0.1 μF ceramic
capacitor. LDO is enabled when V(UVLO) < VIN < V(OVP).
TS
5
I
Battery pack NTC monitoring input. Connect a resistor divider from LDO to GND with TS connected to the
center tap to set the charge temperature window. The battery pack NTC is connected in parallel with the
bottom resistor of the divider. See the Detailed Design Procedure section for details on the selecting the
proper component values.
BAT
6
I
BAT is the sense input for the battery voltage. Connect BAT and OUT to the battery.
EN
7
I
Enable input. Drive EN high to disable the IC. Connect EN to GND to place the bq25071 in the user
programmable mode using the ISET input where the input current is programmed. Leave EN floating to place
the bq25071 in USB500 mode. See the Input Current Limit Control (EN) section for details on using the EN
interface.
CHG
8
O
Charge status indicator open-drain output. CHG is pulled low while the device is charging the battery. CHG
goes high impedance when the battery is fully charged.
OUT
10
O
System output connection. Bypass the OUT to GND with a 1 μF ceramic capacitor. Connect OUT and BAT
together.
–
There is an internal electrical connection between the exposed thermal pad and the GND pin of the device.
The thermal pad must be connected to the same potential as the GND pin on the printed circuit board. Do not
use the thermal pad as the primary ground input for the device. GND pin must be connected to ground at all
times.
Thermal
Pad
Pad
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8 Specifications
8.1 Absolute Maximum Ratings (1)
over operating free-air temperature range (unless otherwise noted)
Input Voltage
MIN
MAX
UNIT
IN (with respect to GND)
–0.3
30
V
EN, TS (with respect to GND)
–0.3
7
V
Output Voltage
BAT, OUT, LDO, CHG, ISET (with respect to GND)
–0.3
7
V
Input Current (Continuous)
IN
1.2
A
Output Current (Continuous)
BAT
1.2
A
Output Current (Continuous)
LDO
100
mA
Output Sink Current
CHG
5
mA
150
°C
Junction temperature, TJ
(1)
–40
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage
values are with respect to the network ground pin unless otherwise noted.
8.2 Handling Ratings
TSTG
VESD
(1)
(2)
MIN
MAX
UNIT
–65
150
°C
Human body model (HBM), per ANSI/ESDA/JEDEC
JS-001, all pins (1)
0
3000
Charged device model (CDM), per JEDEC
specification JESD22-C101, all pins (2)
0
1000
Storage temperature
Electrostatic discharge
V
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
8.3 Recommended Operating Conditions
MIN
VIN
IN voltage
3.75
28
IN operating voltage
3.75 (1)
10.2
IIN
Input current, IN
IOUT
Output Current in charge mode, OUT
TJ
Junction Temperature
(1)
MAX
(1)
UNITS
V
1
0
A
1
A
125
°C
Charge current may be limited at low input voltages due to the dropout of the device.
8.4 Thermal Information
THERMAL METRIC (1)
bq25071
DQC (10 PINS)
RθJA
Junction-to-ambient thermal resistance
61.6
RθJC(top)
Junction-to-case (top) thermal resistance
65.5
RθJB
Junction-to-board thermal resistance
22.8
ψJT
Junction-to-top characterization parameter
1.5
ψJB
Junction-to-board characterization parameter
22.7
RθJC(bot)
Junction-to-case (bottom) thermal resistance
5.5
(1)
4
UNIT
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
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8.5 Electrical Characteristics
Over junction temperature range 0°C ≤ TJ ≤ 125°C and recommended supply voltage (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
3.15
3.30
3.55
UNITS
INPUT
V(UVLO)
Under-voltage lock-out
VIN: 0 V → 4 V
VHYS(UVLO)
Hysteresis on V(UVLO)
VIN: 4 V → 0 V
VIN(SLP)
Valid input source threshold VIN(SLP) above
VBAT
Input power good if VIN > VBAT +
VIN(SLP)
V(BAT) = 3.6 V, VIN: 3.5 V → 4 V
30
75
150
mV
VHYS(INSLP)
Hysteresis on VIN(SLP)
V(BAT) = 3.6 V, VIN: 4 V → 3.5 V
18
32
54
mV
tDGL(NO-IN)
Delay time, input power loss to charger turnoff
Time measured from VIN: 5 V → 2.5 V
1 μs fall-time
VOVP
Input over-voltage protection threshold
VIN: 5 V → 11 V
VHYS(OVP)
Hysteresis on OVP
VIN: 11 V → 5 V
250
32
10.2
10.5
V
mV
ms
10.8
100
V
mV
QUIESCENT CURRENT
IBAT(PDWN)
Battery current into BAT, No input connected
VIN = 0 V (1), V(CHG) = Low, TJ = 85°C
6
EN = HI, VIN = 5.5V
IIN(STDBY)
Standby current into IN pin
μA
0.25
EN = HI, VIN ≤ V(OVP)
0.5
EN = HI, VIN > V(OVP)
2
mA
BATTERY CHARGER FAST-CHARGE
TA = 0°C to 125°C, IOUT = 50 mA
3.455
3.5
3.545
TA = 25°C
3.455
3.5
3.539
3.62
3.7
VBAT(REG)
Battery charge regulation voltage
VBAT(OVCH)
Battery overcharge voltage threshold
IIN(RANGE)
User programmable input current limit range
IIN(LIM)
Input current limit, or fast-charge current
KISET
Fast charge current factor
R(ISET) = 1 kΩ to 10 kΩ, EN = VSS
VDO(IN-OUT)
VIN – VOUT
VIN = 3.55 V, IOUT = 0.75 A
R(ISET) = 1 kΩ to 1 0kΩ, EN = VSS
100
EN = FLOAT
435
EN = VSS
467
3.78
V
1000
mA
500
KISET/RISET
900
V
mA
1000
1100
AΩ
500
900
mV
430
700
Ω
1.07
2
A
ISET SHORT CIRCUIT PROTECTION
RISET(MAX)
Highest resistor value considered a short fault
IOUT(CL)
Maximum OUT current limit regulation
(Clamp)
R(ISET): 900 Ω → 300 Ω, IOUT latches
off, Cycle power to reset, Fault range >
1.10 A
PRE-CHARGE AND CHARGE DONE
V(LOWV)
Pre-charge to fast-charge transition threshold
I(PRECHARGE)
Precharge current to BAT during precharge
mode
V(BAT) = 0 V to 0.7 V
0.5
0.7
0.9
V
41.5
45
48.5
mA
RECHARGE OR REFRESH
V(RCH)
Recharge detection threshold
V(BAT) falling
3.1
3.3
3.5
V
V(LDO)
LDO Output Voltage
VIN = 5 V to 10.5 V,
I(LDO) = 0 mA to 50 mA
4.7
4.9
5.1
V
I(LDO)
Maximum LDO Output Current
V(DO)
Dropout Voltage
200
350
LDO
(1)
60
VIN = 4.5V, I(LDO) = 50 mA
mA
mV
Force V(CHG)
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Electrical Characteristics (continued)
Over junction temperature range 0°C ≤ TJ ≤ 125°C and recommended supply voltage (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
LOGIC LEVELS ON EN
VIL
Logic low input voltage
VIH
Logic high input voltage
1.4
0.4
V(FLT)
Logic FLOAT input voltage
600
I(FLTlkg)
Maximum leakage sink or source current to
keep in FLOAT
IEN(DRIVE)
Minimal drive current from an external device
for Low or High
V
V
850
1100
mV
1
µA
8
µA
BATTERY-PACK NTC MONITOR (TS)
V(COLD)
TS Cold Threshold
V(TS) Rising
V(CUTOFF)
TS Cold Cutoff Threshold
V(TS) Falling
V(HOT)
TS Hot Threshold
V(TS) Falling
VHOT(HYS)
TS Hot Cutoff Threshold
V(TS) Rising
VOL
Output LOW voltage
I(SINK) = 1 mA
IIH
Leakage current
CHG = 5 V
24.5
25
12
12.5
25.5
1
%VLDO
%VLDO
13
1
%VLDO
%VLDO
CHG OUTPUT
0.45
V
1
μA
THERMAL REGULATION
TJ(REG)
Temperature Regulation Limit
TJ rising
125
°C
TJ(OFF)
Thermal shutdown temperature
TJ rising
155
°C
TJ(OFF-HYS)
Thermal shutdown hysteresis
TJ falling
20
°C
8.6 Timing Requirements
MIN
TYP
MAX
UNIT
INPUT
tBLK(OVP)
tREC(OVP)
100
μs
Time measured from VIN: 11 V → 5 V
1 μs fall-time to LDO = HI,
V(BAT) = 3.5 V
100
μs
Clear fault by cycling V(BUS) or EN
1.5
ms
Input overvoltage blanking time
Input overvoltage recovery time
ISET SHORT CIRCUIT PROTECTION
tDGL(SHORT)
Deglitch time transition from I(SET)
short to IOUT disable
PRE-CHARGE AND CHARGE DONE
tDGL1(LOWV)
Deglitch time on pre-charge to fastcharge transition
25
ms
tDGL2(LOWV)
Deglitch time on fast-charge to precharge transition
25
ms
V(BAT) falling to New Charge Cycle
25
ms
Fault detected on TS to stop charge
25
ms
RECHARGE OR REFRESH
tDGL(RCH)
Deglitch time, recharge threshold
detected
BATTERY-PACK NTC MONITOR (TS)
tdgl(TS)
6
Deglitch for TS Fault
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8.7 Typical Characteristics
4
1.6
3.5
1.4
V(BAT)
V(CHG)
I(BAT)
1.2
1
2.5
2
0.8
1.5
0.6
1
0.4
0.5
0.2
0
0:00:00
Current (A)
Voltage (V)
3
Dropout Voltage (V)
VIN = 5 V, VBAT = 3.2 V, I(CHG) = 280 mA, Typical Application Circuit
0
4:48:00
1:12:00
2:24:00
3:36:00
Elapsed Time (hh:mm:ss)
1.5
1.4
1.3
1.2
1.1
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0
25
50
75
Temperature (°C)
VIN = 4.5 V
10.6
3.54
10.58
3.53
10.56
3.52
3.51
3.5
3.49
3.48
10.52
10.5
10.48
10.46
10.44
3.46
10.42
0
0.1
0.2
0.3
0.4 0.5 0.6 0.7
Charge Current (A)
0.8
0.9
10.4
1
0
50
75
Temperature (°C)
100
125
G009
Figure 4. OVP Threshold vs Temperature
0.7
100mA Current Limit
500mA Current Limit
0.6
Input Current Limit (A)
Charge Current (A)
25
G008
Figure 3. Battery Regulation Voltage vs Charge Current
1.1
1.05
1
0.95
0.9
0.85
0.8
0.75
0.7
0.65
0.6
0.55
0.5
0.45
0.4
G007
IOUT = 1 A
10.54
3.47
3.45
125
Figure 2. Dropout Voltage vs Temperature
3.55
OVP Threshold (V)
Battery Regulation Voltage (V)
Figure 1. Voltage and Current vs Elapsed Time
100
Thermal
Regulation
0.5
0.4
0.3
0.2
0.1
5
6
7
8
Input Voltage (V)
9
10
0
2.5
G010
2.75
3
Battery Voltage (V)
3.25
3.5
G011
VIN = 5 V
Figure 5. Charge Current vs Input Voltage
Figure 6. Input Current Limit vs Battery Voltage
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9 Detailed Description
9.1 Overview
The bq25071 is a highly integrated, linear, LiFePO4 battery charger targeted at space-limited portable
applications. It accepts power from either a USB port or AC adapter and charges a single-cell LiFePO4 battery
with up to 1 A of charge current. The 30 V input rating with 10.5 V input overvoltage protection supports low-cost
unregulated adapters.
The bq25071 has a single power output that simultaneously charges the battery and powers the system. The
input current is programmable from 100 mA up to 1 A using the ISET input or configurable for USB500. There is
also a 4.9 V ±10% 50 mA LDO is integrated into the IC for supplying low power external circuitry.
The LiFePO4 charging algorithm removes the constant voltage mode control typically used in Li-Ion battery
charge cycles which reduces charge time significantly. Instead, the battery is fast charged to the overcharge
voltage and then allowed to relax to a lower float charge voltage threshold. The charger power stage and charge
current sense functions are fully integrated. The charger function has high accuracy current and voltage
regulation loops, and charge status display. During the charge cycle, an internal control loop monitors the IC
junction temperature and reduces the charge current if an internal temperature threshold is exceeded.
8
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9.2 Functional Block Diagram
LDO
+
Q2
Q1
OUT
IN
+
TJ(REG)
TJ
Charge Pump
IIN(REG)
BAT
+
1.5V
VBAT(REG)
+
ISET
VIN(SLP)
ILIM
+
+
Sleep Comparator
+
+
VBAT
VBAT(REG)
OVP Comparator
EN
VBAT
VIN
UVLO Comparator
VOVP
VIN
+
±
VIN
VUVLO
Overcharge Comparator
Charge Control
CHG
TS
VLDO
Status Output
TS Cold
+
Disable
+
TS Hot
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9.3 Feature Description
9.3.1 Input Overvoltage Protection
The bq25071 contains an input overvoltage protection circuit that disables the LDO output and charging when
the input voltage rises above V(OVP). This prevents damage from faulty adapters. The OVP circuitry contains an
100 μs blanking period that prevents ringing on the input from line transients from tripping the OVP circuitry
falsely. If an adapter with an output greater than V(OVP) is plugged in, the IC completes soft-start power up and
then shuts down if the voltage remains above V(OVP) after 100 μs. The LDO remains off and charging remains
disabled until the input voltage falls below V(OVP).
9.3.2 Undervoltage Lockout (UVLO)
The bq25071 remains in power down mode when the input voltage is below the undervoltage lockout threshold
(V(UVLO)). During this mode, the control input (EN) is ignored. The LDO, the charge FET connected between IN
and OUT are off and the status output (CHG) is high impedance. Once the input voltage rises above V(UVLO), the
internal circuitry is turned on and the normal operating procedures are followed.
9.3.3 External NTC Monitoring (TS)
The bq25071 features a flexible, voltage based external battery pack temperature monitoring input. The TS input
connects to the NTC thermistor in the battery pack to monitor battery temperature and prevent dangerous overtemperature conditions. During charging, the voltage at TS is continuously monitored. If the voltage at the TS pin
is outside of the operating range (V(HOT) to V(COLD) for longer than the built in 25 ms deglitch time, charging is
suspended. When the voltage measured at TS returns to within the operation window, charging resumes. When
a battery pack temperature fault occurs charging is suspended, but the CHG output remains low and continues to
indicate charging.
The temperature thresholds are programmed using a resistor divider from LDO to GND with the NTC thermistor
connected to the center tap from TS to GND. See Figure 7 for the circuit example. The value of R1 and R2 are
calculated using the following equations:
-R2 ´ RHOT ´ (0.125 - 1)
R1 =
0.125 ´ (R2 + RHOT)
(1)
R2 =
-RHOT ´ RCOLD ´ (0.125 - 0.250)
RHOT ´ 0.250 ´ (0.125 - 1) + RCOLD ´ 0.125 ´ (1 - 0.250)
(2)
RHOT is the expected thermistor resistance at the programmed hot threshold; RCOLD is the expected thermistor
resistance at the programmed cold threshold.
10
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Feature Description (continued)
LDO
R1
VCOLD
TS
PACK+
TEMP
+
VHOT
R2
PACK-
+
bq25071
For applications that do not require the TS monitoring function, set R1 = 490 kΩ and R2 = 100 kΩ to set the TS
voltage at a valid level and maintain charging.
Figure 7. NTC Monitoring Function
9.3.4 50 mA LDO (LDO)
The LDO output of the bq25071 is a low dropout linear regulator (LDO) that supplies up to 50 mA while
regulating to V(LDO). The LDO is active whenever the input voltage is above V(UVLO) and below V(OVP). It is not
affected by the EN input. The LDO output is used to power and protect circuitry such as USB transceivers from
transients on the input supply.
9.3.5 Charge Status Indicator (CHG)
The bq25071 contains an open drain CHG output that indicates charging state and faults. When charging a
battery in precharge or fastcharge mode, the CHG output is pulled to GND. Once the BAT output reaches the
overcharge voltage threshold, CHG goes high impedance to signal the battery is fully charged. When the battery
voltage drops below the recharge voltage threshold the CHG output is pulled low to signal the host of a new
charge cycle. Connect CHG to the required logic level voltage through a 1 kΩ to 100 kΩ resistor to use the signal
with a microprocessor. I(CHG) must be below 5 mA.
The IC monitors the CHG pin when no input is connected to verify if the system circuitry is active. If the voltage
at CHG is logic being drive low when no input is connected, the TS circuit is turned off for a low quiescent current
state. Once the voltage at CHG increases above logic high, the TS circuit is turned on.
9.3.6 Input Current Limit Control (EN)
The bq25071 contains a 3-state that controls the input current limit. Drive EN low to program the input current
limit to the user defined value programmed using ISET. Drive EN high to place the bq25071 in USB suspend
mode. In USB suspend mode, the input current into bq25071 is reduced. Leaving EN unconnected or connected
to a high impedance source programs the USB500 input current limit.
Table 1. EN Input Definition
EN
MODE
Low
ISET
Hi-Z
USB500
Hi
USB Suspend
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9.4 Device Functional Modes
9.4.1 Charging Operation
The bq25071 uses a charge algorithm that is unique to LiFePO4 chemistry cells. The current taper typically seen
as part of the constant voltage mode control usually present in Li-Ion battery charge cycles is replaced with a
floating regulation voltage with minimal charging current. This dramatically decreases the charge time. When the
bq25071 is enabled by EN, the battery voltage is monitored to verify which stage of charging must be used.
When V(BAT) < V(LOWV), the bq25071 charges in precharge mode; when V(BAT) > V(LOWV), the normal charge cycle
is used.
9.4.1.1 Charger Operation with Minimum System Voltage Mode Enabled
PRECHARGE
Constant Current
Fast Charge
Float-Voltage
Regulation
VOUT(OVCH)
VOUT(REG)
IFASTCHG
CHG = Hi -Z
VLOWV
IPRECHG
Battery and
Output
Voltage
Battery
Current
Figure 8. Typical Charging Cycle with Minimum System Voltage Enabled
9.4.1.2 Precharge Mode (V(BAT) ≤ V(LOWV))
The bq25071 enters precharge mode when VBAT ≤ V(LOWV). Upon entering precharge mode, the battery is
charged with a 47.5 mA current and CHG goes low.
9.4.1.3 Fast Charge Mode
Once V(BAT) > V(LOWV), the bq25071 enters constant current (CC) mode where charge current is regulated using
the internal MOSFETs between IN and OUT. The total current is shared between the output load and the battery.
Once the battery voltage charges up to VBAT(OVCH), the CHG output goes high indicating the charge cycle is
complete and the bq25071 switches the battery regulation voltage to VBAT(REG). The battery voltage is allowed to
relax down to VBAT(REG). The charger remains enabled and regulates the output to VBAT(REG). If at any time the
battery falls below V(RCH), the charge cycle restarts.
12
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Device Functional Modes (continued)
9.4.2 Programmable Input Current Limit (ISET)
When the charger is enabled, and the user programmable current limit is selected by the EN input, internal
circuits generate a current proportional to the input current at the ISET input. The current out of ISET is 1/1000
(±10%) of the charge current. This current, when applied to the external charge current programming resistor, R1
(Figure 9), generates an analog voltage that is regulated to program the fast charge current. Connect a resistor
from ISET to GND to program the input current limit using the following equation:
K (ISET) 1000A ´ W
=
I(IN_LIM) =
R(ISET)
R(ISET)
(3)
I(IN_LIM) is programmable from 100 mA to 1 A. The voltage at ISET can be monitored by an external host to
calculate the charging current to the battery. The input current is related to the ISET voltage using the following
equation:
1000
IIN = V(ISET) ´
R(ISET)
(4)
Monitoring the ISET voltage allows for the host to calculate the actual charging current and therefore perform
more accurate termination. The input current to the system must be monitored and subtracted from the current
into the bq25071 which is show by V(ISET).
9.4.3 Thermal Regulation and Thermal Shutdown
The bq25071 contains a thermal regulation loop that monitors the die temperature continuously. If the
temperature exceeds TJ(REG), the device automatically reduces the charging current to prevent the die
temperature from increasing further. In some cases, the die temperature continues to rise despite the operation
of the thermal loop, particularly under high VIN conditions. If the die temperature increases to TJ(OFF), the IC is
turned off. Once the device die temperature cools by TJ(OFF-HYS), the device turns on and returns to thermal
regulation. Continuous overtemperature conditions result in the pulsing of the load current. If the junction
temperature of the device exceeds TJ(OFF), the charge FET is turned off. The FET is turned back on when the
junction temperature falls below TJ(OFF) – TJ(OFF-HYS).
Note that these features monitor the die temperature of the bq25071. This is not synonymous with ambient
temperature. Self heating exists due to the power dissipated in the IC because of the linear nature of the battery
charging algorithm.
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10 Application and Implementation
10.1 Application Information
The typical application circuit uses a single output which charges the battery and powers the system. Additionally
a 50-mA LDO can supply a low power external circuit.
The bq25071EVM-658 evaluation module (EVM) is a complete charger module for evaluating the bq25071. Refer
to SLUUB49.
10.2 Typical Application
VGPIO
R2
100 kW
bq25071
USB or TA
STATUS
CHG
IN
VBUS
GND
VDD
OUT
C1
0.1 mF
D+
C2
1 mF
D-
EN
ABB
BAT
PACK+
TEMP
TS
ISET
R1
1 kW
PACK-
GND
VCHG DET
LDO
PWRPD
C2
0.1 mF
R5
1.5 kW
USB DET
R3
1.5 kW
VUSBIN
ACDET
R4
1.5 kW
GPIO
Figure 9. bq25071 Typical Application Circuit
10.2.1 Design Requirements
Table 2. Design Parameters
14
PARAMETER
EXAMPLE VALUE
Input supply range
5 V ±5%
Output voltage range
3.5 V
Output current rating
1000 mA
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10.2.2 Detailed Design Procedure
10.2.2.1 Selection of Input and Output Capacitors
In most applications, all that is needed is a high-frequency decoupling capacitor on the input power pin. For
normal charging applications, a 0.1 μF ceramic capacitor, placed in close proximity to the IN pin and GND pad
works best. In some applications, depending on the power supply characteristics and cable length, it may be
necessary to increase the input filter capacitor to avoid exceeding the OVP voltage threshold during adapter hot
plug events where the ringing exceeds the deglitch time.
The charger in the bq25071 requires a capacitor from OUT to GND for loop stability. Connect a 1 μF ceramic
capacitor from OUT to GND close to the pins for best results. More output capacitance may be required to
minimize the output drop during large load transients.
The LDO also requires an output capacitor for loop stability. Connect a 0.1 μF ceramic capacitor from LDO to
GND close to the pins. For improved transient response, this capacitor may be increased.
10.2.2.2 Thermal Considerations
The bq25071 is packaged in a thermally enhanced QFN package. The package includes a thermal pad to
provide an effective thermal contact between the IC and the printed circuit board (PCB). Full PCB design
guidelines for this package are provided in the application note entitled: QFN/SON PCB Attachment Application
Note (SLUA271).
The most common measure of package thermal performance is thermal impedance (θJA) measured (or modeled)
from the chip junction to the air surrounding the package surface (ambient). The mathematical expression for θJA
is:
Where:
q JA =
TJ - TA
PD
(5)
TJ = chip junction temperature
TA = ambient temperature
PD = device power dissipation
Factors that can greatly influence the measurement and calculation of θJA include:
• Whether or not the device is board mounted
• Trace size, composition, thickness, and geometry
• Orientation of the device (horizontal or vertical)
• Volume of the ambient air surrounding the device under test and airflow
• Whether other surfaces are in close proximity to the device being tested
The device power dissipation, PD, is a function of the charge rate and the voltage drop across the internal
PowerFET. It can be calculated from the following equation when a battery pack is being charged:
PD = (VIN – VOUT) × IOUT
Due to the charge profile of LiFePO4 batteries the maximum power dissipation is typically seen at the beginning
of the charge cycle when the battery voltage is at its lowest. See the charging profile, Figure 8. If the board
thermal design is not adequate the programmed fast charge rate current may not be achieved under maximum
input voltage and minimum battery voltage, as the thermal loop can be active, effectively reducing the charge
current to avoid excessive IC junction temperature.
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10.2.3 Application Curves
5V/div
VIN
5V/div
V(LDO)
200mA/div
IOUT
2V/div
V(CHG)
5V/div
V(CTRL)
5V/div
V(LDO)
200mA/div
IOUT
2V/div
V(CHG)
10ms/div
20ms/div
V(CTRL) = 0 V
Figure 11. Charger Enable Using EN
Figure 10. Adapter Plug-In With Battery Connected
5V/div
V(CTRL)
5V/div
5V/div
V(LDO)
200mA/div
VIN
5V/div
V(LDO)
IOUT
2V/div
V(CHG)
1A/div
IOUT
2V/div
V(CHG)
400μs/div
40μs/div
VIN = 5 V to 12 V
Figure 12. Charger Disable Using EN
16
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Figure 13. OVP Fault
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11 Power Supply Recommendations
In a typical application, the system is powered by a USB port or USB wall adapter.
The wide input voltage range supports low cost and unregulated adapters.
The minimum input voltage - where the charging process starts with a reduced charging current - could be 3.75
V. The maximum supported input voltage is up to 10 V; the overvoltage protection kicks in at 10.5 V and the
maximum input voltage rating is 30 V Input Rating.
12 Layout
12.1 Layout Guidelines
It is important to pay special attention to the PCB layout. The following provides some guidelines:
• To obtain optimal performance, the decoupling capacitor from IN to GND (thermal pad) and the output filter
capacitors from OUT to GND (thermal pad) should be placed as close as possible to the bq25071, with short
trace runs to both IN, OUT and GND (thermal pad).
• All low-current GND connections should be kept separate from the high-current charge or discharge paths
from the battery. Use a single-point ground technique incorporating both the small signal ground path and the
power ground path.
• The high current charge paths into IN pin and from the OUT pin must be sized appropriately for the maximum
charge current in order to avoid voltage drops in these traces.
• The bq25071 is packaged in a thermally enhanced SON package. The package includes a thermal pad to
provide an effective thermal contact between the IC and the printed circuit board (PCB); this thermal pad is
also the main ground connection for the device. Connect the thermal pad to the PCB ground connection. Full
PCB design guidelines for this package are provided in the application note entitled: QFN/SON PCB
Attachment Application Note (SLUA271).
12.2 Layout Example
The bottom plane is a ground plane that is connected to the top through vias.
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Layout Example (continued)
R1
0.1mF
D1
USB or Adapter
CHG
VBUS
GND
D+
IN
C3
1 mF
OUT
C4
C2
1 mF
0.1mF
C2
22 mF
D-
bq25071
U1
EN
BAT
PACK+
TEMP
TS
R3
24.3kW
R2
1 kW
ISET
R4
11.3kW
PACK-
GND
LDO
PWRPD
C5
0.1mF
Figure 14. Schematic
18
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13 Device and Documentation Support
13.1 Trademarks
All trademarks are the property of their respective owners.
13.2 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
13.3 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
14 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
www.ti.com
31-Jul-2014
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
BQ25071DQCR
ACTIVE
WSON
DQC
10
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
25071
BQ25071DQCT
ACTIVE
WSON
DQC
10
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
25071
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
31-Jul-2014
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
18-Aug-2014
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
BQ25071DQCR
WSON
DQC
10
3000
180.0
8.4
2.25
3.25
1.05
4.0
8.0
Q1
BQ25071DQCT
WSON
DQC
10
250
180.0
8.4
2.25
3.25
1.05
4.0
8.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
18-Aug-2014
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
BQ25071DQCR
WSON
DQC
10
3000
210.0
185.0
35.0
BQ25071DQCT
WSON
DQC
10
250
210.0
185.0
35.0
Pack Materials-Page 2
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