CEP110P03/CEB110P03 P-Channel Enhancement Mode Field Effect Transistor PRELIMINARY FEATURES -30V, -105.5A, RDS(ON) =5.8mΩ @VGS = -10V. RDS(ON) =8.5mΩ @VGS = -4.5V. Super high dense cell design for extremely low RDS(ON). High power and current handing capability. D Lead-free plating ; RoHS compliant. TO-220 & TO-263 package. D G S CEB SERIES TO-263(DD-PAK) G G D S ABSOLUTE MAXIMUM RATINGS Parameter CEP SERIES TO-220 S Tc = 25 C unless otherwise noted Symbol Limit Drain-Source Voltage VDS Gate-Source Voltage VGS Drain Current-Continuous @ TC = 25 C ID @ TC = 100 C Drain Current-Pulsed a IDM Maximum Power Dissipation @ TC = 25 C PD - Derate above 25 C -30 Units V ±20 -105.5 V A -69 A -422 A 96 W 0.77 W/ C Single Pulsed Avalanche Energy e EAS 612.5 mJ Single Pulsed Avalanche Current Operating and Store Temperature Range IAS TJ,Tstg 35 -55 to 150 A C e Thermal Characteristics Symbol Limit Units Thermal Resistance, Junction-to-Case Parameter RθJC 1.3 C/W Thermal Resistance, Junction-to-Ambient RθJA 62.5 C/W This is preliminary information on a new product in development now . Details are subject to change without notice . 1 Rev 1. 2011.Sep http://www.cetsemi.com CEP110P03/CEB110P03 Electrical Characteristics Parameter TA = 25 C unless otherwise noted Symbol Test Condition Min Drain-Source Breakdown Voltage BVDSS VGS = 0V, ID = -250µA -30 Zero Gate Voltage Drain Current IDSS Gate Body Leakage Current, Forward Gate Body Leakage Current, Reverse Typ Max Units VDS = -30V, VGS = 0V -1 µA IGSSF VGS = 20V, VDS = 0V 100 nA IGSSR VGS = -20V, VDS = 0V -100 nA Off Characteristics V On Characteristics c Gate Threshold Voltage Static Drain-Source On-Resistance VGS(th) RDS(on) VGS = VDS, ID = -250µA -3 V VGS = -10V, ID = -30A -1 4.7 5.8 mΩ VGS = -4.5V, ID = -20A 6.2 8.5 mΩ Dynamic Characteristics d Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss VDS = -15V, VGS = 0V, f = 1.0 MHz 5660 pF 1505 pF 775 pF Switching Characteristics d Turn-On Delay Time td(on) Turn-On Rise Time tr Turn-Off Delay Time td(off) VDD = -15V, ID = -1A, VGS = -10V, RGEN= 6Ω 22 44 ns 15 30 ns ns 200 400 Turn-Off Fall Time tf 128 256 ns Total Gate Charge Qg 65 85 nC Gate-Source Charge Qgs Gate-Drain Charge Qgd VDS = -15V, ID = -15A, VGS = -4.5V 14 nC 27 nC Drain-Source Diode Characteristics and Maximun Ratings Drain-Source Diode Forward Current b IS Drain-Source Diode Forward Voltage c VSD VGS = 0V, IS = -20A Notes : a.Repetitive Rating : Pulse width limited by maximum junction temperature. b.Surface Mounted on FR4 Board, t < 10 sec. c.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%. d.Guaranteed by design, not subject to production testing. e.L = 1mH, IAS = 35A, VDD = 24V, RG = 25Ω, Starting TJ = 25 C 2 -108 A -1.2 V 5 CEP110P03/CEB110P03 150 -VGS=10,8,7,6,4V 25 C 100 75 -ID, Drain Current (A) -ID, Drain Current (A) 125 -VGS=3V 50 25 0.5 1.0 1.5 2.0 0 1 2 3 4 5 6 Figure 1. Output Characteristics Figure 2. Transfer Characteristics RDS(ON), Normalized RDS(ON), On-Resistance(Ohms) 4000 3000 2000 Coss 1000 Crss 0 5 10 15 20 25 2.2 1.9 ID=-30A VGS=-10V 1.6 1.3 1.0 0.7 0.4 -100 -50 0 50 100 150 200 -VDS, Drain-to-Source Voltage (V) TJ, Junction Temperature( C) Figure 3. Capacitance Figure 4. On-Resistance Variation with Temperature VDS=VGS -IS, Source-drain current (A) C, Capacitance (pF) VTH, Normalized Gate-Source Threshold Voltage 0 -VGS, Gate-to-Source Voltage (V) Ciss ID=-250µA 1.1 1.0 0.9 0.8 0.7 0.6 -50 -55 C TJ=125 C 30 -VDS, Drain-to-Source Voltage (V) 5000 1.2 60 2.5 6000 1.3 90 -VGS=2V 0 0.0 0 120 -25 0 25 50 75 100 125 150 VGS=0V 10 1 10 0 10 -1 0.4 0.6 0.8 1.0 1.2 1.4 TJ, Junction Temperature( C) -VSD, Body Diode Forward Voltage (V) Figure 5. Gate Threshold Variation with Temperature Figure 6. Body Diode Forward Voltage Variation with Source Current 3 5 V =-15V DS ID=-15A 4 -ID, Drain Current (A) -VGS, Gate to Source Voltage (V) CEP110P03/CEB110P03 3 2 1 0 0 20 40 60 10 3 10 2 10 1 10 80 RDS(ON)Limit 100ms 1ms 10ms DC TC=25 C TJ=150 C Single Pulse 0 10 -1 10 0 10 1 10 Qg, Total Gate Charge (nC) -VDS, Drain-Source Voltage (V) Figure 7. Gate Charge Figure 8. Maximum Safe Operating Area VDD t on RL V IN D VGS RGEN toff tr td(on) td(off) tf 90% 90% VOUT VOUT 10% INVERTED 10% G 90% S VIN 50% 50% 10% PULSE WIDTH Figure 10. Switching Waveforms r(t),Normalized Effective Transient Thermal Impedance Figure 9. Switching Test Circuit 10 0 D=0.5 0.2 10 -1 PDM 0.1 t1 0.05 0.02 0.01 1. RθJC (t)=r (t) * RθJC 2. RθJC=See Datasheet 3. TJM-TC = P* RθJC (t) 4. Duty Cycle, D=t1/t2 Single Pulse 10 -2 10 -4 t2 10 -3 10 -2 10 -1 10 0 Square Wave Pulse Duration (sec) Figure 11. Normalized Thermal Transient Impedance Curve 4 10 1 10 2 2