BCM® Bus Converter BCM6123xD1E1368yzz ® C S US C NRTL US Isolated Fixed-Ratio DC-DC Converter Features & Benefits Product Ratings • Up to 68A continuous secondary current • Up to 1177W/in3 power density • 97.4% peak efficiency VPRI = 384V (260 – 410V) ISEC = up to 68A VSEC = 12V (8.1 – 12.8V) (no load) K = 1/32 • 4,242VDC isolation • Parallel operation for multi-kW arrays Product Description • OV, OC, UV, short circuit and thermal protection The BCM6123xD1E1368yzz is a high efficiency Bus Converter, operating from a 260 to 410VDC primary bus to deliver an isolated, ratiometric secondary voltage from 8.1 to 12.8VDC. • 6123 through-hole ChiP package ■■2.402” x 0.990” x 0.284” (61.00mm x 25.14mm x 7.21mm) • PMBus™ management interface * Typical Applications • 380VDC Power Distribution • High End Computing Systems • Automated Test Equipment • Industrial Systems • High Density Power Supplies • Communications Systems • Transportation The BCM6123xD1E1368yzz offers low noise, fast transient response, and industry leading efficiency and power density. In addition, it provides an AC impedance beyond the bandwidth of most downstream regulators, allowing input capacitance normally located at the input of a PoL regulator to be located at the primary side of the BCM. With a primary to secondary K factor of 1/32, that capacitance value can be reduced by a factor of 1024x, resulting in savings of board area, material and total system cost. Leveraging the thermal and density benefits of Vicor’s ChiP packaging technology, the BCM offers flexible thermal management options with very low top and bottom side thermal impedances. Thermally-adept ChiP-based power components enable customers to achieve low cost power system solutions with previously unattainable system size, weight and efficiency attributes quickly and predictably. This product can operate in the reverse direction, at full rated current, after being previously started in the forward direction. * When used with D44TL1A0 and I13TL1A0 BCM® Bus Converter Page 1 of 30 Rev 1.2 07/2017 BCM6123xD1E1368yzz Typical Applications BCM TM EN enable/disable switch SW1 VAUX F1 VPRI +VPRI +VSEC –VPRI –VSEC CPRI POL GND PRIMARY SECONDARY ISOLATION BOUNDARY BCM6123xD1E1368y00 at Point of load BCM SER-OUT SER-OUT EN SER-IN enable/disable switch SER-IN FUSE VPRI C +VPRI +VSEC –VPRI –VSEC POL I_BCM_ELEC PRIMARY SOURCE_RTN SECONDARY Digital Supervisor ISOLATION BOUNDARY Digital Isolator D44TL1A0 I13TL1A0 NC PRI_OUT_A SEC_IN_A PRI_OUT_B SEC_IN_B TXD PRI_IN_C SEC_OUT_C RXD PRI_COM SEC_COM Host µC VDDB SER-IN t + VDD – V EXT SER-OUT SGND SGND PMBus PMBus SGND SGND SGND BCM6123xD1E1368y01 at Point of load BCM® Bus Converter Page 2 of 30 Rev 1.2 07/2017 BCM6123xD1E1368yzz Typical Applications (Cont.) 3 phase AIM + BCM ChiP +VPRI +VSEC TM/SER-OUT EN VAUX/SER-IN L1 L2 L3 - L O A D -VPRI -VSEC ISOLATION BOUNDARY 3 phase AC to point of load (3 phase AIM + BCM6123xD1E1368yzz) BCM® Bus Converter Page 3 of 30 Rev 1.2 07/2017 BCM6123xD1E1368yzz Pin Configuration TOP VIEW 1 2 +VSEC A A’ +VSEC -VSEC1 B B’ -VSEC2 -VSEC1 C C’ -VSEC2 +VSEC D D’ +VSEC +VSEC E E’ +VSEC -VSEC1 F F’ -VSEC2 -VSEC1 G G’ -VSEC2 +VSEC H H’ +VSEC +VPRI I I’ TM/SER-OUT +VPRI J J’ EN +VPRI K K’ VAUX/SER-IN +VPRI L L’ -VPRI 6123 ChiP Package Pin Descriptions Power Pins Pin Number Signal Name Type Function I1, J1, K1, L1 +VPRI PRIMARY POWER Positive primary transformer power terminal L’2 -VPRI PRIMARY POWER RETURN Negative primary transformer power terminal A1, D1, E1, H1, A’2, D’2, E’2, H’2 +VSEC SECONDARY POWER Positive secondary transformer power terminal B1, C1, F1, G1 B’2, C’2, F’2, G’2 -VSEC * SECONDARY POWER RETURN Negative secondary transformer power terminal Analog Control Signal Pins Pin Number Signal Name Type Function I’2 TM OUTPUT J’2 EN INPUT K’2 VAUX OUTPUT Temperature Monitor; primary side referenced signals Enables and disables power supply; primary side referenced signals Auxiliary Voltage Source; primary side referenced signals PMBus Control Signal Pins Pin Number Signal Name Type Function I’2 SER-OUT OUTPUT J’2 EN INPUT Enables and disables power supply; Primary side referenced signals K’2 SER-IN INPUT UART receive pin; Primary side referenced signals UART transmit pin; Primary side referenced signals *For proper operation an external low impedance connection must be made between listed -VSEC1 and -VSEC2 terminals. BCM® Bus Converter Page 4 of 30 Rev 1.2 07/2017 BCM6123xD1E1368yzz Part Ordering Information Product Function Package Size Package Mounting Max Primary Input Voltage Range Identifier Max Secondary Voltage Secondary Output Current Temperature Grade Option BCM 6123 x D1 E 13 68 y zz 61 = L 23 = W T = TH 00 = Analog Ctrl Bus Converter Module S = SMT 410V 260 – 410V 13V No Load 68A T = -40°C – 125°C 01 = PMBus Ctrl M = -55°C – 125°C 0R = Reversible Analog Ctrl 0P = Reversible PMBus Ctrl All products shipped in JEDEC standard high profile (0.400” thick) trays (JEDEC Publication 95, Design Guide 4.10). Standard Models Product Function Package Size Package Mounting Max Primary Input Voltage Range Identifier Max Secondary Voltage Secondary Output Current Temperature Grade Option BCM 6123 T D1 E 13 68 T 00 BCM 6123 T D1 E 13 68 T 01 BCM 6123 T D1 E 13 68 T 0R BCM 6123 T D1 E 13 68 T 0P Absolute Maximum Ratings The absolute maximum ratings below are stress ratings only. Operation at or beyond these maximum ratings can cause permanent damage to the device. Parameter Comments +VPRI_DC to –VPRI_DC Min Max Unit -1 480 V 1 V/µs 15 V 4.6 V 5.5 V 4.6 V VPRI_DC or VSEC_DC Slew Rate (Operational) +VSEC_DC to –VSEC_DC -1 TM / SER-OUT to –VPRI_DC EN to –VPRI_DC -0.3 VAUX / SER-IN to –VPRI_DC BCM® Bus Converter Page 5 of 30 Rev 1.2 07/2017 BCM6123xD1E1368yzz Electrical Specifications Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of -40°C ≤ TINTERNAL ≤ 125°C (T-Grade); all other specifications are at TINTERNAL = 25ºC unless otherwise noted. Attribute Symbol Conditions / Notes Min Typ Max Unit 410 V 130 V General Powertrain PRIMARY to SECONDARY Specification (Forward Direction) Primary Input Voltage Range (Continuous) VPRI µController PRI to SEC Input Quiescent Current 260 VPRI_DC VµC_ACTIVE IPRI_Q VPRI_DC voltage where µC is initialized, (ie VAUX = Low, powertrain inactive) Disabled, EN Low, VPRI_DC = 384V 2 TINTERNAL ≤ 100ºC 4 VPRI_DC = 384V, TINTERNAL = 25ºC PRI to SEC No Load Power Dissipation PRI to SEC Inrush Current Peak DC Primary Input Current Transformation Ratio PPRI_NL IPRI_INR_PK IPRI_IN_DC K Secondary Output Current (Continuous) ISEC_OUT_DC Secondary Output Current (Pulsed) ISEC_OUT_PULSE Secondary Output Power (Continuous) PSEC_OUT_DC Secondary Output Power (Pulsed) PSEC_OUT_PULSE PRI to SEC Efficiency (Ambient) ηAMB 9.3 5 VPRI_DC = 384V VPRI_DC = 260V to 410V 22 10 15 At ISEC_OUT_DC = 68A, TINTERNAL ≤ 100ºC 2.2 Primary to secondary, K = VSEC_DC / VPRI_DC, at no load 1/32 10ms pulse, 25% duty cycle, ISEC_OUT_AVG ≤ 50% rated ISEC_OUT_DC 91 A Specified at VPRI_DC = 410V 800 W Specified at VPRI_DC = 410V; 10ms pulse, 25% duty cycle, PSEC_AVG ≤ 50% rated PSEC_OUT_DC 1100 W VPRI_DC = 384V, ISEC_OUT_DC = 68A 96.2 VPRI_DC = 260V to 410V, ISEC_OUT_DC = 68A 95.7 VPRI_DC = 384V, ISEC_OUT_DC = 34A 96.3 97 97 PRI to SEC Efficiency (Over Load Range) η20% 13.6A < ISEC_OUT_DC < 68A 90 RSEC_COLD VPRI_DC = 384V, ISEC_OUT_DC = 68A, TINTERNAL = -40°C 1.0 RSEC_AMB VPRI_DC = 384V, ISEC_OUT_DC = 68A RSEC_HOT VPRI_DC = 384V, ISEC_OUT_DC = 68A, TINTERNAL = 100°C Frequency of the output voltage ripple = 2x FSW VSEC_OUT_PP CSEC_EXT = 0μF, ISEC_OUT_DC = 68A, VPRI_DC = 384V, 20MHz BW 97.2 % Secondary Output Leads Inductance (Parasitic) Primary Input Series Inductance (Internal) BCM® Bus Converter Page 6 of 30 % % 1.65 2.2 1.6 2.3 2.9 2.3 2.9 3.4 0.97 1.03 1.09 210 TINTERNAL ≤ 100ºC Primary Input Leads Inductance (Parasitic) V/V A 96 Secondary Output Voltage Ripple A 68 VPRI_DC = 384V, ISEC_OUT_DC = 68A FSW W A TINTERNAL ≤ 100ºC ηHOT Switching Frequency 20 16 PRI to SEC Efficiency (Hot) PRI to SEC Output Resistance 13 VPRI_DC = 260V to 410V, TINTERNAL = 25ºC VPRI_DC = 410V, CSEC_EXT = 1000μF, RLOAD_SEC = 50% of full load current mA mΩ MHz mV 300 LPRI_IN_LEADS Frequency 2.5MHz (double switching frequency), simulated lead model 7 nH LSEC_OUT_LEADS Frequency 2.5MHz (double switching frequency), simulated lead model 0.64 nH Reduces the need for input decoupling inductance in BCM arrays 0.56 µH LIN_INT Rev 1.2 07/2017 BCM6123xD1E1368yzz Electrical Specifications (Cont.) Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of -40°C ≤ TINTERNAL ≤ 125°C (T-Grade); all other specifications are at TINTERNAL = 25ºC unless otherwise noted. Attribute Symbol Conditions / Notes Min Typ Max Unit General Powertrain PRIMARY to SECONDARY Specification (Forward Direction) Cont. Effective Primary Capacitance (Internal) CPRI_INT Effective value at 384VPRI_DC 0.25 µF Effective Secondary Capacitance (Internal) CSEC_INT Effective value at 12VSEC_DC 104 µF Rated Secondary Output Capacitance (External) CSEC_OUT_EXT Excessive capacitance may drive module into short circuit protection Rated Secondary Output Capacitance (External), Parallel Array Operation CSEC_OUT_AEXT CSEC_OUT_AEXT Max = N • 0.5 • CSEC_OUT_EXT MAX, where N = the number of units in parallel 1000 µF 357.5 ms Powertrain Protection PRIMARY to SECONDARY (Forward Direction) Auto Restart Time tAUTO_RESTART Startup into a persistent fault condition. Non-latching fault detection given VPRI_DC > VPRI_UVLO+ 292.5 Primary Overvoltage Lockout Threshold VPRI_OVLO+ 420 434.5 450 V Primary Overvoltage Recovery Threshold VPRI_OVLO- 410 424 440 V Primary Overvoltage Lockout Hysteresis VPRI_OVLO_HYST 10.5 V Primary Overvoltage Lockout Response Time tPRI_OVLO 100 µs Primary Soft-Start Time tPRI_SOFT-START 1 ms Secondary Output Overcurrent Trip Threshold ISEC_OUT_OCP Secondary Output Overcurrent Response Time Constant tSEC_OUT_OCP Secondary Output Short Circuit Protection Trip Threshold ISEC_OUT_SCP Secondary Output Short Circuit Protection Response Time tSEC_OUT_SCP Overtemperature Shutdown Threshold BCM® Bus Converter Page 7 of 30 tOTP+ From powertrain active. Fast current limit protection disabled during soft-start 75 Effective internal RC filter 85 3 105 Rev 1.2 07/2017 125 A ms A 1 Temperature sensor located inside controller IC 110 µs °C BCM6123xD1E1368yzz Electrical Specifications (Cont.) Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of -40°C ≤ TINTERNAL ≤ 125°C (T-Grade); all other specifications are at TINTERNAL = 25ºC unless otherwise noted. Attribute Symbol Conditions / Notes Min Typ Max Unit Powertrain Supervisory Limits PRIMARY to SECONDARY (Forward Direction) Primary Overvoltage Lockout Threshold VPRI_OVLO+ 420 434.5 450 V Primary Overvoltage Recovery Threshold VPRI_OVLO- 410 424 440 V Primary Overvoltage Lockout Hysteresis VPRI_OVLO_HYST 10.5 V Primary Overvoltage Lockout Response Time tPRI_OVLO 100 µs Primary Undervoltage Lockout Threshold VPRI_UVLO- 195 221 250 V Primary Undervoltage Recovery Threshold VPRI_UVLO+ 225 243 255 V Primary Undervoltage Lockout Hysteresis VPRI_UVLO_HYST 15 V tPRI_UVLO 100 µs 20 ms Primary Undervoltage Lockout Response Time Primary Undervoltage Startup Delay From VPRI_DC = VPRI_UVLO+ to powertrain active, EN tPRI_UVLO+_DELAY floating (i.e., one time startup delay from application of VPRI_DC to VSEC_DC) Secondary Output Overcurrent Trip Threshold ISEC_OUT_OCP Secondary Output Overcurrent Response Time Constant tSEC_OUT_OCP Overtemperature Shutdown Threshold tOTP+ Overtemperature Recovery Threshold tOTP– Undertemperature Shutdown Threshold tUTP Undertemperature Restart Time BCM® Bus Converter Page 8 of 30 tUTP_RESTART 75 Effective internal RC filter Temperature sensor located inside controller IC 85 3 °C 110 Temperature sensor located inside controller IC; Protection not available for M-Grade units. Rev 1.2 07/2017 A ms 125 105 Startup into a persistent fault condition. Non-latching fault detection given VPRI_DC > VPRI_UVLO+ 110 3 115 °C -45 °C s BCM6123xD1E1368yzz Electrical Specifications (Cont.) Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of -40°C ≤ TINTERNAL ≤ 125°C (T-Grade); all other specifications are at TINTERNAL = 25ºC unless otherwise noted. Attribute Symbol Conditions / Notes Min Typ Max Unit 12.8 V General Powertrain SECONDARY to PRIMARY Specification (Reverse Direction) Secondary Input Voltage Range (Continuous) 8.1 VSEC_DC VSEC_DC = 12V, TINTERNAL = 25ºC SEC to PRI No Load Power Dissipation DC Secondary Input Current Primary Output Power (Continuous) Primary Output Power (Pulsed) Primary Output Current (Continuous) Primary Output Current (Pulsed) PSEC_NL ISEC_IN_DC PPRI_OUT_DC PPRI_OUT_PULSE 9.3 5 VSEC_DC = 12V 20 VSEC_DC = 8.1V to 12.8V, TINTERNAL = 25ºC 16 VSEC_DC = 8.1V to 12.8V 22 70 A Specified at VSEC_DC = 12.8V 800 W Specified at VSEC_DC = 12.8V; 10ms pulse, 25% duty cycle, PPRI_AVG ≤ 50 rated PPRI_OUT_DC 1100 W 2.1 A 2.9 A 10ms pulse, 25% duty cycle, IPRI_OUT_AVG ≤ 50% rated IPRI_OUT_DC VSEC_DC = 12V, IPRI_OUT_DC = 2.1A 96.2 VSEC_DC = 8.1V to 12.8V, IPRI_OUT_DC = 2.1A 95.6 97.2 SEC to PRI Efficiency (Ambient) ηAMB VSEC_DC = 12V, IPRI_OUT_DC = 1.05A 96.3 97 SEC to PRI Efficiency (Hot) ηHOT VSEC_DC = 12V, IPRI_OUT_DC = 2.1A 96 97 SEC to PRI Efficiency (Over Load Range) η20% 0.47A < IPRI_OUT_DC < 2.1A 90 SEC to PRI Output Resistance Primary Output Voltage Ripple BCM® Bus Converter Page 9 of 30 % % % RPRI_COLD VSEC_DC = 12V, IPRI_OUT_DC = 2.1A, TINTERNAL = -40°C 2000 3300 4300 RPRI_AMB VSEC_DC = 12V, IPRI_OUT_DC = 2.1A 3200 3950 4900 RPRI_HOT VSEC_DC = 12V, IPRI_OUT_DC = 2.1A, TINTERNAL = 100°C 4000 4600 5300 VPRI_OUT_PP W At IPRI_DC = 2.1A, TINTERNAL ≤ 100ºC IPRI_OUT_DC IPRI_OUT_PULSE 13 CPRI_OUT_EXT = 0μF, IPRI_OUT_DC = 2.1A, VSEC_DC = 12V, 20MHz BW TINTERNAL ≤ 100ºC 6700 mV 9600 Rev 1.2 07/2017 mΩ BCM6123xD1E1368yzz Electrical Specifications (Cont.) Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of -40°C ≤ TINTERNAL ≤ 125°C (T-Grade); all other specifications are at TINTERNAL = 25ºC unless otherwise noted. Attribute Symbol Conditions / Notes Min Typ Max Unit 13.1 13.6 14.1 V Protection SECONDARY to PRIMARY (Reverse Direction) Secondary Overvoltage Lockout Threshold VSEC_OVLO+ Secondary Overvoltage Lockout Response Time tPRI_OVLO Secondary Undervoltage Lockout Threshold VSEC_UVLO- Secondary Undervoltage Lockout Response Time tSEC_UVLO Module latched shutdown with VPRI_DC < VPRI_UVLO-_R 100 Module latched shutdown with VPRI_DC < VPRI_UVLO-_R 3.4 3.75 µs 4.1 100 V µs Primary Undervoltage Lockout Threshold VPRI_UVLO-_R Applies only to reversible products in forward and in reverse direction; IPRI_DC ≤ 20% while VPRI_UVLO-_R < VPRI_DC < VPRI_MIN 110 120 130 V Primary Undervoltage Recovery Threshold VPRI_UVLO+_R Applies only to reversible products in forward and in reverse direction 120 130 150 V Primary Undervoltage Lockout Hysteresis VPRI_UVLO_HYST_R Applies only to reversible products in forward and in reverse direction Primary Output Overcurrent Trip Threshold IPRI_OUT_OCP Module latched shutdown with VPRI_DC < VPRI_UVLO-_R Primary Output Overcurrent Response Time Constant tPRI_OUT_OCP Effective internal RC filter Primary Short Circuit Protection Trip Threshold IPRI_SCP Primary Short Circuit Protection Response Time tPRI_SCP BCM® Bus Converter Page 10 of 30 Module latched shutdown with VPRI_DC < VPRI_UVLO-_R 10 2.3 2.7 3 3.3 3.4 A ms A 1 Rev 1.2 07/2017 V µs BCM6123xD1E1368yzz Primary/Secondary Output Power (W) 1000 800 600 400 200 0 35 45 55 65 75 85 95 105 115 125 Case Temperature (°C) Top only at temperature Top and leads at temperature Leads at temperature Top, leads, & belly at temperature 1200 Secondary Output Current (A) Seconday Output Power (W) Figure 1 — Specified thermal operating area 1100 1000 900 800 700 600 500 400 300 260 275 290 305 320 335 350 365 380 395 100 410 92 84 76 68 60 52 44 36 28 260 275 290 PSEC_OUT_DC 305 320 ISEC_OUT_DC PSEC_OUT_PULSE Secondary Output Capacitance (% Rated CSEC_EXT_MAX) Figure 2 — Specified electrical operating area using rated RSEC_HOT 110 100 90 80 70 60 50 40 30 20 10 0 0 10 20 30 40 50 60 70 80 90 100 110 Secondary Output Current (% ISEC_OUT_DC) Figure 3 — Specified primary startup into load current and external capacitance BCM® Bus Converter Page 11 of 30 335 350 365 380 Primary Input Voltage (V) Primary Input Voltage (V) Rev 1.2 07/2017 ISEC_OUT_PULSE 395 410 BCM6123xD1E1368yzz Analog Control Signal Characteristics Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of -40°C ≤ TINTERNAL ≤ 125°C (T-Grade); all other specifications are at TINTERNAL = 25ºC unless otherwise noted. Temperature Monitor • The TM pin is a standard analog I/O configured as an output from an internal µC. • The TM pin monitors the internal temperature of the controller IC within an accuracy of ±5°C. • µC 250kHz PWM output internally pulled high to 3.3V. SIGNAL TYPE STATE Startup ATTRIBUTE Powertrain Active to TM Time TM Duty Cycle TM Current SYMBOL CONDITIONS / NOTES MIN TYP MAX 100 tTM 18.18 TMPWM ITM UNIT µs 68.18 % 4 mA Recommended External filtering DIGITAL OUTPUT Regular Operation TM Capacitance (External) CTM_EXT Recommended external filtering 0.01 µF TM Resistance (External) RTM_EXT Recommended external filtering 1 kΩ ATM 10 mV / °C VTM_AMB 1.27 V Specifications using recommended filter TM Gain TM Voltage Reference TM Voltage Ripple VTM_PP RTM_EXT = 1kΩ, CTM_EXT = 0.01µF, VPRI_DC = 384V, ISEC_DC = 68A 28 TINTERNAL ≤ 100ºC mV 40 Enable / Disable Control • • • • The EN pin is a standard analog I/O configured as an input to an internal µC. It is internally pulled high to 3.3V. When held low, the BCM internal bias will be disabled and the powertrain will be inactive. In an array of BCMs, EN pins should be interconnected to synchronize startup. SIGNAL TYPE STATE Startup ANALOG INPUT Regular Operation ATTRIBUTE EN to Powertrain Active Time tEN_START CONDITIONS / NOTES MIN VPRI_DC > VPRI_UVLO+, EN held low both conditions satisfied for T > tPRI_UVLO+_DELAY TYP MAX 250 VEN_TH EN Resistance (Internal) REN_INT Internal pull up resistor VEN_DISABLE_TH Rev 1.2 07/2017 UNIT µs 2.3 EN Voltage Threshold EN Disable Threshold BCM® Bus Converter Page 12 of 30 SYMBOL V 1.5 kΩ 1 V BCM6123xD1E1368yzz Analog Control Signal Characteristics (Cont.) Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of -40°C ≤ TINTERNAL ≤ 125°C (T-Grade); all other specifications are at TINTERNAL = 25ºC unless otherwise noted. Auxiliary Voltage Source • The VAUX pin is a standard analog I/O configured as an output from an internal µC. • VAUX is internally connected to µC output and internally pulled high to a 3.3V regulator with 2% tolerance, a 1% resistor of 1.5kΩ. • VAUX can be used as a “Ready to process full power” flag. This pin transitions VAUX voltage after a 2ms delay from the start of powertrain activating, signaling the end of softstart. • VAUX can be used as “Fault flag”. This pin is pulled low internally when a fault protection is detected. SIGNAL TYPE STATE Startup ANALOG OUTPUT Regular Operation Fault BCM® Bus Converter Page 13 of 30 ATTRIBUTE SYMBOL Powertrain Active to VAUX Time tVAUX VAUX Voltage VVAUX VAUX Available Current IVAUX CONDITIONS / NOTES MIN TYP 2 Powertrain active to VAUX High 2.8 VAUX Voltage Ripple VVAUX_PP VAUX Capacitance (External) CVAUX_EXT VAUX Resistance (External) RVAUX_EXT VAUX Fault Response Time tVAUX_FR MAX ms 3.3 V 4 mA 50 TINTERNAL ≤ 100ºC 100 0.01 VPRI_DC < VµC_ACTIVE From fault to VVAUX = 2.8V, CVAUX = 0pF Rev 1.2 07/2017 1.5 UNIT mV µF kΩ 10 µs BCM6123xD1E1368yzz PMBus™ Control Signal Characteristics Specifications apply over all line, load conditions, unless otherwise noted; boldface specifications apply over the temperature range of -40°C ≤ TINTERNAL ≤ 125°C (T-Grade); all other specifications are at TINTERNAL = 25ºC unless otherwise noted. UART SER-IN / SER-OUT Pins • Universal Asynchronous Receiver / Transmitter (UART) pins. • The BCM communication version is not intended to be used without a Digital Supervisor. • Isolated I2C communication and telemetry is available when using Vicor Digital Isolator and Vicor Digital Supervisor. Please see specific product data sheet for more details. • UART SER-IN pin is internally pulled high using a 1.5kΩ to 3.3V. SIGNAL TYPE STATE GENERAL I/O ATTRIBUTE SYMBOL Baud Rate BRUART CONDITIONS / NOTES MIN TYP MAX 750 Rate UNIT Kbit/s SER-IN Pin SER-IN Input Voltage Range VSER-IN_IH 2.3 V VSER-IN_IL DIGITAL INPUT Regular Operation V SER-IN Rise Time tSER-IN_RISE 10% to 90% 400 ns SER-IN Fall Time tSER-IN_FALL 10% to 90% 25 ns SER-IN RPULLUP RSER-IN_PLP Pull up to 3.3V 1.5 kΩ SER-IN External Capacitance CSER-IN_EXT 400 pF SER-OUT Pin VSER-OUT_OH 0mA ≥ IOH ≥ -4mA VSER-OUT_OL 0mA ≤ IOL ≤ 4mA SER-OUT Rise Time tSER-OUT_RISE 10% to 90% 55 ns SER-OUT Fall Time tSER-OUT_FALL 10% to 90% 45 ns SER-OUT Output Voltage Range DIGITAL OUTPUT 1 SER-OUT Source Current ISER-OUT SER-OUT Output Impedance ZSER-OUT 2.8 V 0.5 VSER-OUT = 2.8V 6 V mA Ω 120 Enable / Disable Control • • • • • The EN pin is a standard analog I/O configured as an input to an internal µC. It is internally pulled high to 3.3V. When held low, the BCM internal bias will be disabled and the powertrain will be inactive. In an array of BCMs, EN pins should be interconnected to synchronize startup. Enable / disable command will have no effect if the EN pin is disabled. SIGNAL TYPE ANALOG INPUT STATE ATTRIBUTE SYMBOL CONDITIONS / NOTES Startup EN to Powertrain Active Time tEN_START VPRI_DC > VPRI_UVLO+, EN held low both conditions satisfied for t > tPRI_UVLO+_DELAY EN Voltage Threshold VENABLE EN Resistance (Internal) REN_INT Regular Operation EN Disable Threshold BCM® Bus Converter Page 14 of 30 VEN_DISABLE_TH Rev 1.2 07/2017 MIN TYP MAX 250 µs 2.3 Internal pull up resistor UNIT V 1.5 kΩ 1 V BCM6123xD1E1368yzz PMBus™ Reported Characteristics Specifications apply over all line, load conditions, unless otherwise noted; boldface specifications apply over the temperature range of -40°C ≤ TINTERNAL ≤ 125°C (T-Grade); all other specifications are at TINTERNAL = 25ºC unless otherwise noted. Monitored Telemetry • The BCM communication version is not intended to be used without a Digital Supervisor. DIGITAL SUPERVISOR PMBusTM READ COMMAND ACCURACY (RATED RANGE) FUNCTIONAL REPORTING RANGE UPDATE RATE REPORTED UNITS Input Voltage (88h) READ_VIN ±5% (LL - HL) 130V to 450V 100µs VACTUAL = VREPORTED x 10-1 Input Current (89h) READ_IIN ±20% (10 - 20% of FL) ±5% (20 - 133% of FL) -2.9A to 2.9A 100µs IACTUAL = IREPORTED x 10-3 Output Voltage [1] (8Bh) READ_VOUT ±5% (LL - HL) 16.25V to 56.25V 100µs VACTUAL = VREPORTED x 10-1 Output Current (8Ch) READ_IOUT ±20% (10 - 20% of FL) ±5% (20 - 133% of FL) -90.4A to 90.4A 100µs IACTUAL = IREPORTED x 10-2 Output Resistance (D4h) READ_ROUT ±5% (50 - 100% of FL) at NL ±10% (50 - 100% of FL) (LL - HL) 0.5mΩ to 5mΩ 100ms RACTUAL = RREPORTED x 10-5 (8Dh) READ_TEMPERATURE_1 ±7°C (Full Range) -55ºC to 130ºC 100ms TACTUAL = TREPORTED ATTRIBUTE Temperature [2] [1] [2] Default READ Output Voltage returned when unit is disabled = -300V. Default READ Temperature returned when unit is disabled = -273°C. Variable Parameter • Factory setting of all below Thresholds and Warning limits are 100% of listed protection values. • Variables can be written only when module is disabled either EN pulled low or VIN < VIN_UVLO-. • Module must remain in a disabled mode for 3ms after any changes to the below variables allowing ample time to commit changes to EEPROM. ATTRIBUTE DIGITAL SUPERVISOR PMBusTM COMMAND [3] CONDITIONS / NOTES Input / Output Overvoltage Protection Limit (55h) VIN_OV_FAULT_LIMIT VIN_OVLO- is automatically 3% lower than this set point Input / Output Overvoltage Warning Limit (57h) VIN_OV_WARN_LIMIT Input / Output Undervoltage Protection Limit (D7h) DISABLE_FAULTS Can only be disabled to a preset default value ACCURACY (RATED RANGE) FUNCTIONAL REPORTING RANGE DEFAULT VALUE ±5% (LL - HL) 130V to 435V 100% ±5% (LL - HL) 130V to 435V 100% ±5% (LL - HL) 130V or 260V 100% Input Overcurrent Protection Limit (5Bh) IIN_OC_FAULT_LIMIT ±20% (10 - 20% of FL) ±5% (20 - 133% of FL) 0 to 2.810A 100% Input Overcurrent Warning Limit (5Dh) IIN_OC_WARN_LIMIT ±20% (10 - 20% of FL) ±5% (20 - 133% of FL) 0 to 2.810A 100% Overtemperature Protection Limit (4Fh) OT_FAULT_LIMIT ±7°C (Full Range) 0 to 125°C 100% Overtemperature Warning Limit (51h) OT_WARN_LIMIT ±7°C (Full Range) 0 to 125°C 100% ±50µs 0 to 100ms 0ms Turn On Delay [3] (60h) TON_DELAY Additional time delay to the undervoltage startup delay Refer to Digital Supervisor datasheet for complete list of supported commands. BCM® Bus Converter Page 15 of 30 Rev 1.2 07/2017 BCM® Bus Converter Page 16 of 30 Rev 1.2 07/2017 VAUX TM OUTPUT OUTPUT OUTPUT EN +VPRI +VSEC BIDIR INPUT VµC_ACTIVE STARTUP tVAUX tPRI_UVLO+_DELAY VPRI_UVLO+ VPRI_OVLO+ VNOM OVERVOLTAGE VPRI_UVLO- VPRI_OVLO- AG up LT ll O u N O P T RV N- AL PU VE R N T O U TU TER UT E YO N U T IN Z I R NP P O L I X A N I U Y IA D N C IT N R AR VA _D IN ECO TU RI & M I P V N µc S PR E > tPRI_UVLO+_DELAY tAUTO-RESTART tSEC_OUT_SCP SHUTDOWN GE NT TA H L E W G EV VO LO HI S T F IT D D RE U U F P LE LE T RC IN N-O UL PUL PU CI Y P R N T R I R A TU LE LE C _D IM AB AB HO RI R S N P N P V E E RT TA ENABLE CONTROL OVERCURRENT E BCM6123xD1E1368yzz BCM Timing Diagram BCM6123xD1E1368yzz High Level Functional State Diagram Application of input voltage to VPRI_DC VµC_ACTIVE < VPRI_DC < VPRI_UVLO+ STANDBY SEQUENCE VPRI_DC > VPRI_UVLO+ STARTUP SEQUENCE TM Low TM Low EN High EN High VAUX Low VAUX Low Powertrain Stopped Powertrain Stopped ENABLE falling edge, or OTP detected Fault Autorecovery FAULT SEQUENCE TM Low EN High VAUX Low Input OVLO or UVLO, Output OCP, or UTP detected ENABLE falling edge, or OTP detected Input OVLO or UVLO, Output OCP, or UTP detected Powertrain Stopped Short Circuit detected BCM® Bus Converter Page 17 of 30 tPRI_UVLO+_DELAY expired ONE TIME DELAY INITIAL STARTUP Rev 1.2 07/2017 SUSTAINED OPERATION TM PWM EN High VAUX High Powertrain Active BCM6123xD1E1368yzz Application Characteristics 15 14 13 12 11 10 9 8 7 6 5 4 3 260 277 293 310 327 343 360 377 393 PRI to SEC, Full Load Efficiency (%) PRI to SEC, Power Dissipation (W) Temperature controlled via top side cold plate, unless otherwise noted. All data presented in this section are collected from units processing power in the forward direction (primary side to secondary side). See associated figures for general trend data. 410 98.0 97.5 97.0 96.5 96.0 -40 -20 Primary Input Voltage (V) TTOP SURFACE CASE: -40°C 25°C 90°C VPRI: PRI to SEC, Power Dissipation PRI to SEC, Efficiency (%) 96 94 92 90 88 86 84 82 6.8 13.6 20.4 27.2 34.0 40.8 47.6 54.4 61.2 68.0 260V 384V PRI to SEC, Power Dissipation PRI to SEC, Efficiency (%) 90 88 86 84 82 80 13.6 20.4 27.2 34.0 40.8 47.6 54.4 61.2 68.0 30 24 18 12 6 0 6.8 13.6 20.4 27.2 34.0 40.8 47.6 54.4 61.2 68.0 260V 384V 410V 54 48 42 36 30 24 18 12 6 0 0.0 6.8 13.6 20.4 27.2 34.0 40.8 47.6 54.4 61.2 68.0 Secondary Output Current (A) BCM® Bus Converter Page 18 of 30 410V Figure 7 — Power dissipation at TCASE = -40°C 92 Figure 8 — Efficiency at TCASE = 25°C 384V 36 VPRI: 94 260V 260V 42 410V 96 VPRI: 100 48 0.0 98 6.8 80 Secondary Output Current (A) Figure 6 — Efficiency at TCASE = -40°C 0.0 60 54 Secondary Output Current (A) VPRI: 40 Figure 5 — Full load efficiency vs. temperature; VPRI_DC 98 0.0 20 Case Temperature (ºC) Figure 4 — No load power dissipation vs. VPRI_DC 80 0 384V Secondary Output Current (A) 410V VPRI: 260V 384V Figure 9 — Power dissipation at TCASE = 25°C Rev 1.2 07/2017 410V PRI to SEC, Power Dissipation PRI to SEC, Efficiency (%) BCM6123xD1E1368yzz 98 96 94 92 90 88 86 84 82 80 0.0 6.8 54 48 42 36 30 24 18 12 6 0 0.0 13.6 20.4 27.2 34.0 40.8 47.6 54.4 61.2 68.0 6.8 13.6 20.4 27.2 34.0 40.8 47.6 54.4 61.2 68.0 Secondary Output Current (A) Secondary Output Current (A) 260V 384V VPRI: 410V PRI to SEC, Output Resistance (mΩ) Figure 10 — Efficiency at TCASE = 90°C 3 2 1 0 -40 -20 0 20 40 60 80 100 Case Temperature (°C) ISEC_OUT: 384V 410V 300 250 200 150 100 50 0 0.0 6.8 13.6 20.4 27.2 34.0 40.8 47.6 54.4 61.2 68.0 Secondary Output Current (A) VPRI : 68A Figure 12 — RSEC vs. temperature; Nominal VPRI_DC ISEC_DC = 66.67A at TCASE = 90°C 384V Figure 13 — VSEC_OUT_PP vs. ISEC_DC; No external CSEC_OUT_EXT. Board mounted module, scope setting: 20MHz analog BW Figure 14 — Full load secondary voltage ripple, 270µF CPRI_IN_EXT; No external CSEC_OUT_EXT. Board mounted module, scope setting: 20MHz analog BW BCM® Bus Converter Page 19 of 30 260V Figure 11 — Power dissipation at TCASE = 90°C Secondary Output Voltage Ripple (mV) VPRI: Rev 1.2 07/2017 BCM6123xD1E1368yzz Figure 15 — 0A – 68A transient response: CPRI_IN_EXT = 270µF, no external CSEC_OUT_EXT Figure 16 — 68A – 0A transient response: CPRI_IN_EXT = 270µF, no external CSEC_OUT_EXT Figure 17 — Startup from application of VPRI_DC = 384V, 50% ISEC_OUT_DC, 100% CSEC_OUT_EXT Figure 18 — Startup from application of EN with pre-applied VPRI_DC = 384V, 50% ISEC_OUT_DC, 100% CSEC_OUT_EXT BCM® Bus Converter Page 20 of 30 Rev 1.2 07/2017 BCM6123xD1E1368yzz General Characteristics Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of -40°C ≤ TINTERNAL ≤ 125°C (T-Grade); all other specifications are at TINTERNAL = 25ºC unless otherwise noted. Attribute Symbol Conditions / Notes Min Typ Max Unit Mechanical Length L 60.87 / [2.396] 61.00 / [2.402] 61.13 / [2.407] mm/[in] Width W 24.76 / [0.975] 25.14 / [0.990] 25.52 / [1.005] mm/[in] Height H 7.11 / [0.280] mm/[in] Volume Vol Weight W Lead Finish Without heatsink 7.21 / [0.284] 7.31 / [0.288] cm3/[in3] 11.06 / [0.675] 41 / [1.45] g/[oz] Nickel 0.51 2.03 Palladium 0.02 0.15 Gold 0.003 0.051 BCM6123xD1E1368yzz (T-Grade) -40 125 °C BCM6123xD1E1368yzz (M-Grade) -55 125 °C µm Thermal Operating Temperature Thermal Resistance Top Side Thermal Resistance Leads Thermal Resistance Bottom Side TINTERNAL θINT-TOP θINT-LEADS θINT-BOTTOM Estimated thermal resistance to maximum temperature internal component from isothermal top 1.35 °C/W 2 °C/W 1.91 °C/W 34 Ws/°C Estimated thermal resistance to maximum temperature internal component from isothermal leads Estimated thermal resistance to maximum temperature internal component from isothermal bottom Thermal Capacity Assembly BCM6123xD1E1368yzz (T-Grade) -55 125 °C BCM6123xD1E1368yzz (M-Grade) -65 125 °C Storage Temperature ESD Withstand BCM® Bus Converter Page 21 of 30 ESDHBM Human Body Model, “ESDA / JEDEC JDS-001-2012” Class I-C (1kV to < 2kV) ESDCDM Charge Device Model, “JESD 22-C101-E” Class II (200V to < 500V) Rev 1.2 07/2017 BCM6123xD1E1368yzz General Characteristics (Cont.) Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of -40°C ≤ TINTERNAL ≤ 125°C (T-Grade); all other specifications are at TINTERNAL = 25ºC unless otherwise noted. Attribute Symbol Conditions / Notes Min Typ Max Unit 135 °C Soldering[1] Peak Temperature Top Case Safety Isolation Voltage / Dielectric test VHIPOT PRIMARY to SECONDARY 4,242 PRIMARY to CASE 2,121 SECONDARY to CASE 2,121 Isolation Capacitance CPRI_SEC Unpowered Unit 620 Insulation Resistance RPRI_SEC At 500VDC 10 MTBF VDC 780 MIL-HDBK-217Plus Parts Count - 25°C Ground Benign, Stationary, Indoors / Computer 5.61 MHrs Telcordia Issue 2 - Method I Case III; 25°C Ground Benign, Controlled 1.73 MHrs cURus UL 60950-1 CE Marked for Low Voltage Directive and RoHS Recast Directive, as applicable Previous Part Numbers BCM384x120y800ACz BCM384x120y800AC1 [1] Product is not intended for reflow solder attach. BCM® Bus Converter Page 22 of 30 pF MΩ cTUVus EN 60950-1 Agency Approvals / Standards 940 Rev 1.2 07/2017 BCM6123xD1E1368yzz PMBus™ System Diagram -OUT BCM SER-OUT -IN BCM SEC-IN-B PRI-OUT-B PRI-IN-C SEC-OUT-C PRI-COM RXD1 RXD4 VDDB RXD3 VDD RXD2 SEC-COM NC D44TL1A0 RXD1 VDD 5V EXT TXD4 NC NC TXD3 SSTOP 3 kΩ SDA TX D 1 ’ NC SEC-IN-A PRI-OUT-A SDA NC SER-IN SCL BCM EN NC Digital Isolator SGND SCL 3 kΩ VDD CP D Q SGND VCC D Flip-flop NC SADDR NC NC TXD1 TXD2 74LVC1G74DC 10 kΩ FDG6318P R2 10 kΩ EN Control 3.3V, at least 20mA when using 4xDISO Ref to Digital Isolator datasheet for more details SD RD Q SDA SCL Host µc PMBus R1 SGND The PMBus communication enabled bus converter provides accurate telemetry monitoring and reporting, threshold and warning limits adjustment, in addition to corresponding status flags. The BCM internal µC is referenced to primary ground. The Digital Isolator allows UART communication interface with the host Digital Supervisor at typical speed of 750kHz across the isolation barrier. One of the advantages of the Digital Isolator is its low power consumption. Each transmission channel is able to draw its internal bias circuitry directly from the input signal being transmitted to the output with minimal to no signal distortion. The Digital Supervisor provides the host system µC with access to an array of up to 4 BCMs. This array is constantly polled for status by the Digital Supervisor. Direct communication to individual BCM is enabled by a page command. For example, the page (0x00) prior to a telemetry inquiry points to the Digital Supervisor data and pages (0x01 – 0x04) prior to a telemetry inquiry points to the array of BCMs connected data. The Digital Supervisor constantly polls the BCM data through the UART interface. The Digital Supervisor enables the PMBus compatible host interface with an operating bus speed of up to 400kHz. The Digital Supervisor follows the PMBus command structure and specification. Please refer to the Digital Supervisor data sheet for more details. BCM® Bus Converter Page 23 of 30 Rev 1.2 07/2017 BCM6123xD1E1368yzz BCM in a ChiP RSEC 0.124nH LPRI_IN_LEADS = 7nH + CPRI_INT_ESR 31.8mΩ CPRI_INT C 0.25µFIN VVPRIIN RCIN + + IPRI_Q IQ 24mA – RCCSEC_INT_ESR OUT 122mΩ V•I 1/32 • ISEC LSEC_OUT_LEADS = 0.64nH ROUT OUT K – 2.3mΩ I ISEC + 106µΩ 1/32 • VPRI CSEC_INT COUT 104µF – LPRI_INT = 0.56µH VSEC VOUT – Figure 19 — BCM AC model The BCM uses a high frequency resonant tank to move energy from primary to secondary and vice versa. The resonant LC tank, operated at high frequency, is amplitude modulated as a function of the primary voltage and the secondary current. A small amount of capacitance embedded in the primary and secondary stages of the module is sufficient for full functionality and is key to achieving high power density. The effective DC voltage transformer action provides additional interesting attributes. Assuming that RSEC = 0Ω and IPRI_Q = 0A, Eq. (3) now becomes Eq. (1) and is essentially load independent, resistor R is now placed in series with VPRI. The BCM6123xD1E1368yzz can be simplified into the model shown in Figure 19. R Vin V PRI At no load: VSEC = VPRI • K VSEC The relationship between VPRI and VSEC becomes: VSEC = (VPRI – IPRI • R) • K In the presence of a load, VSEC is represented by: VSEC = VPRI • K – ISEC • RSEC (3) IPRI – IPRI_Q K VSEC = VPRI • K – ISEC • R • K2 (4) RSEC represents the impedance of the BCM, and is a function of the RDS_ON of the primary and secondary MOSFETs and the winding resistance of the power transformer. IPRI_Q represents the quiescent current of the BCM controller, gate drive circuitry and core losses. BCM® Bus Converter Page 24 of 30 (5) Substituting the simplified version of Eq. (4) (IPRI_Q is assumed = 0A) into Eq. (5) yields: and ISEC is represented by: ISEC = Vout V SEC Figure 20 — K = 1/32 BCM with series primary resistor (2) VPRI BCM SAC 1/32 KK == 1/32 (1) K represents the “turns ratio” of the BCM. Rearranging Eq (1): K= + – (6) This is similar in form to Eq. (3), where RSEC is used to represent the characteristic impedance of the BCM. However, in this case a real resistor, R, on the primary side of the BCM is effectively scaled by K 2 with respect to the secondary. Assuming that R = 1Ω, the effective R as seen from the secondary side is 0.98mΩ, with K = 1/32. Rev 1.2 07/2017 BCM6123xD1E1368yzz A similar exercise can be performed with the additon of a capacitor or shunt impedance at the primary of the BCM. A switch in series with VPRI is added to the circuit. This is depicted in Figure 21. A change in VPRI with the switch closed would result in a change in S VVin PRI + – BCM SAC K = 1/32 K = 1/32 C V SEC Vout Low impedance is a key requirement for powering a high‑current, low-voltage load efficiently. A switching regulation stage should have minimal impedance while simultaneously providing appropriate filtering for any switched current. The use of a BCM between the regulation stage and the point of load provides a dual benefit of scaling down series impedance leading back to the source and scaling up shunt capacitance or energy storage as a function of its K factor squared. However, these benefits are not achieved if the series impedance of the BCM is too high. The impedance of the BCM must be low, i.e., well beyond the crossover frequency of the system. A solution for keeping the impedance of the SAC low involves switching at a high frequency. This enables the use of small magnetic components because magnetizing currents remain low. Small magnetics mean small path lengths for turns. Use of low loss core material at high frequencies also reduces core losses. Figure 21 — BCM with primary capacitor The two main terms of power loss in the BCM are: capacitor current according to the following equation: IC (t) = C dVPRI nn No load power dissipation (PPRI_NL): defined as the power used to power up the module with an enabled powertrain at no load. nn Resistive loss (PRSEC): refers to the power loss across the BCM modeled as pure resistive impedance. (7) dt Assume that with the capacitor charged to VPRI, the switch is opened and the capacitor is discharged through the idealized BCM. In this case, Therefore, (8) IC = ISEC • K PSEC_OUT = PPRI_IN – PDISSIPATED = PPRI_IN – PPRI_NL – PRSEC (11) substituting Eq. (1) and (8) into Eq. (7) reveals: ISEC(t) = C K2 • dVSEC The above relations can be combined to calculate the overall module efficiency: (9) dt η= K2 The equation in terms of the secondary has yielded a scaling factor for C, specified in the denominator of the equation. A K factor less than unity results in an effectively larger capacitance on the secondary when expressed in terms of the primary. With K = 1/32 as shown in Figure 21, C = 1µF would appear as C = 1024µF when viewed from the secondary. = PSEC_OUT PPRI_IN Rev 1.2 07/2017 = PPRI_IN – PPRI_NL – PRSEC PPRI_IN VPRI • IPRI – PPRI_NL – (ISEC)2 • RSEC = 1– BCM® Bus Converter Page 25 of 30 (10) PDISSIPATED = PPRI_NL + PRSEC VPRI • IPRI ( ) PPRI_NL + (ISEC)2 • RSEC VPRI • IPRI (12) BCM6123xD1E1368yzz Input and Output Filter Design Thermal Considerations A major advantage of BCM systems versus conventional PWM converters is that the transformer based BCM does not require external filtering to function properly. The resonant LC tank, operated at extreme high frequency, is amplitude modulated as a function of primary voltage and secondary current and efficiently transfers charge through the isolation transformer. A small amount of capacitance embedded in the primary and secondary stages of the module is sufficient for full functionality and is key to achieving power density. The ChiP module provides a high degree of flexibility in that it presents three pathways to remove heat from the internal power dissipating components. Heat may be removed from the top surface, the bottom surface and the leads. The extent to which these three surfaces are cooled is a key component in determining the maximum current that is available from a ChiP, as can be seen from Figure 1. This paradigm shift requires system design to carefully evaluate external filters in order to: nn Guarantee low source impedance: To take full advantage of the BCM’s dynamic response, the impedance presented to its primary terminals must be low from DC to approximately 5MHz. The connection of the bus converter module to its power source should be implemented with minimal distribution inductance. If the interconnect inductance exceeds 100nH, the input should be bypassed with a RC damper to retain low source impedance and stable operation. With an interconnect inductance of 200nH, the RC damper may be as high as 1µF in series with 0.3Ω. A single electrolytic or equivalent low-Q capacitor may be used in place of the series RC bypass. Since the ChiP has a maximum internal temperature rating, it is necessary to estimate this internal temperature based on a system-level thermal solution. Given that there are three pathways to remove heat from the ChiP, it is helpful to simplify the thermal solution into a roughly equivalent circuit where power dissipation is modeled as a current source, isothermal surface temperatures are represented as voltage sources and the thermal resistances are represented as resistors. Figure 22 shows the “thermal circuit” for a 6123 ChiP BCM in an application where the top, bottom, and leads are cooled. In this case, the BCM power dissipation is PDTOTAL and the three surface temperatures are represented as TCASE_TOP, TCASE_BOTTOM, and TLEADS. This thermal system can now be very easily analyzed using a SPICE simulator with simple resistors, voltage sources, and a current source. The results of the simulation provide an estimate of heat flow through the various dissipation pathways as well as internal temperature. nn Further reduce primary and/or secondary voltage ripple without sacrificing dynamic response: Thermal Resistance Top Given the wide bandwidth of the module, the source response is generally the limiting factor in the overall system response. Anomalies in the response of the primary source will appear at the secondary of the module multiplied by its K factor. nn Protect the module from overvoltage transients imposed by the system that would exceed maximum ratings and induce stresses: The module primary/secondary voltage ranges shall not be exceeded. An internal overvoltage lockout function prevents operation outside of the normal operating primary range. Even when disabled, the powertrain is exposed to the applied voltage and the power MOSFETs must withstand it. Total load capacitance at the secondary of the BCM shall not exceed the specified maximum. Owing to the wide bandwidth and low secondary impedance of the module, low-frequency bypass capacitance and significant energy storage may be more densely and efficiently provided by adding capacitance at the primary of the module. At frequencies <500kHz the module appears as an impedance of RSEC between the source and load. Within this frequency range, capacitance at the primary appears as effective capacitance on the secondary per the relationship defined in Eq. (13). CSEC_EXT = CPRI_EXT K2 MAX INTERNAL TEMP θINT-TOP Thermal Resistance Bottom Thermal Resistance Leads θINT-BOTTOM Power Dissipation (W) TCASE_BOTTOM(°C) θINT-LEADS + – TLEADS(°C) + – + – Figure 22 — Top case, Bottom case and leads thermal model Alternatively, equations can be written around this circuit and analyzed algebraically: TINT – PD1 • θINT-TOP = TCASE_TOP TINT – PD2 • θINT-BOTTOM = TCASE_BOTTOM TINT – PD3 • θINT-LEADS = TLEADS PDTOTAL = PD1+ PD2+ PD3 Where TINT represents the internal temperature and PD1, PD2, and PD3 represent the heat flow through the top side, bottom side, and leads, respectively. Thermal Resistance Top (13) MAX INTERNAL TEMP θINT-TOP Thermal Resistance Bottom θINT-BOTTOM This enables a reduction in the size and number of capacitors used in a typical system. Power Dissipation (W) TCASE_BOTTOM(°C) Thermal Resistance Leads θINT-LEADS TLEADS(°C) Figure 23 — Top case and leads thermal model BCM® Bus Converter Page 26 of 30 TCASE_TOP(°C) Rev 1.2 07/2017 + – TCASE_TOP(°C) + – BCM6123xD1E1368yzz Figure 23 shows a scenario where there is no bottom side cooling. In this case, the heat flow path to the bottom is left open and the equations now simplify to: VPRI TINT – PD1 • θINT-TOP = TCASE_TOP ZIN_EQ1 BCM®1 ZOUT_EQ1 R0_1 VSEC TINT – PD3 • θINT-LEADS = TLEADS PDTOTAL = PD1+ PD3 ZIN_EQ2 BCM®2 ZOUT_EQ2 R0_2 + DC Thermal Resistance Top Load MAX INTERNAL TEMP θINT-TOP Thermal Resistance Bottom Thermal Resistance Leads θINT-BOTTOM Power Dissipation (W) TCASE_BOTTOM(°C) θINT-LEADS TLEADS(°C) ZIN_EQn TCASE_TOP(°C) + – Figure 25 — BCM parallel array Fuse Selection Figure 24 shows a scenario where there is no bottom side and leads cooling. In this case, the heat flow paths to the bottom and leads are left open and the equations now simplify to: In order to provide flexibility in configuring power systems, ChiP modules are not internally fused. Input line fusing of ChiP products is recommended at the system level to provide thermal protection in case of catastrophic failure. TINT – PD1 • θINT-TOP = TCASE_TOP PDTOTAL = PD1 The fuse shall be selected by closely matching system requirements with the following characteristics: Please note that Vicor has a suite of online tools, including a simulator and thermal estimator that greatly simplify the task of determining whether or not a BCM thermal configuration is valid for a given condition. These tools can be found at: http://www.vicorpower.com/powerbench. nn Current rating (usually greater than maximum current of BCM) nn Maximum voltage rating (usually greater than the maximum possible input voltage) nn Ambient temperature Current Sharing nn Nominal melting I2t The performance of the BCM topology is based on efficient transfer of energy through a transformer without the need of closed loop control. For this reason, the transfer characteristic can be approximated by an ideal transformer with a positive temperature coefficient series resistance. nn Recommend fuse: See safety agency approvals. Reverse Operation This type of characteristic is close to the impedance characteristic of a DC power distribution system both in dynamic (AC) behavior and for steady state (DC) operation. When multiple BCMs of a given part number are connected in an array, they will inherently share the load current according to the equivalent impedance divider that the system implements from the power source to the point of load. Ensuring equal current sharing among modules requires that BCM array impedances be matched. nn Dedicate common copper planes within the PCB to deliver and return the current to the modules. BCMs are capable of reverse power operation. Once the unit is started, energy will be transferred from the secondary back to the primary whenever the secondary voltage exceeds VPRI • K. The module will continue operation in this fashion for as long as no faults occur. Transient operation in reverse is expected in cases where there is significant energy storage on the output and transient voltages appear on the input. The BCM6123xD1E1368y0R and BCM6123xD1E1368y0P are both qualified for continuous operation in reverse power condition. A primary voltage of VPRI_DC > VPRI_UVLO+_R must be applied first to allow the primary reference controller and power train to start. Continuous operation in reverse is then possible after a successful startup. nn Provide as symmetric a PCB layout as possible among modules nn A dedicated input filter for each BCM in an array is required to prevent circulating currents. For further details see: AN:016 Using BCM Bus Converters in High Power Arrays. BCM® Bus Converter Page 27 of 30 ZOUT_EQn R0_n Figure 24 — Top case thermal model Some general recommendations to achieve matched array impedances include: BCM®n Rev 1.2 07/2017 BCM6123xD1E1368yzz BCM Through Hole Package Mechanical Drawing and Recommended Land Pattern 12.57 .495 11.81 .465 0 2.03 .080 (9) PL. 0 2.03 .080 (9) PL. 11.43 .450 11.81 .465 25.14±.38 .990±.015 27.21 1.071 (2) PL. 21.94 .864 (2) PL. 17.09 .673 (2) PL. 30.50 1.201 12.52 .493 (2) PL. 7.94 .312 (2) PL. 0 1.49 .058 (2) PL. 0 61.00±.13 2.402±.005 1.02 .040 (3) PL. 1.02 .040 (3) PL. 0 0 3.37 .132 (2) PL. 6.76 .266 (2) PL. 18.05 .710 (2) PL. 20.84 .820 (2) PL. 27.55 1.085 (2) PL. 0 0 23.64 .931 (2) PL. TOP VIEW (COMPONENT SIDE) BOTTOM VIEW .05 [.002] NOTES: .41 .016 (24) PL. 0 11.81±.08 .465±.003 4.17 .164 (24) PL. 1- RoHS COMPLIANT PER CST-0001 LATEST REVISION. 2- UNLESS OTHERWISE SPECIFIED DIMENSIONS ARE : MM / [INCH] +VSEC 21.94±.08 .864±.003 (2) PL. 12.52±.08 .493±.003 (2) PL. 6.76±.08 .266±.003 (2) PL. 2.54±.08 .100±.003 PLATED THRU .38 [.015] ANNULAR RING (18) PL. 20.84±.08 .820±.003 (2) PL. 27.55±.08 1.085±.003 (2) PL. 0 -VSEC1 -VSEC2 -VSEC1 -VSEC2 +VSEC +VSEC +VSEC +VSEC -VSEC1 -VSEC2 -VSEC1 -VSEC2 +VSEC 17.09±.08 .673±.003 (2) PL. 7.94±.08 .312±.003 (2) PL. 0 +VSEC +VPRI TM/SER-OUT +VPRI +VPRI EN VAUX/SER-IN +VPRI -VPRI RECOMMENDED HOLE PATTERN (COMPONENT SIDE) BCM® Bus Converter Page 28 of 30 27.21±.08 1.071±.003 (2) PL. +VSEC 0 3.37±.08 .132±.003 (2) PL. 11.81±.08 .465±.003 SEATING PLANE 7.21±.10 .284±.004 Rev 1.2 07/2017 1.49±.08 .058±.003 (2) PL. 1.52±.08 .060±.003 PLATED THRU .25 [.010] ANNULAR RING (6) PL. 18.05±.08 .710±.003 (2) PL. 23.64±.08 .931±.003 (2) PL. BCM6123xD1E1368yzz Revision History Revision Date Description 1.0 08/04/16 Release of current data sheet with new part number n/a 1.1 04/20/17 Revised reverse direction output resistance min and max Include 3 phase AIM Typical Application Content improvements 8 3 All 1.2 07/28/17 Updated height specification Please note: Page added in Rev 1.1 BCM® Bus Converter Page 29 of 30 Rev 1.2 07/2017 Page Number(s) 1, 21, 28 BCM6123xD1E1368yzz Vicor’s comprehensive line of power solutions includes high density AC-DC and DC-DC modules and accessory components, fully configurable AC-DC and DC-DC power supplies, and complete custom power systems. Information furnished by Vicor is believed to be accurate and reliable. However, no responsibility is assumed by Vicor for its use. Vicor makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication. Vicor reserves the right to make changes to any products, specifications, and product descriptions at any time without notice. Information published by Vicor has been checked and is believed to be accurate at the time it was printed; however, Vicor assumes no responsibility for inaccuracies. Testing and other quality controls are used to the extent Vicor deems necessary to support Vicor’s product warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. Specifications are subject to change without notice. Visit http://www.vicorpower.com/dc-dc/isolated-fixed-ratio/hv-bus-converter-module for the latest product information. Vicor’s Standard Terms and Conditions and Product Warranty All sales are subject to Vicor’s Standard Terms and Conditions of Sale, and Product Warranty which are available on Vicor’s webpage (http://www.vicorpower.com/termsconditionswarranty) or upon request. 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All other trademarks, product names, logos and brands are property of their respective owners. BCM® Bus Converter Page 30 of 30 Rev 1.2 07/2017