PD-97806 ML1000605D 100V Input, Dual Output HIGH RELIABILITY RADIATION HARDENED LOW POWER DC-DC CONVERTER Description The ML-Series of isolated DC-DC converters for space applications are low power radiation hardened high reliability devices designed for hostile radiation environments such as those encountered by geostationary earth orbit satellites, deep space probes and communication systems. Features include small size, high efficiency, low weight, and a good tolerance to total ionizing dose, single event effects, and environmental stresses such as temperature extremes, mechanical shock, and vibration. All components are fully derated to meet the requirements of EEE-INST-002 (NASA) and ECSS-Q30-11A (ESA). Extensive documentation including worst case analysis, radiation susceptibility, thermal analysis, stress analysis, and reliability analysis are available. The ML-Series converter has two outputs – one positive and one negative - each is independently regulated via linear post regulators. The outputs are sequenced during turn-on and turn-off such that negative output comes up first at turn-on and stays up at turn-off until the positive output has decreased. The ML-series converters incorporate a fixed frequency flyback power converter and internal EMI filter that meets the requirements for most major satellite power buses. The converter includes isolated On/Off telecommand with associated status telemetry. The converter also includes input under voltage shut-down functionality. Due to the linear post regulation of the outputs, the MLSeries is well suited for use in RF-applications where low noise, high output voltage accuracy, and high CS attenuation is required. Each converter is provided as a complete board assembly for installation into the host equipment chassis. The board is conformal coated (except for mating surfaces) and is mounted in the host chassis using screws. The board outline is L x W x H: 70mm x 50mm x 18mm. The weight is less than 50 grams. www.irf.com Features n n n n n n n n n n n n n n n n n Total Dose > 100 krad(Si) SEE > 82 MeV.cm2/mg Low Weight < 50 grams 97V to 103V DC Input Range O/P 1: +6.0V (up to 500mA) O/P 2: -5.0V (up to 100mA) Output Ripple: < 1mVrms (100Hz - 50MHz) CS Rejection Input to Outputs: > 90dB (50Hz - 1.0MHz) 10MΩ @ 100VDC Isolation Input Under-Voltage Protection Meets Conducted Emission Requirements of Major Power Buses: 100Hz - 100kHz: 80dBuArms 100kHz - 10MHz: -20dB/decade 10MHz - 50MHz: 40dBuArms Short Circuit and Overload Protection Meets Derating Requirements of EEE-INST 002 and ECSS-Q-30-11A Isolated On/Off Control via High Level Pulse Command (Latching Relay) Status Telemetry (Relay Contact Type) Workmanship Per IPC-A610 Class 3 Board is Coated with ARATHANE-5750 Applications n Low Power RF Systems (like LNA) on-board Satellites Non-flight versions of the ML-Series converters are available for system development purposes. Variations in electrical specifications and screening to meet custom requirements can be accommodated. 1 04/22/13 ML1000605D (100V Input, Dual Output) Circuit Description Design Methodology The ML-Series converters utilize two-stage regulation with a flyback topology with a switching frequency of 140kHz for primary regulation and linear post regulation for each of the outputs. The ML-Series is developed using a proven conservative design methodology, which includes selecting radiation tolerant, and established reliability components and full derating to the requirements of EEE-INST-002 and ECSS-ST-11A. The Output power is limited under any load fault condition to approximately 120% of rated output. An overload condition on the positive output causes the converter output to behave like a constant current source with the output voltage dropping below nominal. An overload condition at the negative output causes the positive output to shut-down in order to protect RF-transistors in the load. The converter will resume normal operation when the load current is reduced below the current limit point. An under-voltage protection circuit prohibits the converter from operating when the line voltage is too low for safe operation. In case of an under voltage event the converter will not start when the input voltage returns to its nominal level before an Off-command followed by an On-command has been issued. The isolated On/Off telecommand is made with a latching relay and is intended for use with a 26V pulse command. A status telemetry derived from a spare set of contacts in the relay is used for status telemetry. For further information please refer to the ML-Series generic description available at www.irf.com. 2 www.irf.com ML1000605D (100V Input, Dual Output) Specifications Absolute Maximum Ratings Recommended Operating Conditions Input voltage range Output power Operating mounting point temperature (Note 10) Storage temperature Input voltage range (Note 9) Output power Operating mounting point temperature (Note 9) Cold start temperature -0.5Vdc to +120Vdc Internally limited -55°C to +100°C -55°C to +125°C Conditions Condition -55°C * Meets full derating Electrical Performance Characteristics Parameter +97Vdc to +103Vdc 0 to Max. Rated -40°C to +75°C * Limits -40°C ≤ Tc ≤ +75°C VIN = 100V DC ± 0.5%, CL = 0µF Unit Min Nom Max 97 100 103 V +5.970 +6.00 +6.030 V -4.975 -5.00 -5.025 unless otherwise specified Primary Input Voltage Note 1 Output voltage ( VOUT ) (O/P 1, O/P 2) +6.0V 1 -5.0V 1 +6.0V 2 -5.0V 2 +6.0V 3 -5.0V 3 0% ≤ IOUT ≤ 100% of rated load 0% ≤ IOUT ≤ 100% of rated load 0% ≤ IOUT ≤ 100% of rated load +5.940 +6.060 -4.950 -5.050 +5.880 6.120 -4.900 5.100 V V Output power ( POUT ) (O/P 1, O/P 2) +6.0V 1,2,3 3.0 VIN = 97, 100, 103V W 0.5 -5.0V Output current ( IOUT ) (O/P 1, O/P 2) +6.0V 1,2,3 0 500 0 100 IOUT = 10%, 50%, 100% rated -1.0 1.0 mV IOUT = 10%, 50%, 100% rated VIN = 97, 100, 103V -1.0 1.0 mV 1.0 mV 15 mA VIN = 97, 100, 103V -5.0V Line regulation ( VRLINE ) 1,2,3 Each output Load regulation ( VRLOAD ) 1,2,3 Each output mA VIN = 97, 100, 103V Cross regulation ( VRCROSS ) Input current 1,2,3 VIN = 97, 100, 103V, Note 1 1,2,3 IOUT = 0, commanded On 10 Commanded Off Switching frequency ( FS ) 2.0 1,2,3 Notes 1, 7 126 1,2,3 0% ≤ IOUT ≤ 100% of rated load 85 140 154 kHz 95 V 2.0 12 ms 1.0 8.0 Input under voltage Trig level Output Sequencing Turn-on delay O/P 2 to O/P 1 Turn-off delay O/P1 to O/P 2 1,2,3 IOUT ≥ 20% for Output 1 For Notes to Specifications, refer to page 5 www.irf.com 3 ML1000605D (100V Input, Dual Output) Electrical Performance Characteristics (continued) Conditions Parameter Condition Limits -40°C ≤ Tc ≤ +75°C VIN = 100V DC ± 0.5%, CL = 0µF Unit Min Nom Max unless otherwise specified Output ripple ( VRIP ) VIN = 97, 100, 103V Each output IOUT = 100% rated load +6.0V 1 Frequency domain 100Hz – 50MHz 1.0 Note 1 1.0 Time domain 100Hz – 50MHz 30 Notes 1, 2 30 -5.0V +6.0V 1,2 -5.0V mVrms mVpp Efficiency ( EFF ) For combined output power of IOUT = 20% rated load 37 38 1.75W IOUT = 50% rated load 52 54 3.50W IOUT = 100% rated load 60 62 Note 1 0.70W 1,2,3 % Telecommand I/F Pulse Voltage high +22 +30 Pulse Voltage low 1,2,3 -40 0.5 V Pulse duration 10 1000 ms V Telemetry Converter On 1,2,3 400 Converter Off 422 450 1.0 ohm Mohm Current Limit Point VOUT = 100mV below Nominal Each output +6.0V 1,2,3 -5.0V Output response to step load changes ( VTLD ) +6.0V 1,2,3 20% to / from 100% Load, Note 3 -5.0V 550 700 110 150 -70 -50 70 50 mA mV pk Recovery time, 20% to / from 100% Load , Notes 3, 4 step load changes ( TTLD ) +6.0 1,2,3 2.5 -5.0 ms 2.5 Turn-on Response Overshoot ( VOS ) +6.0V 1,2,3 10% Load, Full Load Note 5 60 -5.0V 2.0 Turn-on Delay Capacitive Load ( CL ) +6.0V -5.0V mV 50 1 10 IOUT = 100% rated load 100 No effect on DC performance 100 ms µF Notes 1, 6 Each output For Notes to Specifications, refer to page 5 4 www.irf.com ML1000605D (100V Input, Dual Output) Electrical Performance Characteristics Parameter Condition EMC conducted susceptibility 1 (Line rejection) Electromagnetic Interference (EMI), conducted emission (CE) Isolation 1 1 (continued) Conditions -40°C ≤ Tc ≤ +75°C VIN = 100V DC ± 0.5%, CL = 0µF unless otherwise specified IOUT = 100% rated load Primary power sine wave injection of 2Vp-p, 100Hz to 1MHz, Note 1 Limits Unit Min Nom 96 110 IOUT = 100% rated load, Notes 1, 7 Input to Output, any potential to telecommand input and any potential to telemetry output, test @ 100VDC dB Limits per Figures 4 and 5 10 Device Weight Failure Rate Max MIL-HDBK-217F2, SF, 35°C, Note 8 MΩ 50 g 60 FITs Notes: Specification and Electrical Performance Characteristics Tables 1. Parameter is tested as part of design characterization or after design changes. Thereafter, parameter shall be guaranteed to the limits specified. 2. Guaranteed for a D.C. to 50MHz bandwidth. Tested using a 10.7MHz bandwidth. 3. Load current step transition time ≥ 10 µs. 4. Recovery time is measured from the initiation of the transient to where V OUT has returned to within ±1% of its steady state value. 5. Turn-on delay time from application of telecommand pulse to the point where Output 2 = 98% of nominal output voltage. 6. Capacitive load may be any value from 0 to the maximum limit without compromising the output sequencing performance. A capacitive load in excess of the maximum limit may influence the output sequencing performance and start-up time, converter operation and dc performance will remain intact. 7. The switching frequency and 1st and 2nd harmonic of the input ripple is tested on every unit. 8. MIL-HDBK-217F2 stress-dependent method is used with 2 exceptions: For soldering a fixed failure rate at 0.035FIT is used and for power MOSFETs the dissipated power (instead of rated power) is used for the Pr parameter. 1 FIT is 1 failure in 109 hours. 9. The converter meets full derating per EEE-INST-002 and ECSS-Q-30-11A with the following exception: For Schottky diode JANS1N5819 a maximum derated junction temperature of +110°C. For EEE-INST-002 it is required that ceramic capacitors with a voltage stress below 10V shall be rated for minimum 100V - in the product such capacitors is rated for 50V minimum. 10. Although operation temperatures between -55°C to +100°C and -40°C to+75°C is guaranteed, no parameter limits are specified. Electrical Performance Characteristics - Definition of Conditions Condition Definition 1 2 3 Comment BOL @ +25°C interface temperature Initial setting BOL @ -40°C to +75°C interface temperature Initial setting and worst case temperature variation EOL @ -40°C to +75°C interface temperature Worst case performance including initial setting, temperature variation, aging and radiation degradation www.irf.com 5 ML1000605D (100V Input, Dual Output) Model Definition and Test Plans Model Definition Model Description Build Standard EBB The EBB is an electrical representative model. The PCB will be hand soldered by the engineering group. No staking and conformal coating is foreseen Preferably same type of EEE parts as intended for flight, but lower grade will be used for convenience. For resistors and capacitors different types with same basic characteristics may be used The EBB is intended to be used by customers in their proto type at equipment level. EBB models are built at IR’s Danish Design Center. EQM The EQM is an electrical and mechanical representative model. The EQM is intended to be used by customer in their EQM at equipment level. Flight standard for processes. Same type of EEE parts as intended for flight, but lower grade may be used for convenience. FM Flight standard models. Full flight standard Test Plan - A The EBB must pass the following tests: Test No. 6 Type of Test Location* Remarks 1 Electrical performance test, room temperature incl. Limited EMC test (CE 50kHz-1MHz) IRD Acceptance Test Procedure 2 Electrical performance test in temperature (Q-level) IRD Acceptance Test Procedure 3 Electrical performance test, room temperature incl. Limited EMC test (CE 50kHz-1MHz) IRD Acceptance Test Procedure 4 Final Inspection IRD General inspection Procedure www.irf.com ML1000605D (100V Input, Dual Output) Test Plan - B The EQM must pass the following tests: Test No. Type of Test Location* Remarks 1 Electrical performance test, room temperature incl. Limited EMC test (CE 50kHz-1MHz) IRSJ Acceptance Test Procedure 2 Thermal cycling with electrical monitoring of input and outputs (Q-level) IRSJ Acceptance Test Procedure 10 cycles 3 Electrical performance test in temperature (Q-level) IRSJ Acceptance Test Procedure 4 Random Vibration test in (Q-level) External test house Vibration Test Procedure 5 Electrical performance test, room temperature incl. Limited EMC test (CE 50kHz-1MHz) IRSJ Acceptance Test Procedure 6 Mechanical Measurements IRSJ Acceptance Test Procedure 7 Final Inspection IRSJ General inspection Procedure Test Plan - C The FM must pass the following tests: Test No. Type of Test Location* Remarks 1 Electrical performance test, room temperature incl. Limited EMC test (CE 50kHz-1MHz) IRSJ Acceptance test procedure 2 Electrical performance temperature (A-levels) in IRSJ Acceptance test procedure 3 Electrical performance test, room temperature incl. Limited EMC test (CE 50kHz-1MHz) IRSJ Acceptance test procedure 4 Electrical performance test, room temperature IRSJ Acceptance Test Procedure 5 Mechanical Measurements IRSJ Acceptance test procedure 6 Final Inspection IRSJ General inspection procedure test Note: Location* - IRD: IR’s Danish Design Center, Skovlunde, Denmark - IRSJ: IR’s Site in San Jose, California, USA www.irf.com 7 ML1000605D (100V Input, Dual Output) Radiation Performance TID The TID radiation performance is guaranteed by worst case analysis with radiation degradation data for each radiation sensitive component used in the DC-DC converter. For TID radiation verification testing (RVT) for each wafer lot for all sensitive components is part of the EEE parts requirements per table below. TID RVT Plan Table Component Type RVT Plan (applicable to all flight lots) JANS2N2222A LDRS 0.01 to 0.1 rad up to 200 krad per IR RVT plan JANS2N2907A LDRS 0.01 to 0.1 rad up to 200 krad per IR RVT plan JANSR2N7492T2 RVT by Manufacturer (HDR) IRHF57214SESCS RVT by Manufacturer (HDR) IRHLUB770Z4SCS RVT by Manufacturer (HDR) IRHLUB7970Z4SCS RVT by Manufacturer (HDR) LM124AWR RVT by Manufacturer (ELDRS) IS2-1009RH RVT by Manufacturer (HDR) LDRS 0.01 to 0.1 rad up to 100 krad per IR RVT plan UC1845A LDRS 0.01 to 0.1 rad/s up to 100kRad per IR RVT plan SEE The SEE radiation performance is guaranteed by a combination of derating and mitigation at circuit level. For mitigation at circuit level both theoretical analysis and testing with imposed SEE effects are performed. The applicable SEE and mitigation concept is presented in table below. The maximum output perturbation is 5% of the nominal output voltage during any SEE. Applicable SEE and Mitigation Methods Table Component Type Applicable SEE Mitigation Concept RH MOSFET SEGR Vds derating in combination with SEE SOA curves from manufacturer data sheet Op-Amp SET, 15us perturbation to rail Mitigation at circuit level (filtering) Voltage reference SET, 10us perturbation to rail Mitigation at circuit level (filtering) PWM SET, 15us perturbation to rail Mitigation at circuit level (filtering) Double Pulses Mitigation at circuit level (filtering, no saturation of magnetic parts) Missing Pulses Mitigation at circuit level (filtering, no saturation of magnetic parts) 8 www.irf.com ML1000605D (100V Input, Dual Output) EEE Parts Technical Standard For component screening and DPA rules, refer to the generic ML-Series data sheet at www.irf.com. Random Vibration Axis X, Y, Z Frequency Range (Hz) Level 20-100 +6 dB/oct 100-1600 0.5 SQR(g)/Hz 1600-2000 -12 dB/oct PSD Level (grms) Duration (S) 29.9 180 Fig 1- Block Diagram Primary Power Bus Int.Supply Input Filter Rectifier & Filter Rectifier & Filter Linear Regulator V1: +6V 500mA Start-Up Resistor TC ON Fly-Back Transformer Latching Relay TC OFF Rectifier & Filter on/off TM UVP Monitor & Latch Disable PWM Controller Output Sequencing Fly-Back Power Switch Current Shunt Internal aux Rectifier & Filter Negative Linear Regulator V2: -5V 100mA Grounding and Isolation Scheme Parameter Grounding & Isolation Performance Isolation: Primary to Secondary: Telecommand: Status TM: Grounding: www.irf.com > 10 MOhm // < 50nF Floating Floating Secondary return bound to chassis via multiple screw connections 9 ML1000605D (100V Input, Dual Output) Interface Schematics Fig 2 - Power Input: J1 PRIMARY POWER BUS R1 3 PRIMARY POWER BUS 11 L2 L1 L3 PRIMARY POWER BUS RETURN To Fly-back converter and Startup Circuit C1 CR1 1 R4 PRIMARY POWER BUS RETURN C8 9 C6 C9 C7 Component Component Type Package Value Voltage (V) C1 BR40 II RADIAL 0.56µF 200 C6 CDR33BX SMD 1210 27nF 100 C7 CDR33BX SMD 1210 27nF 100 C8 CDR33BX SMD 1210 27nF 100 C9 CDR33BX SMD 1210 27nF 100 CR1 1N5806US A- MFLF 2.5A 150 10 L1 R6.3 TOROID 2 X109.8µH L2 HIGH FLUX TOROID 90µH L3 HIGH FLUX TOROID 30µH R1 RWR81S RWR 9.09ohms 500 R4 RM1206B SMD 1206 21.5ohms 100 www.irf.com ML1000605D (100V Input, Dual Output) Fig 3 - TM / TC Interface: J1 TC On return 13 CR205 TC On TC Off R201 7 K1 CR206 6 R202 CR201 CR203 4 ON 9 OFF 5 CR202 From Input Filter 10 CR204 CR207 R218 CR208 14 R219 TC Off return Relay is shown ON R220 8 Status TM CR213 CR214 R203 R223 15 8 Status TM Return 3 From Primary AUX. 7 6 VC 1 2 C103 U101 PWM VR101 Component Component Type Package Value Voltage (V) CR201 CR202 1N6640US 1N6640US D-5D D-5D 0.3A 0.3A 75 75 CR203 CR204 1N6640US 1N6640US D-5D D-5D 0.3A 0.3A 75 75 CR205 CR206 1N6640US 1N6640US D-5D D-5D 0.3A 0.3A 75 75 CR207 CR208 1N6640US 1N6640US D-5D D-5D 0.3A 0.3A 75 75 CR213 CR204 1N6640US 1N6640US D-5D D-5D 75 75 C103 K201 CWR29 J422-26M SHOC SMD H TO-5 0.3A 0.3A 33µF R118 R119 RM1206B RM1206B SMD 1206 SMD 1206 21.5kohms 21.5kohms 100 100 R120 R123 RM1206B RM1206B SMD 1206 SMD 1206 21.5kohms 21.5kohms 100 100 R201 R202 RM1206B RM1206B SMD 1206 SMD 1206 215ohms 215ohms 100 100 VR101 1N4109UR-1 DO-213AA www.irf.com 25 26.5 15 11 ML1000605D (100V Input, Dual Output) EMI Performance Fig 4 - Typical Conducted Emission Performance at Power Input: Fig 5 - Typical Conducted Emission Performance at Output 1: 12 www.irf.com ML1000605D (100V Input, Dual Output) Power Conversion Efficiency Fig 6 - Typical Power Conversion Efficiency Vs +6V Output Current Parametric with -5V Output Current Typical Efficiency, Vin 100V, I/F temperature +75°C 65% 60% 55% 50% 45% 0.020A 0.050A 40% 0.100A 35% 0.10A 0.15A 0.20A 0.25A 0.30A 0.35A 0.40A 0.45A 0.50A +6V Output Current www.irf.com 13 ML1000605D (100V Input, Dual Output) Recommended Mounting Stud Design It is foreseen with a mounting stud design with circular mounting studs made out of aluminum with a diameter of 4.0mm and a treaded hole support mounting with M2 screws. 5pcs M2 screws are used for mounting the board. Mounting torque shall be 30Ncm ± 5.0Ncm. 14 www.irf.com ML1000605D (100V Input, Dual Output) Mechanical Interface www.irf.com 15 ML1000605D (100V Input, Dual Output) Pin Designation Tables Input Terminals Assignment List Output Terminals Assignment List Indent.: Input Terminals (Solder, Pins, Straight) Indent.: Output Terminals (Solder Pads) Pin # Pin # 1 9 2 10 3 11 4 12 5 13 6 14 7 15 8 Function Input Power Return Input Power Return Rerserved Rerserved Input Power Input Power Chasis (Ground) Voltage TM Chasis (Ground) TC On Return TC On TC Off Return TC Off TM Status Return TM Status Pin # 1 3 5 7 Pin # 2 4 6 8 Function V1 (Positive Output) Chasis (Ground) Chasis (Ground) V2 (Negative Output) Thermal Design Information The thermal design for the ML-Series is solely based on heat conduction through the mounting interfaces/mounting screws into the host equipment chassis. The maximum power loss during normal operation is 2.0W. The temperature profile for the board based on all screw mounting points kept at isothermal level is given below. 16 www.irf.com ML1000605D (100V Input, Dual Output) Part Numbering ML 100 06 05 D /XXX Model ML-Series Nominal Input Voltage 100 = 100V Output 1 Quality Level EBB = Elegant Bread Board Model EQM = Engineering Qualification Model Blank = Fight Model Number of Outputs D = Dual Outputs 06 = 6V Output 2 05 = 5V Application Information Standard Documentation n Interface Control Drawing n User’s Manual n End Item Data Package with CoC, Applicable Configuration, MIP Photo and Test Results Design Justification Documentation The following documentation can be made available upon request: n Worst Case Analysis n Parts Stress Analysis n Thermal Analysis n Mechanical Analysis n FMECA n Reliability Assessment n Declared Components List n Declared Materials List n Declared Process List WORLD HEADQUARTERS: 101 N, Sepulveda Blvd., El Segundo, California 90245, USA Tel: (310) 252-7105 IR SAN JOSE: 2520 Junction Avenue, San Jose, California 95134, USA Tel: (408) 434-5000 IR DENMARK: Literbuen10C, DK-2740 Skovlunde, Denmark, Tel: +45 4457 5010 Visit us at www.irf.com for sales contact information. Data and specifications subject to change without notice. 04/2013 www.irf.com 17