LM4927 www.ti.com SNAS318A – JUNE 2005 – REVISED APRIL 2006 LM4927 Boomer™ Audio Power Amplifier Series 2.5 Watt Fully Differential Audio Power Amplifier With Shutdown Check for Samples: LM4927 FEATURES DESCRIPTION • • The LM4927 is a fully differential audio power amplifier primarily designed for demanding applications in mobile phones and other portable communication device applications. It is capable of delivering 2.5 watts of continuous average power to a 4Ω load with less than 10% distortion (THD+N) from a 5VDC power supply. 1 23 • • • • • Fully Differential Amplification Available in Space-Saving Micro-Array WSON Package Ultra Low Current Shutdown Mode Can Drive Capacitive Loads up to 100pF Improved Pop & Click Circuitry Eliminates Noises During Turn-On and Turn-Off Transitions 2.4 - 5.5V Operation No Output Coupling Capacitors, Snubber Networks or Bootstrap Capacitors Required APPLICATIONS • • • Mobile Phones PDAs Portable Electronic Devices KEY SPECIFICATIONS • • • • Improved PSRR at 217Hz, 85dB (Typ) Power Output at 5.0V @ 10% THD (4Ω), 2.5W (Typ) Power Output at 3.3V @ 1% THD, 550mW (Typ) Shutdown Current, 0.1µA (Typ) Boomer audio power amplifiers were designed specifically to provide high quality output power with a minimal amount of external components. The LM4927 does not require output coupling capacitors or bootstrap capacitors, and therefore is ideally suited for mobile phone and other low voltage applications where minimal power consumption is a primary requirement. The LM4927 features a low-power consumption shutdown mode. To facilitate this, Shutdown may be enabled by logic low. Additionally, the LM4927 features an internal thermal shutdown protection mechanism. The LM4927 contains advanced pop & click circuitry which eliminates noises which would otherwise occur during turn-on and turn-off transitions. 1 2 3 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Boomer is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2005–2006, Texas Instruments Incorporated LM4927 SNAS318A – JUNE 2005 – REVISED APRIL 2006 www.ti.com Typical Application VDD CS 1 PF Ri + Rf -IN - Differential Input Vo2 + Shutdown Bias RL Common Mode 8: Bypass * Vo1 + Differential Input + +IN Ri - Rf GND Figure 1. Typical Audio Amplifier Application Circuit Connection Diagram SD 1 8 Vo- BYP 2 7 GND IN+ 3 6 VDD IN- 4 5 Vo+ Figure 2. 8 Pin WSON Package Top View See Package Number NGQ0008A These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 2 Submit Documentation Feedback Copyright © 2005–2006, Texas Instruments Incorporated Product Folder Links: LM4927 LM4927 www.ti.com SNAS318A – JUNE 2005 – REVISED APRIL 2006 Absolute Maximum Ratings (1) (2) Supply Voltage 6.0V −65°C to +150°C Storage Temperature −0.3V to VDD +0.3V Input Voltage Power Dissipation (3) Internally Limited (4) 2000V ESD Susceptibility ESD Susceptibility (5) 200V Junction Temperature 150°C Thermal Resistance θJA (SD) Soldering Information (6) See AN-1187 (SNOA401) (1) (2) (3) (4) (5) (6) 63°C/W Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication of device performance. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and specifications. The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature TA. The maximum allowable power dissipation is PDMAX = (TJMAX – TA) / θJA or the number given in Absolute Maximum Ratings, whichever is lower. For the LM4927, see power derating curve for additional information. Human body model, 100pF discharged through a 1.5kΩ resistor. Machine Model, 220pF – 240pF discharged through all pins. When driving 4Ω loads from a 5V power supply, the LM4927LD must be mounted to a circuit board with the exposed-DAP area soldered down to a 1in2 plane of 1oz, copper. Operating Ratings Temperature Range TMIN ≤ TA ≤ TMAX −40°C ≤ TA ≤ 85°C 2.4V ≤ VDD ≤ 5.5V Supply Voltage Submit Documentation Feedback Copyright © 2005–2006, Texas Instruments Incorporated Product Folder Links: LM4927 3 LM4927 SNAS318A – JUNE 2005 – REVISED APRIL 2006 www.ti.com Electrical Characteristics VDD = 5V (1) (2) The following specifications apply for VDD = 5V, AV = 1, and 8Ω load unless otherwise specified. Limits apply for TA = 25°C. Symbol Parameter Conditions LM4927 Typical (3) Limit (4) Units (Limits) IDD Quiescent Power Supply Current VIN = 0V, no load VIN = 0V, RL = 8Ω 2.2 2.2 4.5 4.5 mA (max) ISD Shutdown Current VSHUTDOWN = GND 0.1 1 µA (max) THD = 1% (max); f = 1 kHz RL = 4Ω RL = 8Ω 2.1 1.30 1.20 W (min) THD = 10% (max); f = 1 kHz RL = 4Ω RL = 8Ω 2.5 1.6 W Po = 1 Wrms; f = 1kHz 0.03 % Po Output Power THD+N Total Harmonic Distortion+Noise PSRR Power Supply Rejection Ratio Vripple = 200mV sine p-p f = 217Hz (5) 90 f = 1kHz (5) 85 71 dB (min) CMRR Common-Mode Rejection Ratio f = 217Hz, VCM = 200mVpp 60 VOS Output Offset VIN = 0V 4 VSDIH Shutdown Voltage Input High 1.4 V (min) VSDIL Shutdown Voltage Input Low 0.4 V (max) SNR Signal-to-noise ratio 37 kΩ (min) 47 kΩ (max) –0.68 1.4 dB (min) dB (max) PO = 1W, f = 1kHz Internal Feedback Resistance Ri = 40kΩ 40 AV Gain Ri = 40kΩ 0 TWU Wake-up time from Shutdown Cbypass = 1μF 14 (3) (4) (5) 4 mV 110 RF (1) (2) dB dB ms All voltages are measured with respect to the ground pin, unless otherwise specified. Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication of device performance. Typicals are measured at 25°C and represent the parametric norm. Limits are specified to Texas Instruments' AOQL (Average Outgoing Quality Level). 10Ω terminated input. Submit Documentation Feedback Copyright © 2005–2006, Texas Instruments Incorporated Product Folder Links: LM4927 LM4927 www.ti.com SNAS318A – JUNE 2005 – REVISED APRIL 2006 Electrical Characteristics VDD = 3V (1) (2) The following specifications apply for VDD = 3V, AV = 1, and 8Ω load unless otherwise specified. Limits apply for TA = 25°C. Symbol Parameter Conditions LM4927 Typical (3) Limit (4) Units (Limits) IDD Quiescent Power Supply Current VIN = 0V, no load VIN = 0V, RL = 8Ω 2 2 4.3 4.3 mA (max) ISD Shutdown Current VSHUTDOWN = GND 0.1 1 µA (max) Po Output Power THD+N Total Harmonic Distortion+Noise PSRR Power Supply Rejection Ratio THD = 1% (max); f = 1 kHz RL = 4Ω RL = 8Ω 0.650 0.450 W THD = 10% (max); f = 1 kHz RL = 4Ω RL = 8Ω 0.800 0.550 W Po = 0.25Wrms; f = 1kHz 0.04 % Vripple = 200mV sine p-p f = 217Hz (5) 85 f = 1kHz (5) 80 dB CMRR Common-Mode Rejection Ratio f = 217Hz, VCM = 200mVpp 60 VOS Output Offset VIN = 0V 4 VSDIH Shutdown Voltage Input High 1.4 V (min) VSDIL Shutdown Voltage Input Low 0.4 V (max) TWU Wake-up time from Shutdown (1) (2) (3) (4) (5) Cbypass 8 dB mV (max) ms All voltages are measured with respect to the ground pin, unless otherwise specified. Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication of device performance. Typicals are measured at 25°C and represent the parametric norm. Limits are specified to Texas Instruments' AOQL (Average Outgoing Quality Level). 10Ω terminated input. External Components Description (See Figure 1) Components Functional Description 1. CS Supply bypass capacitor which provides power supply filtering. Refer to the POWER SUPPLY BYPASSING section for information concerning proper placement and selection of the supply bypass capacitor. 2. CB Bypass pin capacitor which provides half-supply filtering. Refer to the section, PROPER SELECTION OF EXTERNAL COMPONENTS, for information concerning proper placement and selection of CB. 3. Ri Inverting input resistance which sets the closed-loop gain in conjunction with Rf. 4. Rf Internal feedback resistance which sets the closed-loop gain in conjunction with Ri. Submit Documentation Feedback Copyright © 2005–2006, Texas Instruments Incorporated Product Folder Links: LM4927 5 LM4927 SNAS318A – JUNE 2005 – REVISED APRIL 2006 www.ti.com Typical Performance Characteristics (1) 10 THD+N vs Frequency VDD = 2.6V, RL = 8Ω, PO = 150mW 10 1 THD+N (%) THD+N (%) 1 0.1 0.1 0.01 0.01 0.001 20 THD+N vs Frequency VDD = 2.6V, RL = 4Ω, PO = 150mW 100 1k 0.001 20 10k 20k 100 Figure 4. THD+N vs Frequency VDD = 5V, RL = 8Ω, PO = 1W THD+N vs Frequency VDD = 5V, RL = 4Ω, PO = 1W 10 1 1 THD+N (%) THD+N (%) Figure 3. 10 0.1 0.01 0.001 20 0.01 100 1k 0.001 20 10k 20k 100 Figure 6. THD+N vs Frequency VDD = 3V, RL = 8Ω, PO = 275mW THD+N vs Frequency VDD = 3V, RL = 4Ω, PO = 225mW 10 THD+N (%) THD+N (%) 1 0.1 0.1 0.01 100 1k 10k 20k 0.001 20 FREQUENCY (Hz) 100 1k 10k 20k FREQUENCY (Hz) Figure 7. 6 10k 20k Figure 5. 0.01 (1) 1k FREQUENCY (Hz) 1 0.001 20 10k 20k 0.1 FREQUENCY (Hz) 10 1k FREQUENCY (Hz) FREQUENCY (Hz) Figure 8. Data taken with BW = 80kHz and AV = 1/1 except where specified. Submit Documentation Feedback Copyright © 2005–2006, Texas Instruments Incorporated Product Folder Links: LM4927 LM4927 www.ti.com SNAS318A – JUNE 2005 – REVISED APRIL 2006 Typical Performance Characteristics(1) (continued) 10 THD+N vs Output Power VDD = 2.6V, RL = 8Ω 10 THD+N vs Output Power VDD = 2.6V, RL = 4Ω 20 kHz 20 kHz 1 THD+N (%) THD+N (%) 1 1 kHz 0.1 1 kHz 0.1 20 Hz 0.01 0.001 10m 20 Hz 0.01 100m 0.001 10m 1 OUTPUT POWER (W) 100m Figure 9. Figure 10. THD+N vs Output Power VDD = 5V, RL = 8Ω 1 20 kHz 0.1 1 kHz 10 1 kHz 20 Hz 20 Hz 0.01 100m 1 0.001 10m 2 OUTPUT POWER (W) 10 20 kHz 0.1 0.01 0.001 10m THD+N vs Output Power VDD = 5V, RL = 4Ω 1 THD+N (%) THD+N (%) 10 1 OUTPUT POWER (W) 100m 1 3 OUTPUT POWER (W) Figure 11. Figure 12. THD+N vs Output Power VDD = 3V, RL = 8Ω THD+N vs Output Power VDD = 3V, RL = 4Ω 10 20 kHz 20 kHz 1 1 kHz THD+N (%) THD+N (%) 1 1 kHz 0.1 0.1 20 Hz 20 Hz 0.01 0.001 10m 0.01 100m 1 0.001 10m OUTPUT POWER (W) 100m 1 OUTPUT POWER (W) Figure 13. Figure 14. Submit Documentation Feedback Copyright © 2005–2006, Texas Instruments Incorporated Product Folder Links: LM4927 7 LM4927 SNAS318A – JUNE 2005 – REVISED APRIL 2006 www.ti.com Typical Performance Characteristics(1) (continued) PSRR vs Frequency VDD = 3V, RL = 8Ω Inputs terminated to GND, BW = 500kHz 0 0 -10 -10 -20 -20 -30 -30 PSRR (dB) PSRR (dB) PSRR vs Frequency VDD = 5V, RL = 8Ω Inputs terminated to GND, BW = 500kHz -40 -50 -60 -40 -50 -60 -70 -70 -80 -80 -90 -90 -100 20 -100 20 100 1k 10k 100 100 1k FREQUENCY (Hz) 2 Figure 16. Output Power vs Supply Voltage RL = 8Ω Output Power vs Supply Voltage RL = 4Ω OUTPUT POWER (W) OUTPUT POWER (W) 1.6 1.4 1.2 10% THD+N 1 800m 1% THD+N 600m 400m 200m 0 2.4 3 3.5 4.5 4 5 5.5 3 2.8 2.6 2.4 2.2 2 1.8 1.6 1.4 1.2 1 800m 600m 400m 200m 0 2.4 SUPPLY VOLTAGE (V) 3 3.5 4.5 4 Figure 18. CMRR vs Frequency VDD = 5V, RL = 8Ω CMRR vs Frequency VDD = 3V, RL = 8Ω 5 5.5 0 -10 -20 -20 -30 -30 CMRR (dB) CMRR (dB) 1% THD+N Figure 17. -40 -50 -60 -40 -50 -60 -70 -70 -80 -80 -90 -90 100 1k 10k 20k -100 20 FREQUENCY (Hz) 100 1k 10k 20k FREQUENCY (Hz) Figure 19. 8 10% THD+N SUPPLY VOLTAGE (V) -10 -100 20 100 Figure 15. 1.8 0 10k FREQUENCY (Hz) Figure 20. Submit Documentation Feedback Copyright © 2005–2006, Texas Instruments Incorporated Product Folder Links: LM4927 LM4927 www.ti.com SNAS318A – JUNE 2005 – REVISED APRIL 2006 Typical Performance Characteristics(1) (continued) PSRR vs Common Mode Voltage VDD = 3V, RL = 8Ω, f = 217Hz -10 -10 -20 -20 -30 -30 -40 -50 -60 -40 -50 -60 -70 -70 -80 -80 -90 -90 -100 -100 0 1 0.5 1.5 2 2.5 PSRR vs Common Mode Voltage VDD = 5V, RL = 8Ω, f = 217Hz 0 PSRR (dB) PSRR (dB) 0 3 0 DC COMMON-MODE VOLTAGE (V) POWER DISSIPATION (W) 5 Power Dissipation vs Output Power VDD = 2.6V, RL = 8Ω and 4Ω Power Dissipation vs Output Power VDD = 5V, RL = 8Ω 1.4 RL = 4: 1.2 0.3 0.25 0.2 0.15 RL = 8: 0.1 RL = 4: 1.0 0.8 0.6 RL = 8: 0.4 0.2 0.05 0 0 0 0.1 0.2 0.3 0.5 0.4 0 0.6 0.5 OUTPUT POWER (W) 2.5 Figure 24. Power Derating Curve 1.4 0.45 1.2 POWER DISSIPATION (W) RL = 4: 0.35 0.3 0.25 0.2 RL = 8: 0.15 2.0 OUTPUT POWER (W) Power Dissipation vs Output Power VDD = 3V, RL = 8Ω 0.4 1.5 1.0 Figure 23. POWER DISSIPATION (W) 4 Figure 22. 0.35 0.5 3 2 Figure 21. POWER DISSIPATION (W) 0.4 1 DC COMMON-MODE VOLTAGE (V) 0.1 1.0 RL = 4: 0.8 0.6 0.4 RL = 8: 0.2 0.05 0 0 0 0.2 0.4 0.6 0.8 0 20 40 60 80 100 120 140 160 AMBIENT TEMPERATURE (°C) OUTPUT POWER (W) Figure 25. Figure 26. Submit Documentation Feedback Copyright © 2005–2006, Texas Instruments Incorporated Product Folder Links: LM4927 9 LM4927 SNAS318A – JUNE 2005 – REVISED APRIL 2006 www.ti.com Typical Performance Characteristics(1) (continued) Noise Floor VDD = 5V Vo1 + Vo2 10u Shutdown On 1u 100n 20 100 Noise Floor VDD = 3V 100u OUTPUT NOISE VOLTAGE (V) OUTPUT NOISE VOLTAGE (V) 100u 1k Vo1 + Vo2 10u Shutdown On 1u 100n 20 10k 20k 100 FREQUENCY (Hz) 1k 10k 20k FREQUENCY (Hz) Figure 27. Figure 28. Clipping Voltage vs Supply Voltage Output Power vs Load Resistance 3 0.8 5V, 10% THD+N 2.5 RL = 4: Top 0.6 OUTPUT POWER (W) DROPOUT VOLTAGE (V) 0.7 RL = 4: Bottom 0.5 0.4 0.3 RL = 8: Top 0.2 0 1.5 3V, 1% THD+N 1.5 2.6V, 10% THD+N 1.0 2.6V, 1% THD+N 0 2 2.5 3 3.5 4 4.5 5 5.5 6 4 8 12 16 20 24 28 32 LOAD RESISTANCE (:) SUPPLY VOLTAGE (V) Figure 29. 10 3V, 10% THD+N 0.5 RL = 8: Bottom 0.1 5V, 1% THD+N 2.0 Figure 30. Submit Documentation Feedback Copyright © 2005–2006, Texas Instruments Incorporated Product Folder Links: LM4927 LM4927 www.ti.com SNAS318A – JUNE 2005 – REVISED APRIL 2006 APPLICATION INFORMATION DIFFERENTIAL AMPLIFIER EXPLANATION The LM4927 is a fully differential audio amplifier that features differential input and output stages. Internally this is accomplished by two circuits: a differential amplifier and a common mode feedback amplifier that adjusts the output voltages so that the average value remains VDD / 2. When setting the differential gain, the amplifier can be considered to have "halves". Each half uses an input and feedback resistor (Ri1 and RF1) to set its respective closed-loop gain (see Figure 1). With Ri1 = Ri2 and RF1 = RF2, the gain is set at -RF / Ri for each half. This results in a differential gain of AVD = -RF/Ri (1) It is extremely important to match the input resistors to each other, as well as the feedback resistors to each other for best amplifier performance. See the PROPER SELECTION OF EXTERNAL COMPONENTS section for more information. A differential amplifier works in a manner where the difference between the two input signals is amplified. In most applications, this would require input signals that are 180° out of phase with each other. The LM4927 can be used, however, as a single ended input amplifier while still retaining its fully differential benefits. In fact, completely unrelated signals may be placed on the input pins. The LM4927 simply amplifies the difference between them. All of these applications provide what is known as a "bridged mode" output (bridge-tied-load, BTL). This results in output signals at Vo1 and Vo2 that are 180° out of phase with respect to each other. Bridged mode operation is different from the single-ended amplifier configuration that connects the load between the amplifier output and ground. A bridged amplifier design has distinct advantages over the single-ended configuration: it provides differential drive to the load, thus doubling maximum possible output swing for a specific supply voltage. Four times the output power is possible compared with a single-ended amplifier under the same conditions. This increase in attainable output power assumes that the amplifier is not current limited or clipped. In order to choose an amplifier's closed-loop gain without causing excess clipping, please refer to the AUDIO POWER AMPLIFIER DESIGN section. A bridged configuration, such as the one used in the LM4927, also creates a second advantage over singleended amplifiers. Since the differential outputs, Vo1 and Vo2, are biased at half-supply, no net DC voltage exists across the load. This assumes that the input resistor pair and the feedback resistor pair are properly matched (see PROPER SELECTION OF EXTERNAL COMPONENTS). BTL configuration eliminates the output coupling capacitor required in single-supply, single-ended amplifier configurations. If an output coupling capacitor is not used in a single-ended output configuration, the half-supply bias across the load would result in both increased internal IC power dissipation as well as permanent loudspeaker damage. Further advantages of bridged mode operation specific to fully differential amplifiers like the LM4927 include increased power supply rejection ratio, common-mode noise reduction, and click and pop reduction. EXPOSED-DAP PACKAGE PCB MOUNTING CONSIDERATIONS The LM4927's exposed-DAP (die attach paddle) package (WSON) provide a low thermal resistance between the die and the PCB to which the part is mounted and soldered. This allows rapid heat transfer from the die to the surrounding PCB copper traces, ground plane and, finally, surrounding air. Failing to optimize thermal design may compromise the LM4927's high power performance and activate unwanted, though necessary, thermal shutdown protection. The WSON package must have its DAP soldered to a copper pad on the PCB. The DAP's PCB copper pad is connected to a large plane of continuous unbroken copper. This plane forms a thermal mass and heat sink and radiation area. Place the heat sink area on either outside plane in the case of a two-sided PCB, or on an inner layer of a board with more than two layers. Connect the DAP copper pad to the inner layer or backside copper heat sink area with a thermal via. The via diameter should be 0.012in - 0.013in. Ensure efficient thermal conductivity by plating-through and solder-filling the vias. Best thermal performance is achieved with the largest practical copper heat sink area. In all circumstances and conditions, the junction temperature must be held below 150°C to prevent activating the LM4927's thermal shutdown protection. The LM4927's power de-rating curve in the Typical Performance Characteristics shows the maximum power dissipation versus temperature. Example PCB layouts are shown in the Demonstration Board Layout section. Further detailed and specific information concerning PCB layout, fabrication, and mounting an WSON package is available from Texas Instruments' package Engineering Group under application note AN1187. Submit Documentation Feedback Copyright © 2005–2006, Texas Instruments Incorporated Product Folder Links: LM4927 11 LM4927 SNAS318A – JUNE 2005 – REVISED APRIL 2006 www.ti.com PCB LAYOUT AND SUPPLY REGULATION CONSIDERATIONS FOR DRIVING 4Ω LOADS Power dissipated by a load is a function of the voltage swing across the load and the load's impedance. As load impedance decreases, load dissipation becomes increasingly dependent on the interconnect (PCB trace and wire) resistance between the amplifier output pins and the load's connections. Residual trace resistance causes a voltage drop, which results in power dissipated in the trace and not in the load as desired. This problem of decreased load dissipation is exacerbated as load impedance decreases. Therefore, to maintain the highest load dissipation and widest output voltage swing, PCB traces that connect the output pins to a load must be as wide as possible. Poor power supply regulation adversely affects maximum output power. A poorly regulated supply's output voltage decreases with increasing load current. Reduced supply voltage causes decreased headroom, output signal clipping, and reduced output power. Even with tightly regulated supplies, trace resistance creates the same effects as poor supply regulation. Therefore, making the power supply traces as wide as possible helps maintain full output voltage swing. POWER DISSIPATION Power dissipation is a major concern when designing a successful amplifer, whether the amplifier is bridged or single-ended. Equation 2 states the maximum power dissipation point for a single-ended amplifier operating at a given supply voltage and driving a specified output load. PDMAX = (VDD)2 / (2π2RL) Single-Ended (2) However, a direct consequence of the increased power delivered to the load by a bridge amplifier is an increase in internal power dissipation versus a single-ended amplifier operating at the same conditions. PDMAX = 4 * (VDD)2 / (2π2RL) Bridge Mode (3) Since the LM4927 has bridged outputs, the maximum internal power dissipation is 4 times that of a single-ended amplifier. Even with this substantial increase in power dissipation, the LM4927 does not require additional heatsinking under most operating conditions and output loading. From Equation 3, assuming a 5V power supply and an 8Ω load, the maximum power dissipation point is 625mW. The maximum power dissipation point obtained from Equation 3 must not be greater than the power dissipation results from Equation 4: PDMAX = (TJMAX - TA) / θJA (4) The LM4927's θJA in an NGQ0008A package is 63°C/W. Depending on the ambient temperature, TA, of the system surroundings, Equation 4 can be used to find the maximum internal power dissipation supported by the IC packaging. If the result of Equation 3 is greater than that of Equation 4, then either the supply voltage must be decreased, the load impedance increased, the ambient temperature reduced, or the θJA reduced with heatsinking. In many cases, larger traces near the output, VDD, and GND pins can be used to lower the θJA. The larger areas of copper provide a form of heatsinking allowing higher power dissipation. For the typical application of a 5V power supply, with an 8Ω load, the maximum ambient temperature possible without violating the maximum junction temperature is approximately 110°C provided that device operation is around the maximum power dissipation point. Recall that internal power dissipation is a function of output power. If typical operation is not around the maximum power dissipation point, the LM4927 can operate at higher ambient temperatures. Refer to the Typical Performance Characteristics curves for power dissipation information. POWER SUPPLY BYPASSING As with any power amplifier, proper supply bypassing is critical for low noise performance and high power supply rejection ratio (PSRR). The capacitor location on both the bypass and power supply pins should be as close to the device as possible. A larger half-supply bypass capacitor improves PSRR because it increases half-supply stability. Typical applications employ a 5V regulator with 10µF and 0.1µF bypass capacitors that increase supply stability. This, however, does not eliminate the need for bypassing the supply nodes of the LM4927. The LM4927 will operate without the bypass capacitor CB, although the PSRR may decrease. A 1µF capacitor is recommended for CB. This value maximizes PSRR performance. Lesser values may be used, but PSRR decreases at frequencies below 1kHz. The issue of CB selection is thus dependant upon desired PSRR and click and pop performance as explained in the section PROPER SELECTION OF EXTERNAL COMPONENTS. 12 Submit Documentation Feedback Copyright © 2005–2006, Texas Instruments Incorporated Product Folder Links: LM4927 LM4927 www.ti.com SNAS318A – JUNE 2005 – REVISED APRIL 2006 SHUTDOWN FUNCTION In order to reduce power consumption while not in use, the LM4927 contains shutdown circuitry that is used to turn off the amplifier's bias circuitry. The device may then be placed into shutdown mode by toggling the Shutdown Select pin to logic low. The trigger point for shutdown is shown as a typical value in the Supply Current vs Shutdown Voltage graphs in the Typical Performance Characteristics section. It is best to switch between ground and supply for maximum performance. While the device may be disabled with shutdown voltages in between ground and supply, the idle current may be greater than the typical value of 0.1µA. In either case, the shutdown pin should be tied to a definite voltage to avoid unwanted state changes. In many applications, a microcontroller or microprocessor output is used to control the shutdown circuitry, which provides a quick, smooth transition to shutdown. Another solution is to use a single-throw switch in conjunction with an external pull-up resistor. This scheme ensures that the shutdown pin will not float, thus preventing unwanted state changes. PROPER SELECTION OF EXTERNAL COMPONENTS Proper selection of external components in applications using integrated power amplifiers is critical when optimizing device and system performance. Although the LM4927 is tolerant to a variety of external component combinations, consideration of component values must be made when maximizing overall system quality. The LM4927 is unity-gain stable, giving the designer maximum system flexibility. The LM4927 should be used in low closed-loop gain configurations to minimize THD+N values and maximize signal to noise ratio. Low gain configurations require large input signals to obtain a given output power. Input signals equal to or greater than 1Vrms are available from sources such as audio codecs. Please refer to the Audio Power Amplifier Design section for a more complete explanation of proper gain selection. When used in its typical application as a fully differential power amplifier the LM4927 does not require input coupling capacitors for input sources with DC common-mode voltages of less than VDD. Exact allowable input common-mode voltage levels are actually a function of VDD, Ri, and Rf and may be determined by Equation 5: VCMi < (VDD-1.2)*((Rf+(Ri)/(Rf)-VDD*(Ri / 2Rf) -RF / RI = AVD (5) (6) Special care must be taken to match the values of the input resistors (Ri1 and Ri2) to each other. Because of the balanced nature of differential amplifiers, resistor matching differences can result in net DC currents across the load. This DC current can increase power consumption, internal IC power dissipation, reduce PSRR, and possibly damaging the loudspeaker. The chart below demonstrates this problem by showing the effects of differing values between the feedback resistors while assuming that the input resistors are perfectly matched. The results below apply to the application circuit shown in Figure 1, and assumes that VDD = 5V, RL = 8Ω, and the system has DC coupled inputs tied to ground. Tolerance Ri1 Ri2 V02 - V01 ILOAD 20% 0.8R 1.2R -0.500V 62.5mA 10% 0.9R 1.1R -0.250V 31.25mA 5% 0.95R 1.05R -0.125V 15.63mA 1% 0.99R 1.01R -0.025V 3.125mA 0% R R 0 0 Since the same variations can have a significant effect on PSRR and CMRR performance, it is highly recommended that the input resistors be matched to 1% tolerance or better for best performance. Submit Documentation Feedback Copyright © 2005–2006, Texas Instruments Incorporated Product Folder Links: LM4927 13 LM4927 SNAS318A – JUNE 2005 – REVISED APRIL 2006 www.ti.com AUDIO POWER AMPLIFIER DESIGN Design a 1W/8Ω Audio Amplifier Given: Power Output 1Wrms Load Impedance 8Ω Input Level 1Vrms Input Impedance 20kΩ Bandwidth 100Hz–20kHz ± 0.25dB A designer must first determine the minimum supply rail to obtain the specified output power. The supply rail can easily be found by extrapolating from the Output Power vs Supply Voltage graphs in the Typical Performance CharacteristicsTypical Performance Characteristics (1) section. A second way to determine the minimum supply rail is to calculate the required VOPEAK using Equation 7 and add the dropout voltages. Using this method, the minimum supply voltage is (Vopeak + (VDO TOP + (VDO BOT )), where VDO BOT and VDO TOP are extrapolated from the Dropout Voltage vs Supply Voltage curve in the Typical Performance Characteristics section. (7) Using the Output Power vs Supply Voltage graph for an 8Ω load, the minimum supply rail just about 5V. Extra supply voltage creates headroom that allows the LM4927 to reproduce peaks in excess of 1W without producing audible distortion. At this time, the designer must make sure that the power supply choice along with the output impedance does not violate the conditions explained in the POWER DISSIPATION section. Once the power dissipation equations have been addressed, the required differential gain can be determined from Equation 8. (8) (9) Rf / Ri = AVD From Equation 7, the minimum AVD is 2.83. A ratio of Rf to Ri of 2.83 gives Ri = 14kΩ. The final design step is to address the bandwidth requirement which must be stated as a single -3dB frequency point. Five times away from a -3dB point is 0.17dB down from passband response which is better than the required ±0.25dB specified. fH = 20kHz * 5 = 100kHz (10) The high frequency pole is determined by the product of the desired frequency pole, fH , and the differential gain, AVD . With a AVD = 2.83 and fH = 100kHz, the resulting GBWP = 150kHz which is much smaller than the LM4927 GBWP of 10MHz. This figure displays that if a designer has a need to design an amplifier with a higher differential gain, the LM4927 can still be used without running into bandwidth limitations. Revision History (1) 14 Rev Date Description 0.1 06/01/05 1st time WEB release for this project. (MC) 0.2 04/07/06 Edited the Rf spec (5V EC table) to reveal max and min limits of 47 and 37 kΩ respectively (per Bic and Daniel). 0.3 04/14/06 Added Ri = 40kohm (Conditions for Rf) per Bic and WC Pua, then re-released D/S. Data taken with BW = 80kHz and AV = 1/1 except where specified. Submit Documentation Feedback Copyright © 2005–2006, Texas Instruments Incorporated Product Folder Links: LM4927 PACKAGE OPTION ADDENDUM www.ti.com 24-Jan-2013 PACKAGING INFORMATION Orderable Device Status (1) LM4927SD/NOPB ACTIVE Package Type Package Pins Package Qty Drawing WSON NGQ 8 1000 Eco Plan Lead/Ball Finish (2) Green (RoHS & no Sb/Br) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) CU SN Level-1-260C-UNLIM (4) L4927 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Only one of markings shown within the brackets will appear on the physical device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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Addendum-Page 1 Samples PACKAGE MATERIALS INFORMATION www.ti.com 21-Mar-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device LM4927SD/NOPB Package Package Pins Type Drawing WSON NGQ 8 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 1000 178.0 12.4 Pack Materials-Page 1 3.3 B0 (mm) K0 (mm) P1 (mm) 3.3 1.0 8.0 W Pin1 (mm) Quadrant 12.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 21-Mar-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM4927SD/NOPB WSON NGQ 8 1000 210.0 185.0 35.0 Pack Materials-Page 2 MECHANICAL DATA NGQ0008A SDA08A (Rev A) www.ti.com IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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