BOARDCOM APDS-9306 Miniature surface-mount digital ambient light sensor Datasheet

APDS-9306/APDS-9306-065
Miniature Surface-Mount Digital Ambient Light Sensor
Data Sheet
Description
Features
Avago Technologies' APDS-9306/APDS-9306-065 is a lowvoltage Digital Ambient Light Sensor that converts light
intensity to digital signal output with I2C interface. It consists
of photodiode, ADC, oscillator and power-on reset to ensure
consistent start-up. ADCs convert the photodiode currents
to a digital output and the device is capable of rejecting
50Hz and 60Hz flicker caused by artificial light sources.
 Ambient Light Sensing
The APDS-9306/APDS-9306-065 approximates the
response of the human-eye providing direct read out,
where the output count is proportional to ambient light
level. Low light functionality enables operation behind
darkened glass. The APDS-9306/APDS-9306-065 supports
programmable hardware interrupt with hysteresis to
respond to events.
APDS-9306 ultra slim form factor with a height of only
0.34mm and APDS-9306-065 with a height of 0.65mm
enables the sensor to be designed into space-sensitive
applications.
Applications
 Detection of ambient light to control display
backlighting
o Wearable devices – Smart watch, Sport Watch
o Mobile devices – Cell phones, PDAs, PMP
o Computing devices – Notebooks, Tablet PC, Key
board
o Consumer devices – LCD Monitor, Flat-panel TVs,
Video Cameras, Digital Still Camera
 Automatic Residential and Commercial Lighting
Management
- Utilizes Coating Technology to Emulate Human Eye
Spectral Response
- High Sensitivity in Low Lux Condition – Ideally
Suited for Operation Behind Dark Glass
- Wide Dynamic Range 18,000,000 : 1
- Low Lux Performance 0.01 lux
- Up to 20-Bit Resolution
 Wide Power Supply Range 1.7V to 3.6V
- 50Hz/60Hz light flicker immunity
- Fluorescent light flicker immunity
 Power Management
- Low Active Current: 85 μA typical
 I2C-bus Interface Compatible
- Up to 400 kHz (I2C Fast-Mode)
- Dedicated Interrupt Pin
 Small Package:
- APDS-9306: L2.0 x W2.0 x H0.34mm
- APDS-9306-065: L2.0 x W2.0 x H0.65mm
Ordering Information
Part Number
Packaging
Quantity
APDS-9306
Tape & Reel
2500 per reel
APDS-9306-065
Tape & Reel
2500 per reel
Functional Block Diagram
VDD
Regulator
Interrupt
Oscillator
INT
GND
Upper Threshold
Clear ADC/Data
Lower Threshold
ALS ADC/Data
SCL
I2C Interfacing
Temperature
ADC/Data
I/O Pins Configuration
APDS-9306 I/O Pins Configuration
Pin
Name
Type
Description
1
GND
Ground
Power supply ground. All voltages are referenced to GND
2
NC
No Connect
3
NC
No Connect
4
VDD
Supply
Power supply voltage
5
SCL
I
I2C serial clock input terminal – clock signal for I2C serial data
6
SDA
I/O
I2C serial data I/O terminal – serial data I/O for I2C
7
INT
O
Interrupt – open drain
8
NC
No Connect
APDS-9306-065 I/O Pins Configuration
Pin
Name
Type
Description
1
SCL
I
I2C serial clock input terminal - clock signal for I2C serial data
2
SDA
I/O
Serial Data I/O for I2C
3
VDD
Supply
Power Supply Voltage
4
INT
O
Interrupt - Open Drain
5
NC
6
GND
2
No Connect
Ground
Power supply ground. All voltages are referenced to GND
SDA
Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted)+
Parameter
Symbol
Power Supply Voltage [1]
Min
VDD
Max Voltage on SCL, SDA, INT
pads
VO
-0.5
Storage Temperature Range
Tstg
−45
Max
Units
3.8
V
3.8
V
85
°C
Conditions
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Note 1. All voltages are with respect to GND.
Recommended Operating Conditions
Parameter
Symbol
Min
Operating Ambient Temperature
TA
Supply Voltage
VDD
Supply Voltage Accuracy, VDD
total error including transients
Typ
Max
Units
-40
85
°C
1.7
3.6
V
-3
3
%
Operating Characteristics VDD = 2.8 V, TA = 25°C (unless otherwise noted)
Parameter
Supply Current
Symbol
Min.
IDD
Typ.
Max.
85
2
ISTBY
Units
Test Conditions
μA
G=18x, 50ms
μA
In Standby Mode. No
active I2C communication
SCL, SDA Input High Voltage
VIH
1.5
VDD
V
SCL, SDA Input Low Voltage
VIL
0
0.4
V
VOL , INT, Output Low Voltage
VOL
0
0.4
V
Leakage Current, SDA, SCL, INT Pins
ILEAK
-5
5
μA
3
ALS Characteristics, VDD = 2.8 V, TA = 25°C (unless otherwise noted)
Parameter
Symbol
Min.
Typ.
Peak Wavelength
Output Resolution
P
13
18
Dark ALS ADC Count Value
0
ALS ADC Count Value
1600
ALS ADC Integration Time
25
Max.
Units
20
bit
Programmable
3
counts
G=18x, 50ms
2400
counts
G=3x, 100msec, =530nm,
Ee=49.8μW/cm2 [1]
Ee=43 μW/cm2 [2]
400
ms
560
Gain Scaling,
Relative to 1x Gain Setting
2000
Test Conditions
nm
With 50/60Hz rejection
3
6
9
18
AGAIN = 3x
AGAIN = 6x
AGAIN = 9x
AGAIN = 18x
Notes
1. Applies to APDS-9306
2. Applies to APDS-9306-065
Characteristics of the SDA and SCL bus lines, VDD = 2.8 V, TA = 25°C (unless otherwise noted) †
Parameter
Symbol
Min.
Max.
Unit
SCL Clock Frequency
fSCL
0
400
kHz
Hold Time (repeated) START condition.
After this Period, the First Clock Pulse is Generated
tHD;STA
0.6
–
μs
LOW Period of the SCL Clock
tLOW
1.3
–
μs
HIGH Period of the SCL Clock
tHIGH
0.6
–
μs
Set-Up Time for a Repeated START Condition
tSU;STA
0.6
–
μs
Data Hold Time
tHD;DAT
0
0.9
μs
Data Set-Up Time
tSU;DAT
100
–
ns
Clock/Data Fall Time
tf
0
300
ns
Clock/Data Rise Time
tr
0
300
ns
Set-Up Time for STOP Condition
tSU;STO
0.6
–
μs
Bus Free Time between a STOP and START Condition
tBUF
1.3
-
μs
4
ALS
NORMALIZED RESPONSIVITY
RELATIVE RESPONSE
1.1
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
300
Human Eye
400
500
600
700
800
WAVELENGTH (nm)
900
1000
1100
Figure 2. Normalized ALS PD Angular Response
20000
1000
18000
900
16000
800
14000
700
12000
600
SENSOR LUX
SENSOR LUX
Figure 1. Spectral Response
10000
8000
400
300
4000
200
2000
100
0
0
2000 4000 6000 8000 10000 12000 14000 16000 18000 20000
METER LUX
Figure 3. ALS Sensor LUX vs Meter LUX using White Light
0
0.9
0.8
0.7
SENSOR LUX
0.6
0.5
0.4
0.3
0.2
0.1
0.0
0
0.1
0.2
0.3
0.4
0.5
0.6
METER LUX
0.7
Figure 5. ALS Sensor LUX vs Meter LUX using White Light
100
200
300
400
500 600
METER LUX
700
800
900
0.08
0.09
1000
Figure 4. ALS Sensor LUX vs Meter LUX using White Light
1.0
SENSOR LUX
500
6000
0
5
1.1
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
-90 -80 -70 -60 -50 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90
ANGULAR DISPLACEMENT (DEGREE)
0.8
0.9
1
0.11
0.10
0.09
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.01
0.00
0
0.01
0.02
0.03
0.04 0.05 0.06
METER LUX
0.07
Figure 6. ALS Sensor LUX vs Meter LUX using White Light
0.1
0.9
800
0.8
700
0.7
600
0.6
SENSOR LUX
1.0
900
SENSOR LUX
1000
500
400
0.4
300
0.3
200
0.2
100
0.1
0.0
0
0
100
200
300
400
500 600
METER LUX
700
800
900 1000
Figure 7. ALS Sensor LUX vs Meter LUX using Incandescent Light
0
2.0
900
1.8
800
1.6
NORMALIZED IDD @ 2.8V
1000
SENSOR LUX
600
500
400
300
400 500 600
METER LUX
700
800
900
1000
Figure 9. ALS Sensor LUX vs Meter LUX using Halogen Light
1.8
NORMALIZED IDD @ 2.8V
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
-40
-20
0
20
40
TEMPERATURE (C)
Figure 11. Normalized IDD vs Temperature
60
0.7
0.8
0.9
1
0.6
0.0
1.6
1.8
2.0
2.2
2.4
Figure 10. Normalized IDD vs VDD
2.0
0.0
-60
0.5
0.6
METER LUX
0.8
0.2
0
300
0.4
1.0
0.4
200
0.3
1.2
100
100
0.2
1.4
200
0
0.1
Figure 8. ALS Sensor LUX vs Meter LUX using Incandescent Light
700
6
0.5
80
100
2.6 2.8
VDD (V)
3.0
3.2
3.4
3.6
3.8
System State Machine
Ambient Light Sensor Interrupt
Start Up after Power-On or Software Reset
The ALS interrupt is enabled by ALS_INT_EN=1 and
can function as either threshold triggered (ALS_VAR_
MODE=0) or variance triggered (ALS_VAR_MODE =1).
The main state machine is set to “Start State” during
power-on or software reset. As soon as the reset is released,
the internal oscillator is started and the programmed I2C
address and the trim values are read from the internal non
volatile memory (NVM) trimming data block. The device
enters Standby Mode as soon as the Idle State is reached.
Note: As long as the I2C address has not yet been reached,
the device will respond with NACK to any I2C command
and ignore any request to avoid responding to a wrong
I2C address.
Standby Mode
The ALS threshold interrupt is enabled with ALS_INT_
EN=1 and ALS_VAR_MODE=0. It is set when the ALS data
is above the upper or below the lower ALS threshold for a
specified number of consecutive measurements (1+ALS_
PERSIST)
The ALS variance interrupt is enabled with ALS_INT_EN=1
and ALS_VAR_MODE=1. It is set when the absolute value
of the difference between previous and current ALS data is
above the decoded ALS variance threshold for a specified
number of consecutive measurements (1+ALS_PERSIST).
Standby Mode is the default mode after power-up. In
this state, the oscillator, all internal support blocks, and
the ADCs are switched off but I2C communication is fully
supported.
Start
Ambient Light Sensor Operation
ALS measurements can be activated by setting the ALS_
EN bit to 1 in the MAIN_CTRL register.
As soon as the ALS becomes activated through an I2C
command, the internal support blocks are powered on.
Once the voltages and currents are settled (typically after
5ms), the state machine checks for trigger events from
a measurement scheduler to start the ALS conversions
according to the selected measurement repeat rates.
Once ALS_EN is changed back to 0, a conversation running
on the respective channel will be completed and the
relevant ADCs and support blocks will move to standby
mode.
Fuse Read
Idle
ALS_EN==1
Wait for OSC Power Up
Check ALS
ALS_EN==1
Priority 2
Do ALS Conversion
(ADC ms)
7
ALS_EN==0
Priority 1
I2C Protocol
I²C Register Write
Interface and control of the APDS-9306/APDS-9306-065 is
accomplished through an I2C serial compatible interface
(standard or fast mode) to a set of registers that provide
access to device control functions and output data. The
device supports a single slave address of 0X52 hex using
7-bit addressing protocol. (Contact factory for other addressing options).
The APDS-9306/APDS-9306-065 registers can be written
to individually or in block write mode. When two or more
bytes are written in block write mode, reserved registers
and read-only registers are skipped. The transmitted data
is automatically applied to the next writable register. If
a register includes read (R) and read/write (RW) bits, the
register is not skipped. Data written to read-only bits are
ignored.
I²C Register Read
If the last valid address of the APDS-9306/APDS-9306065 address range is reached but the master attempts to
continue the block write operation, the address counter
of the APDS-9306/APDS-9306-065 will not roll over. The
APDS-9306/APDS-9306-065 will return NACK for every
following byte sent by the master until the I2C™ operation
is ended.
The registers can be read individually or in block read
mode. When two or more bytes are read in block read
mode, reserved register addresses are skipped and the
next valid address is referenced. If the last valid address
has been reached, but the master continues with the
block read, the address counter in the device will not roll
over and the device returns 00HEX for every subsequent
byte read.
If a write access is started on an address belonging to a
non-writeable register, the APDS-9306/APDS-9306-065
will return NACK until the I2C™ operation is ended.
The block read operation is the only way to ensure correct
data read out of multi-byte registers and to avoid splitting
of results with HIGH and LOW bytes originating from
different conversions. During block read access on ALS
result registers, the result update is blocked.
Write operations must follow the Register Write timing
diagram below.
If a read access is started on an address belonging to a
non-readable register, the APDS-9306/APDS-9306-065
will re-turn NACK until the I2C™ operation is ended.
Read operations must follow the Register Read timing
diagram as below.
Register Read (I2CTM Read)
S
Slave Addr
7 Bit
0
A
Address
8 Bit
A
S
Slave Addr
7 Bit
1
A
Data
8 Bit
N
P
From Master to Slave
S
From Slave to Master
Write
P Stop Condition
Read
A Acknowledge (ACK)
Register Block Read (I2CTM Read)
S
Slave Addr
7 Bit
0
A
Address
8 Bit
Start Condition
A
S
Slave Addr
7 Bit
Write
1
A
Data
8-Bit
Data
8-Bit
A
A
…
Data
N
8-Bit
P
N Not Acknowledge (NACK)
Read
Register Write (I2CTM Write)
S
Slave Addr
7 Bit
0
A Address
A
Data
8-Bit
A
From Master to Slave
P
S
Start Condition
From Slave to Master
P Stop Condition
Write
Register Block Write (I2CTM Write)
S
Slave Addr
7 Bit
0
Write
8
A Address
A Acknowledge (ACK)
A
Data
8-Bit
A
Data
8-Bit
A
…
Data
8-Bit
A
P
N Not Acknowledge (NACK)
I2C Interface – Bus Timing
SDA
t SUDAT
t LOW
t HDSTA
t BUS
SCL
t HDSTA
t SUSTO
t HIGH
t HDDAT
t SUSTA
Bus Timing Characteristics
Parameter
Symbol
Standard
Mode
Fast
Mode
Units
Maximum SCL Clock Frequency
fSCL
100
400
KHz
Minimum START Condition Hold Time Relative to SCL Edge
tDSTA
4
Minimum SCL Clock Low Width
tLOW
4.7
μs
Minimum SCL Clock High Width
tHIGH
4
μs
Minimum START Condition Setup Time Relative to SCL Edge
tSUSTA
4.7
μs
Minimum Data Hold Time on SDA Relative to SCL Edge
tHDDAT
0
Minimum Data Setup Time on SDA Relative to SCL Edge
tSUDAT
0.1
Minimum STOP Condition Setup Time on SCL
tSUSTO
4
μs
Minimum Bus Free Time Between Stop Condition and Start Condition
tBUS
4.7
μs
9
μs
μs
0.1
μs
Register set:
The APDS-9306/APDS-9306-065 is controlled and monitored by data registers and a command register accessed through
the serial interface. These registers provide for a variety of control functions and can be read to determine results of the
ADC conversions.
Address
Type
Name
Description
Reset Value
00HEX
RW
MAIN_CTRL
ALS operation mode control, SW reset
00HEX
04HEX
RW
ALS_MEAS_RATE
ALS measurement rate and resolution in Active mode 22HEX
05HEX
RW
ALS_GAIN
ALS analog gain range
01HEX
06HEX
R
Part_ID
Part number ID and revision ID
B1HEX (APDS-9306)
B3HEX (APDS-9306-065)
07HEX
R
MAIN_STATUS
Power-on status, interrupt status, data status
20HEX
0AHEX
R
CLEAR_DATA_0
Clear ADC measurement data - LSB
00HEX
0BHEX
R
CLEAR_DATA_1
Clear ADC measurement data
00HEX
0CHEX
R
CLEAR_DATA_2
Clear ADC measurement data - MSB
00HEX
0DHEX
R
ALS_DATA_0
ALS ADC measurement data - LSB
00HEX
0EHEX
R
ALS_DATA_1
ALS ADC measurement data
00HEX
0FHEX
R
ALS_DATA_2
ALS ADC measurement data - MSB
00HEX
19HEX
RW
INT_CFG
Interrupt configuration
10HEX
1AHEX
RW
INT_PERSISTENCE
Interrupt persist setting
00HEX
21HEX
RW
ALS_THRES_UP_0
ALS interrupt upper threshold, LSB
FFHEX
22HEX
RW
ALS_THRES_UP_1
ALS interrupt upper threshold
FFHEX
23HEX
RW
ALS_THRES_UP_2
ALS interrupt upper threshold, MSB
0FHEX
24HEX
RW
ALS_THRES_LOW_0
ALS interrupt lower threshold, LSB
00HEX
25HEX
RW
ALS_THRES_LOW_1
ALS interrupt lower threshold
00HEX
26HEX
RW
ALS_THRES_LOW_2
ALS interrupt lower threshold, MSB
00HEX
27HEX
RW
ALS_THRES_VAR
ALS interrupt variance threshold
00HEX
10
MAIN_CTRL
Default Value: 00HEX
7
6
5
4
3
2
1
0
0
0
0
SW_Reset
0
0
ALS_EN
0
FIELD
BIT
DESCRIPTION
SW_Reset
4
1 = Reset will be triggered
ALS_EN
1
1 = ALS active
0 = ALS standby
0X00
Writing to this register stops the ongoing measurements and starts new measurements (depends on the respective enable bit).
ALS_MEAS_RATE
Default value: 22HEX
7
6
0
5
4
ALS Resolution/Bit Width
3
2
0
FIELD
BIT
DESCRIPTION
ALS
Resolution/
Bit Width
6:4
000 : 20 bit – 400ms
001 : 19 bit – 200ms
010 : 18 bit – 100ms (default)
011 : 17 bit – 50ms
100 : 16 bit – 25ms
101 : 13 bit – 3.125ms
110 : Reserved
111 : Reserved
ALS
Measurement
Rate
2:0
000 – 25ms
001 – 50ms
010 – 100ms (default)
011 – 200ms
100 – 500ms
101 – 1000ms
110 – 2000ms
111 – 2000ms
1
0
ALS Measurement Rate
0X04
When the measurement repeat rate is programmed to be faster than possible for the specified ADC measurement time,
the repeat rate will be lower than programmed (maximum speed).
Writing to this register stops the ongoing measurements and starts new measurements (depends on the respective
enable bit).
ALS_GAIN
Default Value: 01HEX
7
6
5
4
3
0
0
0
0
0
FIELD
BIT
DESCRIPTION
ALS Gain Range
2:0
000 : Gain 1
001 : Gain 3
010 : Gain 6
011 : Gain 9
100 : Gain 18
2
1
ALS Gain Range
0
0X05
Writing to this register stops the ongoing measurement and starts new measurements (depending on the respective
bits).
11
PART_ID
Default Value: B1HEX (APDS-9306), B3HEX (APDS-9306-065)
7
6
5
4
3
2
Part ID
1
0
Revision ID
FIELD
BIT
DESCRIPTION
Part Number ID
7:4
Part number ID
Revision ID
3:0
Revision ID of the component
0X06
MAIN_STATUS
Default Value: 20HEX
7
6
5
4
3
2
1
0
0
0
Power
On
Status
ALS
Interrupt
Status
ALS
Data
Status
0
0
0
0X07
FIELD
BIT
DESCRIPTION
Power On
Status
5
1 = Part went through a power-up event, either because the part was turned on or
because there was power supply disturbance. All interrupt threshold settings in the
registers have been reset to power-on default states and should be examined if necessary. The flag is cleared after the register is read.
ALS Interrupt
Status
4
0 : Interrupt condition not fulfilled (default)
1 : Interrupt condition fulfilled (cleared after read)
ALS Data
Status
3
0 : old data, already read (default)
1 : new data, not yet read (cleared after read)
CLEAR_DATA
Default Value: 00HEX, 00HEX, 00HEX
7
0
6
0
5
0
4
3
2
1
0
CLEAR _DATA_0 [7:0]
0X0A
CLEAR_DATA_1 [15:8]
0X0B
0
CLEAR_DATA_2 [19:16]
0X0C
Clear channel digital output data (unsigned integer, 13 to 20 bit, LSB aligned). The clear channel data is clipped at (2Resolution – 1)
The clear channel output is already temperature compensated internally:
CLEAR_DATA = (CLEARint - COMP)
When an I²C™ read operation is active and points to an address in the range 07HEX to 18HEX, all registers in this range
are locked until the I²C™ read operation is completed or this address range is left.
This guarantees that the data in the registers comes from the same measurement even if an additional measurement
cycle ends during the read operation. New measurement data is stored into temporary registers and the actual CLEAR_
DATA registers are updated as soon as there is no on-going I²C™ read operation to the address range 07HEX to 18HEX.
Reg 0AHEX
Reg 0BHEX
Reg 0CHEX
12
Bit[7:0] Clear diode data least significant data byte
Bit[7:0] Clear diode data intervening data byte
Bit[3:0] Clear diode data most significant data byte
ALS_DATA
Default value: 00HEX, 00HEX, 00HEX
7
6
5
4
3
2
1
0
ALS_DATA_0 [7:0]
0X0D
ALS_DATA _1 [15:8]
0
0
0
0X0E
0
ALS_DATA_2 [19:16]
0X0F
ALS channel digital output data (unsigned integer, 13 to 20 bit, LSB aligned).
The channel output is already temperature compensated internally:
ALS_DATA = (ALSint – COMP)
When an I²C™ read operation is active and points to an address in the range 07HEX to 18HEX, all registers in this range
are locked until the I²C™ read operation is completed or this address range is left.
This guarantees that the data in the registers comes from the same measurement even if an additional measurement
cycle ends during the read operation. New measurement data is stored into temporary registers and the actual ALS_
DATA registers are updated as soon as there is no on-going I²C™ read operation to the address range 07HEX to 18HEX.
Reg 0DHEX
Reg 0EHEX
Reg 0FHEX
Bit[7:0] ALS diode data least significant data byte
Bit[7:0] ALS diode data intervening data byte
Bit[3:0] ALS diode data most significant data byte
INT_CFG
Default Value: 10HEX
7
6
5
0
0
0
0
4
3
2
1
0
ALS Interrupt
Source
ALS Variation
Interrupt Mode
ALS Interrupt
Enable
0
0
ALS_INT_SEL
ALS_VAR_MODE
ALS_INT_EN
0
0
FIELD
BIT
DESCRIPTION
ALS_INT_SEL
5:4
00 : Clear channel
01 : ALS channel (default)
ALS_VAR_MODE
3
0 : ALS threshold interrupt mode (default)
1 : ALS variation interrupt mode
ALS_INT_EN
2
0 : ALS Interrupt disabled (default)
1 : ALS Interrupt enabled
0X19
INT_PERSISTENCE
Default value: 00HEX
7
6
5
ALS_PERSIST
4
3
2
1
0
0
0
0
0
0X1A
This register sets the number of similar consecutive LS interrupt events that must occur before the interrupt is asserted.
FIELD
BIT
DESCRIPTION
ALS_PERSIST
7:4
0000 : Every ALS value out of threshold range (default) asserts an interrupt
0001 : 2 consecutive ALS values out of threshold range assert an interrupt
…
1111 : 16 consecutive ALS values out of threshold range assert an interrupt
13
ALS_THRES_UP
Default value: FFHEX, FFHEX, 0FHEX
7
6
5
4
3
2
1
0
ALS_THRES_UP_0 [7:0]
0X21
ALS_THRES_UP_1 [15:8]
0
0
0
0
0x22
ALS_THRES_UP_2 [19:16]
0x23
ALS_THRES_UP sets the upper threshold value for the ALS interrupt. The Interrupt Controller compares the value in
ALS_THRES_UP against measured data in the ALS_DATA registers. It generates an interrupt event if ALS_DATA exceeds
the threshold level.
The data format for ALS_THRES_UP must match that of the ALS_DATA registers.
Reg 21HEX
Reg 22HEX
Reg 23HEX
Bit[7:0] ALS upper interrupt threshold value, LSB
Bit[7:0] ALS upper interrupt threshold value, intervening byte
Bit[3:0] ALS upper interrupt threshold value, MSB
ALS_THRES_LOW
Default value: 00HEX, 00HEX, 00HEX
7
0
6
0
5
4
3
2
1
0
ALS_THRES_LOW_0 [7:0]
0X24
ALS_THRES_LOW_1 [15:8]
0x25
0
0
ALS_THRES_UP_2 [19:16]
0x26
ALS_THRES_LOW sets the upper threshold value for the ALS interrupt. The Interrupt Controller compares the value in
ALS_THRES_LOW against measured data in the ALS_DATA registers. It generates an interrupt event if ALS_DATA is below
the threshold level.
The data format for ALS_THRES_LOW must match that of the ALS_DATA registers.
Reg 24HEX
Reg 25HEX
Reg 26HEX
Bit[7:0] ALS lower interrupt threshold value, LSB
Bit[7:0] ALS lower interrupt threshold value, intervening byte
Bit[3:0] ALS lower interrupt threshold value, MSB
ALS_THRESH_VAR
Default Value: 00HEX
7
6
5
4
3
0
0
0
0
0
2
1
ALS_THRES_VAR
FIELD
BIT
DESCRIPTION
ALS_THRES_VAR
2:0
000 : ALS result varies by 8 counts compared to previous result
001 : ALS result varies by 16 counts compared to previous result
010 : ALS result varies by 32 counts compared to previous result
011 : ALS result varies by 64 counts compared to previous result
…
111 : ALS result varies by 1024 counts compared to previous result
14
0
0X27
Application Information: Hardware
The application hardware circuit for implementing an ALS is simple with the APDS-9306/APDS-9306-065 and is shown in
the following figure. The bypass capacitor is placed as close to the VDD pin and is connected directly to the power source
and to the ground, as shown in Figure below. It allows the AC component of the VDD to pass through to ground. Use
bypass capacitor with low effective series resistance (ESR) and low effective series inductance (ESI), such as the common
ceramic types, which provide a low impedance path to ground at high frequencies to handle transient currents caused
by internal logic switching.
Pull-up resistors, RSDA and RSCL, maintain the SDA and SCL lines at a high level when the bus is free and ensure the
signals are pulled up from a low to a high level within the required rise time. A pull-up resistor, RINT, is also required
for the interrupt (INT), which functions as a wired-AND signal in a similar fashion to the SCL and SDA lines. A typical
impedance value of 10 kΩ can be used.
For a complete description of I2C maximum and minimum R1 and R2 values, please review the I2C Specification at
http:// www.semiconductors.philips.com.
VDD
R INT R SDA
R SCL
1uF
MCU
SCL
SCL
SDA
SDA
INT
APDS-9306/
APDS-9306-065
INT
GND
15
Package Outline Dimensions for APDS-9306
2 ±0.10
8
7
0.265 ±0.100
(x4)
6
5
5
6
7
8
0.775 ±0.100
(x8)
(0.263)
(0.344)
CL
2 ±0.10
CL
(0.407)
1
2
3
4
4
CL
IC Active Area Center
0.34 ±0.10
Pin-Out
1 - GND
2 - NC
3 - NC
4 - VDD
5 - SCL
6 - SDA
7 - INT
8 - NC
Dimensions are in mm
PCB Pad Layout for APDS-9306
2
CL
0.775
(x8)
2
CL
0.350
(x8)
0.530
(x6)
Dimensions are in mm
16
0.265
(x4)
0.310
(x8)
3
0.53 ±0.10
(x6)
2
CL
1
0.35 ±0.10
(x8)
0.31 ±0.10
(x8)
Tape Dimensions for APDS-9306
Ø 1.50 ±0.10
2 ±0.050
4 ±0.10
A
4 ±0.10
0.200 ±0.020
1.75 ±0.10
3.500 ±0.050
8 +0.300
-0.100
2.250 ±0.050
B
B
C
45 Deg Max
A
SECTION A-A
SCALE 10 : 1
Ø 1 ±0.250
2.250 ±0.050
SECTION B-B
SCALE 10 : 1
45 Deg Max
Unit Orientation
DETAIL C
SCALE 20 : 1
Dimensions are in mm
Reel Dimensions for APDS-9306
(620mm MIN)
LEADER
(PARTS MOUNTED)
(420mm MIN)
TRAILER
(40mm MIN)
EMPTY
0
0.5
2±
1.40
Ø178 ± 1
B
56 ± 0.20
R6.
50
.10
.50
R10
.10
±0
DETAIL B
SCALE 2 : 1
±0
9 ±0.20
12 ±1
17
Package Outline Dimensions for APDS-9306-065
2 ±0.10
3
0.65 ±0.10
(4x)
0.65 ±0.10
2
1
1
2
3
0.75 ±0.15
(6x)
0.625 ±0.100
(6x)
CL
CL
2 ±0.10
5
4
IC Active Area Center
CL
6
6
CL
(0.223)
PINOUT
1- SCL
2- SDA
3- VDD
4- INT
5- NC
6- GND
PCB Pad Layout
(2)
(2)
1.300
(x3)
0.900
(x6)
0.650
(x4)
18
5
0.400
(x6)
4
0.300 ±0.050
(6x)
0.100±0.050
(6x)
Tape Dimensions for APDS-9306-065
2 ±0.050
4±0.10
Ø 1.50 ±0.10
4±0.10
A
0.200 ±0.200
1.75 ±0.10
5 Deg Max
8 +-0.300
0.100
3.500 ±0.050
2.180 ±0.050
B
B
C
2.180 ±0.050
Ø 1±0.25
A
0.830 ±0.050
SECTION A-A
SCALE 10 : 1
5 Deg Max
SECTION B-B
SCALE 10 : 1
Unit Orientation
DETAIL C
SCALE 20 : 1
Dimensions are in mm
Reel Dimensions for APDS-9306-065
T
Tape Start Slot
CCD/KEACO
Measured at Hub
W1
T
Tape Start Slot
MADE IN MALAYSIA
Access Hole
Access Hole
13 ± 0.2
Arbor Hole
20.2 Min.
∅180 ± 0.50
Diameter
Access Hole
W2
Measured at Hub
W3
Measured at Outer Edge
Front View
19
Back View
Side View
60 ± 0.50
Hub Dia.
Moisture Proof Packaging Chart
All APDS-9306/APDS-9306-065 options are shipped in moisture proof package. Once opened, moisture absorption
begins.
This part is compliant to JEDEC Level 3.
BAKING CONDITIONS CHART
UNITS IN A SEALED
MOISTURE-PROOF PACKAGE
PACKAGE IS OPENED
(UNSEALED)
ENVIRONMENT
LESS THAN 30° C
AND LESS THAN
60% RH
YES
NO BAKING IS
NECESSARY
PACKAGE IS
OPENED LESS
THAN 168 HOURS
YES
NO
PERFORM RECOMMENDED
BAKING CONDITIONS
Recommended Storage Conditions
NO
Baking conditions
Storage Temperature
10°C to 30°C
Relative Humidity
Below 60% RH
If the parts are not stored per the recommended storage
conditions they must be baked before reflow to prevent
damage to the parts.
Time from Unsealing to Soldering
Package
Temp.
Time
After removal from the bag, the parts should be soldered
within seven days if stored at the recommended storage
conditions. When the Moisture Barrier Bag (MBB) is
opened and the parts are exposed to the recommended
storage conditions more than seven days, the parts must
be baked before reflow to prevent damage to the parts.
In Reels
60°C
48 hours
In Bulk
100°C
4 hours
20
Note: Baking should only be done once.
Recommended Reflow Profile
MAX 260°C
T - TEMPERATURE (°C)
255
R3
230
217
200
180
R2
R4
60 sec to 90 sec
Above 217°C
150
R5
R1
120
80
25
0
P1
HEAT
UP
Process Zone
50
100
150
200
P3
SOLDER
REFLOW
P2
SOLDER PASTE DRY
Symbol
Heat Up
Solder Paste Dry
Solder Reflow
P1, R1
P2, R2
P3, R3
P3, R4
Cool Down
P4, R5
Time maintained above liquidus point, 217° C
Peak Temperature
Time within 5° C of actual Peak Temperature
Time 25° C to Peak Temperature
The reflow profile is a straight-line representation of
a nominal temperature profile for a convective reflow
solder process. The temperature profile is divided into
four process zones, each with different T/time temperature change rates or duration. The T/time rates or
duration are detailed in the above table. The temperatures
are measured at the component to printed circuit board
connections.
In process zone P1, the PC board and component pins
are heated to a temperature of 150°C to activate the flux
in the solder paste. The temperature ramp up rate, R1, is
limited to 3°C per second to allow for even heating of both
the PC board and component pins.
Process zone P2 should be of sufficient time duration (100
to 180 seconds) to dry the solder paste. The temperature is
raised to a level just below the liquidus point of the solder.
Process zone P3 is the solder reflow zone. In zone P3, the
temperature is quickly raised above the liquidus point of
solder to 260°C (500°F) for optimum results. The dwell time
For product information and a complete list of distributors, please go to our web site:
250
P4
COOL DOWN
T
Maximum T/time
or Duration
25°C to 150°C
150°C to 200°C
200°C to 260°C
260°C to 200°C
200°C to 25°C
> 217°C
260°C
–
25°C to 260°C
3°C/s
100 s to 180 s
3°C/s
-6°C/s
-6°C/s
60 s to 90 s
–
20 s to 40 s
8 mins
300
t-TIME
(SECONDS)
above the liquidus point of solder should be between 60
and 90 seconds. This is to assure proper coalescing of the
solder paste into liquid solder and the formation of good
solder connections. Beyond the recommended dwell time
the intermetallic growth within the solder connections
becomes excessive, resulting in the formation of weak and
unreliable connections. The temperature is then rapidly
reduced to a point below the solidus temperature of the
solder to allow the solder within the connections to freeze
solid.
Process zone P4 is the cool down after solder freeze. The
cool down rate, R5, from the liquidus point of the solder to
25°C (77°F) should not exceed 6°C per second maximum.
This limitation is necessary to allow the PC board and
component pins to change dimensions evenly, putting
minimal stresses on the component.
It is recommended to perform reflow soldering no more
than twice.
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Data subject to change. Copyright © 2015–2016 Avago Technologies. All rights reserved.
AV02-4755EN - October 21, 2016