LM8207 www.ti.com SNOSAL5A – SEPTEMBER 2005 – REVISED MARCH 2013 LM8207 TFT 18 Gamma Buffer + VCOM Driver + Voltage Reference Check for Samples: LM8207 FEATURES DESCRIPTION • • • The LM8207 is a combination of 18-channel gamma buffers, a VCOM driver and a temperature compensated internal voltage reference. It is designed for buffering voltage levels and driving high capacitive loads in large TFT panels. The gamma buffers are individually optimized to the input/output requirements of their respective gamma position to cover the whole voltage range from rail to rail. Any desired gamma correction curve can be obtained by combining the gamma buffers with external resistors. The VCOM driver has a high output current capability and is stable with large capacitive loads, typical for large panel sizes. This will result in a fast recovery time for large voltage variations at the output. The internal band gap reference can be used to form a highly stable voltage to generate the gamma correction voltages. In combination with the internal amplifier, the reference voltage can be programmed to voltages up to the positive rail. The LM8207 is offered in a 48-pin TSSOP package. 1 2 • • Gamma Buffers 1-2 Swing to VDD Gamma Buffers 17-18 Swing to VSS Large Output Current VCOM Driver (ISC = 300 mA) Stable (1%) Internal 1.295V Reference, to Improve Picture Quality and Reduce Variations 48-pin TSSOP Package APPLICATIONS • TFT Gamma Curve Connection and VCOM Voltage Buffering TFT Panel Block Diagram VCOM GAMMA CORRECTION CURVE LM8342 REFERENCE LM8207 VREF 18 GAMMA BUFFER TIMING CONTROL MULTI SOURCE DC/DC CONVERTER & LDO VCOM BUFFER COLUMN DRIVER ROW DRIVER DISPLAY 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2005–2013, Texas Instruments Incorporated LM8207 SNOSAL5A – SEPTEMBER 2005 – REVISED MARCH 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) ESD Tolerance (3) Human Body Machine Model 2.5 kV 250V Supply Voltage (VDD - VSS) 18V −65°C to +150°C Storage Temperature Range Junction Temperature (4) +150°C Soldering Information Infrared or Convection (20 sec.) 230°C Wave Soldering (10 sec.) 260°C (1) (2) (3) (4) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications, see the Electrical Characteristics tables. When the output of the VCOM buffer exceeds the supply rails, while sinking or sourcing 100 mA, the VCOM output is susceptible to latch. Human body model, 1.5 kΩ in series with 100 pF. Machine model, 0Ω in series with 200 pF The maximum power dissipation is a function of TJ(MAX), θJA and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) – TA)/θJA. All numbers apply for packages soldered directly onto a PC board. Operating Ratings (1) −40°C to +105°C Operating Temperature Range Operating Voltage Range Package Thermal Resistance, θJA (2) (1) (2) 2 6V to 16V 48-Pin TSSOP 84°C/W Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications, see the Electrical Characteristics tables. The maximum power dissipation is a function of TJ(MAX), θJA and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) – TA)/θJA. All numbers apply for packages soldered directly onto a PC board. Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM8207 LM8207 www.ti.com SNOSAL5A – SEPTEMBER 2005 – REVISED MARCH 2013 16V Electrical Characteristics (1) Unless otherwise specified, all limits ensured for TJ = 25°C, VDD = 16V, VSS = 0V, & CLOAD = 100 pF (Gamma & VCOM Buffers). Boldface limits apply at the temperature extremes. Symbol Parameter Min (2) Conditions Typ (3) Max (2) Units Gamma Buffers BW_Gamma −3 dB Bandwidth 2 MHz SR_Gamma Slew Rate (4) 1 V/µs TREC_Gamma Output Recovery Time (5) 400 ns VIN_Gamma Input Voltage Range Buffer 1-2 Buffer 3-8 & 11-16 Buffer 9 Buffer 10 Buffer 17-18 Positive VDD Negative VSS +0.6 Positive VDD-0.6 Negative VSS +0.6 Positive VDD −0.6 Negative VSS Positive VDD-0.6 Negative VSS +0.6 Positive VDD −0.6 Negative VOUT_Gamma Output Voltage Range Buffer 1-2, No Load Positive Buffer 3-8 & 11-16 No Load Positive Buffer 9, No Load Positive Buffer 10, No Load Positive Buffer 17-18, No Load Positive VSS VDD -0.25 Negative VDD -0.1 VSS +1.5 VDD −1.2 Negative VDD −1.0 VSS +0.7 VDD -0.8 VSS +0.8 VDD –1.2 VDD –1.1 VDD –1.6 VDD –1.5 Negative VSS +1.6 VDD -1.1 VSS +0.6 Negative Negative V VSS +0.6 VSS +0.1 VSS +0.9 VSS +0.7 VSS +0.25 IBIAS_Gamma Absolute, Input Bias Current Within Gamma Buffer Output Voltage Range 30 VOS_Gamma Input Offset Voltage Buffer 1-2, VIN = 8V 5 10 Buffer 3-8, 11-16, VIN = 8V 1 5 Buffer 9, VIN = 8V 1 5 Buffer 10, VIN = 8V 1 5 Buffer 17-18, VIN = 8V 5 10 (1) (2) (3) (4) (5) V nA mV Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing condition result in very limited self-heating of the device such that TJ = TA. No specification of parametric performance is indicated in the electrical table under conditions of internal self-heating where TJ > TA. All limits are specified by design or statistical analysis. Typical values represent the parametric norm at the time of characterization. Slew Rate is measured for VIN = 4 VPP. 10% -90% values are used. Slew rate is the average of the rising and falling slew rates 4 VPP pulse (50 ns rise time) applied to one side of 100 pF series output capacitance, other side connected to output of buffer. Output to within 0.1% of input voltage. Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM8207 3 LM8207 SNOSAL5A – SEPTEMBER 2005 – REVISED MARCH 2013 www.ti.com 16V Electrical Characteristics(1) (continued) Unless otherwise specified, all limits ensured for TJ = 25°C, VDD = 16V, VSS = 0V, & CLOAD = 100 pF (Gamma & VCOM Buffers). Boldface limits apply at the temperature extremes. Symbol IOUT_Gamma Parameter Linear Output Current (6) Buffer 1-2 Buffer 3-8 & 11-16 Buffer 9 Buffer 10 Buffer 17-18 PSRR Power Supply Rejection Ratio Min (2) Typ (3) Sourcing 20 46 Sinking 0.2 0.33 Sourcing 10 24.5 Sinking 3.5 5.5 Sourcing 4.5 9.4 Sinking 15 27 Sourcing 23 34.8 Sinking 3.5 5.5 Sourcing 0.2 0.33 Sinking 20 50 75 88 dB Conditions VDD - VSS = 6V to 16V Max (2) Units mA VCOM Driver BW_VCOM Bandwidth 10 MHz SR_ VCOM Slew Rate (4) 4.5 V/μs T_REC_VCOM Output Recovery Time (5) 200 ns VIN_VCOM Input Voltage Range VOUT_VCOM Output Voltage Range Positive VDD Negative VSS +0.6 No Load Positive VDD –1.0 Negative VDD –0.7 VSS +0.9 IBIAS_VCOM Input Bias Current Within VCOM Buffer Output Voltage Range VOS_VCOM Input Offset Voltage VIN = 8 V 1 IOUT_LIN_VCOM Linear Output Current (6) (7) Sourcing 160 Sinking 150 IOUT_SC_VCOM PSRR Short Circuit Output Current (7) (8) Power Supply Rejection Ratio V VSS +1.2 50 Sourcing 220 300 Sinking 220 300 VDD - VSS = 6V to 16V 75 88 1.28 1.295 V nA 10 mV mA mA dB Voltage Reference Section VREF Voltage No Load RegLOAD Load Regulation IOUT = 0 to 10 mA VREF_ACC Voltage Accuracy No Load, VREF = 1.295V VREF_MAX Max Programming Range IOUT = 4 mA Input Bias Current Within VREF Output Voltage Range IIN_VREF TC_VREF Temperature Stability IOUT_VREF Max Output Current PSRR Power Supply Rejection Ratio (Line Regulation) Supply Current 1.31 V 0.14 mV/mA 1 % VDD −0.3 V 10 50 nA 70 ppm/°C 71 mA 70 80 dB 4.5 6.5 Sourcing, VOUT = 1.295 V Miscellaneous IS (6) (7) (8) 4 8.5 9.5 mA Linear output current measured at |VOUT - VIN| = 0.1V. This is a momentary test. Continuous large output currents may result in exceeding the maximum power dissipation and damage the device. Short circuit current measured at |VOUT - VIN| = 1V. Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM8207 LM8207 www.ti.com SNOSAL5A – SEPTEMBER 2005 – REVISED MARCH 2013 Connection Diagram OUT_VREF 1 48 IN_VREF NC 2 47 NC IN_1 3 46 OUT_1 IN_2 4 45 OUT_2 IN_3 5 44 OUT_3 IN_4 6 43 OUT_4 IN_5 7 42 OUT_5 IN_6 8 41 OUT_6 LM8207 IN_7 9 40 OUT_7 IN_8 10 39 OUT_8 IN_9 11 38 OUT_9 VDD 12 37 VSS IN_10 13 36 OUT_10 IN_11 14 35 OUT_11 IN_12 15 34 OUT_12 IN_13 16 33 OUT_13 IN_14 17 32 OUT_14 IN_15 18 31 OUT_15 IN_16 19 30 OUT_16 IN_17 20 29 OUT_17 IN_18 21 28 OUT_18 NC 22 27 NC NC 23 26 NC IN_VCOM 24 25 OUT_VCOM Figure 1. 48-Pin TSSOP Top View PIN DESCRIPTIONS Pin # Description Remark 1 OUT_VREF Reference voltage amplifier output 2 NC No connection 3 IN_1 Input gamma buffer 1 4 IN_2 Input gamma buffer 2 5 IN_3 Input gamma buffer 3 6 IN_4 Input gamma buffer 4 7 IN_5 Input gamma buffer 5 8 IN_6 Input gamma buffer 6 9 IN_7 Input gamma buffer 7 10 IN_8 Input gamma buffer 8 11 IN_9 Input gamma buffer 9 12 VDD Positive supply voltage (VDD) 13 IN_10 Input gamma buffer 10 14 IN_11 Input gamma buffer 11 15 IN_12 Input gamma buffer 12 16 IN_13 Input gamma buffer 13 17 IN_14 Input gamma buffer 14 18 IN_15 Input gamma buffer 15 19 IN_16 Input gamma buffer 16 20 IN_17 Input gamma buffer 17 21 IN_18 Input gamma buffer 18 22,23 NC No connection Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM8207 5 LM8207 SNOSAL5A – SEPTEMBER 2005 – REVISED MARCH 2013 www.ti.com PIN DESCRIPTIONS (continued) 24 IN_VCOM Input VCOM 25 OUT_VCOM Output VCOM 26,27 NC No connection 28 OUT_18 Output gamma buffer 18 29 OUT_17 Output gamma buffer 17 30 OUT_16 Output gamma buffer 16 31 OUT_15 Output gamma buffer 15 32 OUT_14 Output gamma buffer 14 33 OUT_13 Output gamma buffer 13 34 OUT_12 Output gamma buffer 12 35 OUT_11 Output gamma buffer 11 36 OUT_10 Output gamma buffer 10 37 VSS Negative supply voltage (VSS) 38 OUT_9 Output gamma buffer 9 39 OUT_8 Output gamma buffer 8 40 OUT_7 Output gamma buffer 7 41 OUT_6 Output gamma buffer 6 42 OUT_5 Output gamma buffer 5 43 OUT_4 Output gamma buffer 4 44 OUT_3 Output gamma buffer 3 45 OUT_2 Output gamma buffer 2 46 OUT_1 Output gamma buffer 1 47 NC No connection 48 IN_VREF Reference voltage amplifier feedback input Block Diagram VDD VSS IN_1 OUT_1 IN_2 OUT_2 IN_17 OUT_17 IN_18 OUT_18 IN_VCOM OUT_VCOM VREF 1.295V + - IN_VREF 6 OUT_VREF Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM8207 LM8207 www.ti.com SNOSAL5A – SEPTEMBER 2005 – REVISED MARCH 2013 Typical Performance Characteristics At TJ = 25°C, VDD = 16V, VSS = 0V. Unless otherwise specified. Output Voltage Swing (Positive rail) 16 1.8 15.8 1.6 15.6 1.4 15.4 1.2 VCOM BUFFER 1 0.8 GAMMA BUFFER 17-18 VCOM BUFFER 15 14.8 14.6 0.6 GAMMA BUFFER 3-16 14.4 0.4 GAMMA BUFFER 17-18 0.2 GAMMA BUFFER 3-16 14.2 GAMMA BUFFER 1-2 14 0 0 0.4 0.8 1.2 14 2 1.6 14.4 14.8 15.2 16 15.6 VIN (V) VIN (V) Figure 2. Figure 3. Voltage Drop vs. Output Current (VCOM Buffer) Voltage Drop vs. Output Current (VCOM Buffer) 10 10 1 1 125°C 0.1 25°C 85°C -40°C 0.01 VOUT FROM VIN (V) VOUT FROM VIN (V) GAMMA BUFFER 1-2 15.2 VOUT (V) VOUT (V) Output Voltage Swing (Negative rail) 2 0.1 125°C -40°C 0.01 85°C 25°C 0.001 0.1 0.001 1 10 100 1000 0.1 ISINKING (mA) 1 10 100 1000 ISOURCING (mA) Figure 4. Figure 5. Voltage Drop vs. Output Current (Gamma Buffer) Voltage Drop vs. Output Current (Gamma Buffer) 10 10 -40°C -40°C 0.1 25°C 0.01 1 VOUT FROM VIN (V) VOUT FROM VIN (V) 125°C 1 25°C 0.1 85°C 0.01 125°C 125°C 85°C 0.001 0.1 1 10 100 0.001 0.1 ISINKING (mA) 1 10 ISOURCING (mA) Figure 6. Figure 7. Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM8207 7 LM8207 SNOSAL5A – SEPTEMBER 2005 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) At TJ = 25°C, VDD = 16V, VSS = 0V. Unless otherwise specified. Offset Voltage vs. Supply Voltage (Gamma Buffer) Offset Voltage vs. Supply Voltage (VCOM Buffer) 3 3 2 25°C -40°C 85°C VOS (mV) VOS (mV) 2 125°C 1 1 0 85°C 25°C -40°C 125°C 0 -1 6 8 12 10 14 16 6 12 14 16 Figure 8. Figure 9. Recovery Time (VCOM Buffer) Negative Slope (CL = 100 pF) Recovery Time (VCOM Buffer) Positive Slope (CL = 100 pF) 8.8 VPULSE = 4 VPP VPULSE = 4 VPP 8.6 8.6 8.4 8.4 8.2 8.2 OUT_VCOM OUT_VCOM 10 VDD (V) 8.8 8.0 7.8 8.0 7.8 7.6 7.6 7.4 7.4 7.2 7.2 TIME 200 ns/DIV TIME 200 ns/DIV Figure 10. Figure 11. Large Signal Transient Response (VCOM Buffer) Negative Slope (CL = 100 pF) Large Signal Transient Response (VCOM Buffer) Positive Slope (CL = 100 pF) 10.5 10.5 10.0 10.0 9.5 9.5 9.0 OUT_VCOM 8.5 8.0 7.5 IN_VCOM VOLTAGE (V) VOLTAGE (V) 9.0 IN_VCOM 8.5 8.0 OUT_VCOM 7.5 7.0 7.0 6.5 6.5 6.0 6.0 5.5 8 8 VDD (V) 5.5 1 Ps/DIV 1 Ps/DIV Figure 12. Figure 13. Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM8207 LM8207 www.ti.com SNOSAL5A – SEPTEMBER 2005 – REVISED MARCH 2013 Typical Performance Characteristics (continued) At TJ = 25°C, VDD = 16V, VSS = 0V. Unless otherwise specified. Frequency Response for Various Temperature (VCOM Buffer) Frequency Response for Various Load (VCOM Buffer) 3 1 0 CL = 100 pF -40°C 0 -1 CL = 68 pF GAIN (dB) GAIN (dB) 25°C -2 85°C 105°C -3 -4 CL = 15 pF -3 NO LOAD -6 -5 -6 100k 1M 10M -9 100k 100M 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) Figure 14. Figure 15. Gain/Phase (Gamma Buffer) (CL = 100 pF) PSRR (VCOM Buffer) 0 3 100M 100 90 PHASE 80 -90 0 -3 PHASE (°) GAIN (dB) -180 PSRR (dB) 70 GAIN 50 40 30 -270 -6 60 20 10 -9 10k 100k 1M 10M 0 100 -360 100M 1k 10k 100k FREQUENCY (Hz) FREQUENCY (Hz) Figure 16. Figure 17. Recovery Time (Gamma Buffer 3-16) Negative Slope (CL = 100 pF) Recovery Time (Gamma Buffer 3-16) Positive Slope (CL = 100 pF) 10.0 10.0 VPULSE = 4 VPP 9.5 9.5 9.0 9.0 OUT_GAMMA OUT_GAMMA VPULSE = 4 VPP 8.5 8.0 7.5 8.5 8.0 7.5 7.0 7.0 6.5 6.5 6.0 6.0 TIME 200 ns/DIV TIME 200 ns/DIV Figure 18. Figure 19. Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM8207 9 LM8207 SNOSAL5A – SEPTEMBER 2005 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) At TJ = 25°C, VDD = 16V, VSS = 0V. Unless otherwise specified. Large Signal Transient Response (Gamma Buffer 3-16) Positive slope (CL = 100 pF) 10.5 10.5 10.0 10.0 9.5 9.5 9.0 9.0 VOLTAGE (V) VOLTAGE (V) Large Signal Transient Response (Gamma Buffer 3-16) Negative slope (CL = 100 pF) 8.5 8.0 7.5 OUT_GAMMA 7.0 IN_GAMMA OUT_GAMMA 8.5 8.0 7.5 7.0 IN_GAMMA 6.5 6.5 6.0 6.0 5.5 5.5 1 Ps/DIV 1 Ps/DIV Figure 20. Figure 21. Frequency Response for Various Load (Gamma Buffer) Frequency Response for Various Temperature (Gamma Buffer) 3 1 -40°C CL = 100 pF 0 CL = 15 pF 25°C -1 CL = 68 pF GAIN (dB) GAIN (dB) 0 -3 NO LOAD 85°C -2 105°C -3 -4 -6 -5 -9 100k 1M -6 100k 10M 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) Figure 22. Figure 23. Gain/Phase (Gamma Buffer) (CL = 100 pF) PSRR (Gamma Buffer) 100 0 3 90 PHASE 80 -90 -3 -180 70 PSRR (dB) GAIN (dB) GAIN PHASE (°) 0 60 50 40 30 -6 -270 20 10 -9 -360 10k 100k 1M 10M 1k 10k 100k FREQUENCY (Hz) FREQUENCY (Hz) Figure 24. 10 0 100 Figure 25. Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM8207 LM8207 www.ti.com SNOSAL5A – SEPTEMBER 2005 – REVISED MARCH 2013 Typical Performance Characteristics (continued) At TJ = 25°C, VDD = 16V, VSS = 0V. Unless otherwise specified. Supply Current vs. Supply Voltage Voltage Reference vs. Output Current 7 1.36 6.8 1.35 85°C 25°C 6.6 125°C 1.34 6.2 VREF (V) IDD (mA) 6.4 125°C 6 -40°C 5.8 1.33 1.32 25°C 1.31 5.6 1.30 85°C 1.29 -40°C 5.4 5.2 5 1.28 6 8 10 12 14 16 0 5 10 15 20 25 30 35 40 45 50 55 60 ILOAD (mA) VDD (V) Figure 26. Figure 27. Voltage Reference vs. Supply Voltage Voltage Reference PSRR (Line Regulation) 80 1.33 70 1.32 125°C 60 PSRR (dB) VREF (V) 1.31 25°C 1.30 50 40 30 1.29 20 85°C 1.28 -40°C 10 0 1.27 6 8 10 12 14 16 10 100 1k 10k 10k FREQUENCY (Hz) VDD (V) Figure 28. Figure 29. Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM8207 11 LM8207 SNOSAL5A – SEPTEMBER 2005 – REVISED MARCH 2013 www.ti.com APPLICATION SECTION INTRODUCTION The performance capabilities of TFT-LCD’s increase rapidly, with constant improvements such as larger sizes, higher resolution, and greater brightness. Today’s LCD’s have screen resolutions of over 1 Mega pixel and higher. The LM8207 can be used to improve the performance of an LCD. It is designed for buffering 18 gamma voltage levels and driving the VCOM level. These voltage levels can be derived from a highly stable Voltage Reference, which is included in the LM8207. The LM8207 meets the design requirements that combine technical improvement with the demand for cost effective solutions. The following sections discuss the principle operation of a TFT-LCD and the principle operation of the LM8207 which includes sections on each of the following: the Voltage Reference, the Gamma Buffers, and the VCOM Buffer. After this, the next sections present a typical LM8207 configuration and consider the maximum power dissipation. The end of this application section introduces the evaluation board and presents layout recommendations. PRINCIPLE OPERATION OF A TFT-LCD This section offers a brief overview of the principle operating of TFT-LCD’s. There is a detailed description of how information is presented on the display. An explanation of how data is written to the screen pixels and how the pixels are selected is also included. TRANSMITTED LIGHT POLARIZER GLASS SUBSTRATE LIQUID CRYSTAL MATERIAL GLASS SUBSTRATE TOP ITO PLATE BOTTOM ITO PLATE VPIXEL ± POLARITY POLARIZER LIGHT SOURCE Figure 30. Individual LCD Pixel Figure 30 shows a simplified illustration of an individual LCD pixel. The top and bottom plates of a pixel consist of Indium-Tin Oxide (ITO), which is a transparent, electrically conductive material. ITO lies on the inner surfaces of two glass substrates that are the front and back glass panels of a TFT display. Sandwiched between two ITO plates is an insulating material (liquid crystal). This alters the polarization of light, depending on how much voltage (VPIXEL) is applied across the two plates. Polarizer’s are placed on the outer surfaces of the two glass substrates. In combination with the liquid crystal, the polarizer’s create a variable light filter that modulates light transmitted from the back to the front of a display. A pixel’s bottom plate lies on the backside of a display where a light source is applied, and the top plate lies on the front, facing the viewer. For most TFT displays, a pixel transmits the greatest amount of light when VPIXEL ≤ ±0.5 V, and it becomes less transparent as the voltage increases with either a positive or negative polarity. For color displays, each pixel is built with three individual sub pixels. Each sub pixel represents a primary color. These colors are Red, Green and Blue (RGB). Combining these three primary colors every user-defined color can be created. Figure 31 shows a simplified diagram of a TFT display, showing how individual pixels are connected to the row, column and VCOM driver. Each pixel is represented by a capacitor with a NMOS transistor connected to its top plate. Pixels in a TFT panel are arranged in rows and columns. Row lines are connected to the NMOS gates, and column lines to the NMOS sources. The back plate of every pixel is connected to a common voltage called VCOM. The voltage applied to the top plates (also called gamma voltage) controls the pixel brightness. The 12 Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM8207 LM8207 www.ti.com SNOSAL5A – SEPTEMBER 2005 – REVISED MARCH 2013 column drivers supply this gamma voltage via the column lines, and ‘write’ this voltage to the pixels one row at a time. This is accomplished by having the row drivers selecting an individual row of pixels when the column driver writes the gamma voltage levels. The row drivers sequentially apply a large positive pulse (typically 25V to 35V) to each row line. This turns on the NMOS transistors connected to an individual row, allowing voltage from the column lines to be written to the pixels. ROW DRIVERS COLUMN DRIVERS CSTRAY CSTRAY CSTRAY VCOM VCOM VCOM PIXEL PIXEL PIXEL APPROX TFT-LCD PANEL VDD/2 VCOM BUFFER Figure 31. TFT Display The VCOM driver (buffer) supplies a common voltage (VCOM) to all the pixels in a TFT panel. VCOM is a constant DC voltage that is in the middle of the gamma voltage range. As a result, when a column driver writes to a row of pixels, the applied voltages are either positive or negative with respect to VCOM. In fact, the polarity of a pixel is reversed each time a row is selected, preventing a pattern from being ‘burned’ into the LCD. VCOM GAMMA CORRECTION CURVE LM8342 REFERENCE LM8207 VREF 18 GAMMA BUFFER TIMING CONTROL MULTI SOURCE DC/DC CONVERTER & LDO VCOM BUFFER COLUMN DRIVER ROW DRIVER DISPLAY Figure 32. Block Diagram of a Typical TFT-LCD Figure 32 shows how the display information is refreshed. Using the row and column drivers, one pixel is addressed at the display. The column driver receives the digital color data from the timing controller. The corresponding gamma voltage will be determined, using the gamma correction curve. In fact, the gamma correction curve is just a voltage reference with 18 output tabs, which presets the color intensity settings. This gamma voltage is written to the pixel. The column driver selects one column at the time; the changing in the load may affect the ‘tabs’ of the gamma correction curve. This problem can be solved using ‘gamma buffers’ to isolate the gamma correction curve from the column driver. Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM8207 13 LM8207 SNOSAL5A – SEPTEMBER 2005 – REVISED MARCH 2013 www.ti.com PRINCIPLE OPERATION of the LM8207 The LM8207 combines three basic functions used in TFT displays: • Voltage Reference – To improve picture quality and to reduce brightness variations, a highly stable reference voltage is available. It has a low drift over the operation temperature range. This output voltage (OUT_VREF) is used as the reference voltage to define the gamma correction values. • Gamma Buffers – The gamma correction curve can be defined easily using an external chain of precision resistors. To ensure load independent gamma correction levels, 18 gamma buffers, each having a low output resistance, can be used to drive the TFT display column drivers. • VCOM Buffer – The VCOM buffer supplies a common voltage, which is applied to the back plate of all the pixels. Writing color information to all the pixels will cause high current variations at the VCOM level so this VCOM buffer is designed for driving large output currents. These three functions are discussed in detail in the following sections. VOLTAGE REFERENCE The internal Voltage Reference of the LM8207 can be used to improve picture stability. This accurate reference is highly stable over the operation temperature range. The output voltage (OUT_VREF) of the Voltage Reference can be set using two external resistors. In the next two sections, the possibilities for setting the output voltage of the Voltage Reference and the operating range of the Voltage Reference are discussed. SETTING THE OUTPUT VOLTAGE OF THE VOLTAGE REFERENCE The output voltage of the Voltage Reference Amplifier (OUT_VREF) can be set using the internal reference in combination with the internal amplifier and two external resistors. In Figure 33 a typical application circuit for VREF is given. + 1.295V VREF + - OUT_VREF R1 IN_VREF IIN_V REF R2 LM8207 Figure 33. Typical Application Circuit for VREF To calculate the output voltage of the Voltage Reference Amplifier (OUT_VREF) use the following equation: §R + R 2 ¨ 1 ¨ R2 © § ¨ ¨ © OUT_VREF = 1.295 x + R1 x IIN_VREF (1) As can be seen in the 16V Electrical Characteristics table, IIN_VREF has a typical value of −10 nA. Using resistor values for R1 = 9 kΩ and R2 = 1 kΩ this results in a gain of 10 and OUT_VREF = 12.95 V an error will be introduced of −10 nA*9 kΩ = −90 μV. This error can be neglected. The simplified formula for calculating the OUT_VREF is: 14 §R + R 2 ¨ 1 ¨ R2 © § ¨ ¨ © OUT_VREF = 1.295 x (2) Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM8207 LM8207 www.ti.com SNOSAL5A – SEPTEMBER 2005 – REVISED MARCH 2013 Example: VDD = 16V OUT_VREF = 14.4V Choose R2 = 5 kΩ. Using Equation 2, this will result in R1 = 50.6 kΩ THE OPERATING RANGE OF THE VOLTAGE REFERENCE The output of the Voltage Reference Amplifier has a minimum of 1.295V (R1 = 0). This is determined by the value of the internal reference. The maximum output voltage (OUT_VREFMAX) can approach the positive supply rail VDD. The voltage is limited by the output resistance (ROUT) of the output stage of the internal amplifier and depends on the load current. Figure 34 shows the operating output voltage range. 16V OUT_VREF HEADROOM OPERATING OUTPUT VOLTAGE RANGE | 1.295V 0 0 IOUT_V REF ILOAD Figure 34. Operating Output Voltage Range The minimum headroom (OUT_VREF with respect to the positive supply rail VDD) can be measured using the test circuit shown in Figure 35. + 1.295V VREF + - OUT_VREF R1 IN_VREF ILOAD R2 LM8207 Figure 35. Headroom Test Circuit with Variable Output Current Load The headroom is measured by varying both the supply voltage and the output current (ILOAD) for a fixed programmed value of OUT_VREF. As shown in Figure 36, the minimum headroom slightly increases for a constant VDD when the load current increases. Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM8207 15 LM8207 SNOSAL5A – SEPTEMBER 2005 – REVISED MARCH 2013 www.ti.com 0.9 0.8 HEADROOM (V) 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 0 2 4 6 8 10 ILOAD (mA) Figure 36. Voltage Reference Headroom vs. Load Current GAMMA BUFFERS This section gives an overview for the applications of the gamma buffers and also defines the gamma correction curve. Specifications for the buffers are derived from their operation range. Also included are the formulas for the realization of the gamma correction curve using external resistors. An overview is given for the gamma voltage accuracy, using the LM8207 in combination with external resistors. As discussed in the section entitled “Principle Operation of a TFT-LCD,” the basic function of the gamma buffers is to make the gamma correction curve independent of the behavior of the column driver. Writing data to each subsequent pixel will cause load variations. The gamma buffers have a low impedance output and can handle these variations without changing the gamma correction curve. A typical gamma correction curve is given in Figure 37. VGMA1 VGMA3 VGMA5 VGMA7 VCOM VGMA12 VGMA14 VGMA16 VGMA18 0 32 64 96 128 160 192 224 256 INPUT (DIGITAL VALUE) Figure 37. Typical Gamma Correction Curve Each buffer covers a part of the correction curve and, therefore, has its own specifications. All buffers require that the output should recover quickly from disturbances caused by the switching of the column driver. The gamma voltage level of each buffer (VGMA1…VGMA18) depends on its position for the levels decrease sequentially. To best utilize the LM8207, each buffer is optimized for its position in the gamma correction curve. • Gamma Buffers 1-2 – Operating voltage range: VDD to VSS +2V. Due to the operating voltage, only negative transitions at the output are possible. Positive transitions will exceed the supply voltage VDD. These buffers are able to source current to bias the resistive load of the column driver having an open collector structure. To meet the operating voltage range, these outputs need a resistive load connected to a lower potential sourcing an output current of at least 1 mA. • Gamma Buffers 3-16 – Operating voltage range: VDD – 1V to VSS + 1V. Due to the operating range, both positive and negative transitions at the outputs are possible. 16 Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM8207 LM8207 www.ti.com • SNOSAL5A – SEPTEMBER 2005 – REVISED MARCH 2013 Gamma Buffers 17-18 – Operating voltage range: VDD - 2 to VSS. Due to the operating voltage, only positive transitions at the output are possible. Negative transitions will exceed the negative supply voltage VSS. These buffers are able to sink current from the resistive load of the column driver having an open collector structure. To meet the operating voltage range, these outputs need a resistive load connected to a higher potential sinking an output current of at least 1 mA Example: A typical application using the LM8207 is given in Figure 38. The corresponding gamma correction curve (VGMA1...VGMA18) is defined in Table 1. The Voltage Reference supplies the 14.4V to the resistor network. The calculations for the resistor values and for setting the Voltage Reference are shown in the section “Voltage Reference.” LM8207 14.4 V GAMMA_1 VGMA1 VGMA2 R1 VGMA3 R2 GAMMA_2 GAMMA_3 GAMMA_4 GAMMA_5 GAMMA_6 GAMMA_7 GAMMA_8 GAMMA_9 GAMMA_10 COLUMN DRIVERS GAMMA_11 GAMMA_12 GAMMA_13 GAMMA_14 GAMMA_15 VGMA16 GAMMA_16 VGMA17 R16 VGMA18 R17 GAMMA_17 GAMMA_18 R18 Figure 38. Typical TFT Display Application Diagram Using the LM8207 The values of the resistors in the gamma correction curve are calculated such that a current of 1 mA flows in the resistor chain. I § ¨ ¨ © © and RX = § ¨ ¨ © VGMAx I § ¨ ¨ © § VGMA18 ¨ R18 = ¨ 18 ¦ Ry y=x+1 - where • x is the index for the corresponding gamma voltage and has a range of 1 to 18 (3) Using these formulas the resistor values in Table 1 are calculated. High accuracy resistors values can be realized using 0.1% resistors. A method for fine-tuning the resistor value is to combine two resistors in series. Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM8207 17 LM8207 SNOSAL5A – SEPTEMBER 2005 – REVISED MARCH 2013 www.ti.com Table 1. Resistor Values for Defining the Gamma Correction Curve Gamma Curve Definition VGMA Node VGMA Voltage Calculated Resistance (Ω) 1 11.59 210 2 11.38 2200 3 9.18 670 4 8.51 670 5 7.84 430 6 7.41 280 7 7.13 980 8 6.15 80 9 6.07 170 10 5.90 80 11 5.82 980 12 4.84 280 13 4.56 430 14 4.13 670 15 3.46 730 16 2.73 2190 17 0.54 210 18 0.33 330 Changing the gamma correction curve, in combination with the load of the column drivers can impact the behavior of the gamma buffers. Gamma buffers 1 and 2 are designed for operating voltages near VDD, and will source the current into the column drivers. Gamma buffers 17 and 18 are designed for operating voltages near VSS and will sink this current. Buffers 3 to 16 are designed to operate in the mid-voltage range and can sink or source current. Under special circumstances, by increasing the voltage gap between gamma buffer 1 and gamma buffer 2, in combination with a low impedance load of the column driver between these outputs, the output of buffer 2 has to sink more current than possible, and can saturate. This will result in a setting error of the inputs of the column driver. For buffer 17 and 18 an identical situation can occur, by increasing the operating voltage range of buffer 17 with respect to buffer 18. A simple and cost effective solution is to lower the resistance between buffer 2 and 3 or buffer 16 and 17, using an additional by-pass resistor RS. This method is presented in Figure 39. This will not affect the desired voltage levels, and buffer 3 which has a larger linear output current spec will sink the current instead of buffer 2. The resistor value RS can be calculated by the voltage drop divided by the current. The resistor value should be low enough to sink this current, otherwise buffer 2 and/or buffer 17 will still saturate. 18 Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM8207 LM8207 www.ti.com SNOSAL5A – SEPTEMBER 2005 – REVISED MARCH 2013 LM8207 COLUMN DRIVER OUT_1 IOUT_1 OUT_2 IOUT_2 OUT_3 IOUT_3 V3 OUT_4 IOUT_4 V4 V1 V2 RS BY-PASS RESISTOR Figure 39. Using additional by-pass resistor to increase current sinking capability GAMMA VOLTAGE ACCURACY Adding buffers to the tabs of the gamma correction resistor chain will make the values more independent of the load variations. Unfortunately, there are some other effects that will influence the gamma values. The following effects determine the accuracy of each gamma voltage. Major effects are: • Variation of the internal voltage reference. This can be found in the 16V Electrical Characteristics table. This is the maximum variation between parts. • Variation of the feedback resistors used for setting the output voltage of the voltage reference (OUT_VREF). Using high accuracy resistors will result in a small variation of the output voltage between different boards • The accuracy of the resistors obtained from the gamma correction voltage curve. The gamma correction curve will be affected by the accuracy of the resistors. This will vary over different boards. Temperature variations will not affect this curve. • Output offset voltage (VOS) of the buffers. Variations of VOS (output offset voltage) of the buffers, will affect the gamma correction curve. The contribution of VOS is higher for the buffers driving the lower gamma voltages. Minor effects are: • Input current (IBIAS) of the gamma buffers. Variations of the input current (IBIAS) of the gamma buffers caused by temperature changes, will affect the gamma correction voltages. VCOM BUFFER The VCOM buffer supplies a common voltage to the back plate of all the pixels in a TFT panel. When column drivers write to the pixels, current pulses will occur onto the VCOM line. These pulses are the result of charging the capacitance between VCOM and the column lines. This capacitance is a combination of stray capacitance and pixel capacitance. This stray capacitance varies between panel sizes but typically ranges from 16 pF to 33 pF per column. Pixel capacitance is in the order of 0.5 pF and contributes very little to these pulses because only one pixel at a time is connected to a column. Charging this capacitance can result in short positive or negative current pulses of 100 mA or more, depending on the panel size. The VCOM buffer is designed to handle these pulses. A VCOM buffer is basically a voltage regulator that can sink or source current in large capacitive loads. The VCOM buffer should recover very fast from these disturbances. The operating voltage of the VCOM buffer is in the middle of the gamma voltage range. Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM8207 19 LM8207 SNOSAL5A – SEPTEMBER 2005 – REVISED MARCH 2013 www.ti.com VREF LM8342 VCOM R1 5 k: VCOM BUFFER DISPLAY REFERENCE R2 5 k: Figure 40. VCOM Buffer The typical application in Figure 40 shows the VCOM buffer supplying a common voltage to the back plate of the display. This level can be adjusted by changing the value of the resistors. Increasing the value of R1 or decreasing the value of R2 will decrease the VCOM level. Increasing the value of R2 or decreasing the value of R1 will increase the VCOM level. Another, more flexible, solution is to use Texas Instruments’ programmable VCOM calibrator, the LM8342. The VCOM level can be adjusted using an I2C interface. See the LM8342 Programmable TFT V COM Calibrator with Non-Volatile Memory datasheet (literature number: snosam0) for more detailed information about this part. LM8207 CONFIGURATION A complete configured typical application of the LM8207 is given in Figure 41. All three basic functions of the LM8207 are discussed in the previous sections. Details for setting the Voltage Reference are given in the “Voltage Reference” section. Calculations for defining a gamma correction curve are given in the section entitled “Gamma Buffers.” Defining and adjusting the VCOM level is discussed in the “VCOM Buffer” section. The LM8207 is an 18 channel gamma buffer plus a VCOM buffer. In certain applications some of the gamma buffers or the VCOM buffer may not be used. In such cases it is recommended that the unused buffer input pins be tied to the input voltage range value. 20 Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM8207 LM8207 www.ti.com SNOSAL5A – SEPTEMBER 2005 – REVISED MARCH 2013 OUT_VREF 2800: IN_1 210: IN_2 2200: 5 k: IN_VREF 50.6 k: 14.4V OUT_1 OUT_2 IN_3 OUT_3 IN_4 OUT_4 670: 670: IN_5 OUT_5 IN_6 OUT_6 IN_7 OUT_7 IN_8 OUT_8 IN_9 OUT_9 430: 280: 980: 80: 170: LM8207 IN_10 OUT_10 ABC COLUMN DRIVERS 80: IN_11 OUT_11 IN_12 OUT_12 IN_13 OUT_13 IN_14 OUT_14 IN_15 OUT_15 IN_16 OUT_16 IN_17 OUT_17 IN_18 OUT_18 980: 280: 430: 670: 730: 2190: 210: 330: VREF PROGRAMMABLE 5 k: VCOM CALIBRATOR 5 k: IN_VCOM TO DISPLAY VSS VDD LM8342 OUT_VCOM + 100 PF 10 nF 16V Figure 41. LM8207 Configuration Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM8207 21 LM8207 SNOSAL5A – SEPTEMBER 2005 – REVISED MARCH 2013 www.ti.com MAXIMUM POWER DISSIPATION The maximum power dissipation in the LM8207 TSSOP package depends on the ambient temperature and the increase of the junction temperature of the die. Exceeding the maximum temperature will damage the part. (See the Absolute Maximum Ratings table.) The VCOM buffer of the LM8207 is designed for use in pulsed conditions. Driving a continuous current of several hundred mA to a load will damage the part due to the high power consumption of the output stage of the VCOM buffer. The maximum operating temperature can be calculated using this formula: TJ = TA + θJA x PDISSIPATION where • • • TA = Ambient temperature θJA = Thermal resistance of package (See Operating Ratings table) (84°C/W) PDISSIPATION = Total power dissipation of the LM8207 (4) Examples: The estimated power consumption of the LM8207 in a steady state situation with no load is: VDD = 16V IDD = 6 mA (all buffers within normal operating range) OUT_VREF = 14.4V ILOAD = 3 mA VDD x IDD = 16 V x 6 mA (VDD - OUT_VREF) x ILOAD = (16 V – 14.4 V) x 3 mA = 4.8 mW Total steady state power dissipation = 100.8 mW For an ambient temperature TA of 40°C and a dissipated power of 100.8 mW, the junction temperature TJ will be 49°C. This will not exceed the maximum operating temperature. Two issues are not considered in the calculation: • Continuous power dissipation of the gamma buffers. This is load dependent, and can be calculated using the voltage drop over the output stage times the output current: – P = (VDD-VGMAx) x IOUT for current sourcing – P = (VGMAx) x IOUT for current sinking • Pulsed power dissipation of the buffers. The RMS value of this pulsed current depends on the magnitude of the current fluctuations and the duty cycle. This can majorly contribute to the total power dissipation. When the LM8207 is in steady state biasing, the V buffer is considered at three various load conditions: (1) IOUTRMS (mA) VCOM Level (V) Dissipation (mW) Temp Rise TJ 10 8 50 8 80 7 56 400 35 100 (1) 8 800 83 67 107 When IOUTRMS = 100 mA, the package (TJ) will exceed the Operating Temperature EVALUATION BOARD For testing purposes an evaluation board is available. It is intended to evaluate the following functions: • The Voltage Reference is fully adjustable within the operating range. For optimal output voltage ranges, user defined resistors can be trimmed by using two resistors in series. • The Gamma correction curve is user defined using external resistors. Each optimal value can be achieved by using two series resistors for fine-tuning. • The VCOM node input voltage can be achieved using Texas Instruments’ LM8342 programmable VCOM calibrator, or using an external supply. • For testing, an additional dummy load can be connected to all outputs of the gamma buffers. 22 Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM8207 LM8207 www.ti.com SNOSAL5A – SEPTEMBER 2005 – REVISED MARCH 2013 R7 IN_1 J5 Vref IN_2 IN_3 IN_4 IN_5 OUT_1 1 2 R3 R8 R8* R3* OUT_2 R4 R9 R4* OUT_3 R6 R10 R6* OUT_4 R11 R14 R9* R10* R14* R11* OUT_5 R2 R2* R1 R1* R15 R12 R17 J1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 IN_1 IN_8 IN_2 IN_3 IN_4 IN_5 IN_6 IN_9 IN_7 IN_8 IN_9 IN_10 IN_11 IN_10 IN_12 IN_13 IN_14 IN_15 IN_16 IN_11 IN_17 IN_18 IN_VCOM IN_12 R17* R18 R18* R19 R19* R20 R20* R25 R25* R26 IN_13 R26* R16* 46 45 44 43 42 41 40 39 38 36 35 34 33 32 31 30 29 28 27 26 25 OUT_7 R21 R29 R29* OUT_13 R30 R30* OUT_14 R34 R34* C2 R31* OUT_15 R35 R35 J3 R33 IN_17 R33* J4 BANANA JACK R32* BANANA JACK IN_16 R35* OUT_16 R36 R36* OUT_17 R39 R37 IN_18 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 R28* R31 IN_15 J2 OUT_12 37 C1 R21* OUT_8 OUT_1 OUT_2 OUT_3 R22 OUT_4 OUT_5 R22* OUT_6 OUT_9 OUT_7 OUT_8 R23 OUT_9 OUT_10 R23* OUT_10 OUT_11 OUT_12 OUT_13 R24 OUT_14 OUT_15 R24* OUT_11 OUT_16 OUT_17 OUT_18 R28 OUT_VCOM VSS 12 IN_14 R27* OUT_6 R16 OUT_1 IN_1 OUT_2 IN_2 OUT_3 IN_3 OUT_4 IN_4 OUT_5 IN_5 OUT_6 IN_6 OUT_7 IN_7 OUT_8 IN_8 OUT_9 IN_9 OUT_10 IN_10 OUT_11 IN_11 OUT_12 IN_12 OUT_13 IN_13 OUT_14 IN_14 OUT_15 IN_15 OUT_16 IN_16 OUT_17 IN_17 OUT_18 IN_18 NC NC NC NC IN_VCOM OUT_VCOM VDD R27 R15* in_Vref 3 4 5 6 7 8 9 10 11 13 14 15 16 17 18 19 20 21 22 23 24 R13* U1 out_Vref R13 IN_7 48 1 IN_6 R12* R39* R37* OUT_18 R38 OUT_VCOM IN_VCOM Figure 42. Schematic LM8207 Evaluation Board Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM8207 23 LM8207 SNOSAL5A – SEPTEMBER 2005 – REVISED MARCH 2013 www.ti.com Figure 43. Layout of LM8207 Evaluation Board (Actual Size) — Bottom View Figure 44. Layout of LM8207 Evaluation Board (Actual Size) — Top View 24 Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM8207 LM8207 www.ti.com SNOSAL5A – SEPTEMBER 2005 – REVISED MARCH 2013 LAYOUT RECOMMENDATIONS A proper layout is necessary for optimum performance of the LM8207. A low impedance and clean ground plane is recommended. The traces from the VSS pin to the ground plane should be as short as possible. Decoupling capacitors should be placed very close to the VDD pin. Connections of these decoupling capacitors to the ground plane should be very short. An additional decoupling capacitor for OUT_VREF is recommended. Due to the heavy current peaks and short transitions at the VCOM node, traces from the output of the VCOM buffer should be low impedance and as short as possible, to minimize both voltage drops over the trace and unwanted EM disturbances. Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM8207 25 LM8207 SNOSAL5A – SEPTEMBER 2005 – REVISED MARCH 2013 www.ti.com REVISION HISTORY Changes from Original (March 2013) to Revision A • 26 Page Changed layout of National Data Sheet to TI format .......................................................................................................... 25 Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM8207 PACKAGE OPTION ADDENDUM www.ti.com 10-Jul-2014 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LM8207MT/NOPB NRND TSSOP DGG 48 38 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR -40 to 105 LM8207MT LM8207MTX/NOPB NRND TSSOP DGG 48 1000 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR -40 to 105 LM8207MT (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 10-Jul-2014 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 2-Mar-2016 TAPE AND REEL INFORMATION *All dimensions are nominal Device LM8207MTX/NOPB Package Package Pins Type Drawing TSSOP DGG 48 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 1000 330.0 24.4 Pack Materials-Page 1 8.6 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 13.2 1.6 12.0 24.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 2-Mar-2016 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM8207MTX/NOPB TSSOP DGG 48 1000 367.0 367.0 45.0 Pack Materials-Page 2 MECHANICAL DATA MTSS003D – JANUARY 1995 – REVISED JANUARY 1998 DGG (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 48 PINS SHOWN 0,27 0,17 0,50 48 0,08 M 25 6,20 6,00 8,30 7,90 0,15 NOM Gage Plane 1 0,25 24 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 48 56 64 A MAX 12,60 14,10 17,10 A MIN 12,40 13,90 16,90 DIM 4040078 / F 12/97 NOTES: A. B. C. D. All linear dimensions are in millimeters. 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