LM4901 www.ti.com LM4901 SNAS139F – DECEMBER 2001 – REVISED DECEMBER 2001 1.6 Watt Audio Power Amplifier with Selectable Shutdown Logic Level Check for Samples: LM4901 FEATURES DESCRIPTION • The LM4901 is an audio power amplifier primarily designed for demanding applications in mobile phones and other portable communication device applications. It is capable of delivering 1 watt of continuous average power to an 8Ω BTL load and 1.6 watts of continuous avearge power to a 4Ω BTL load with less than 1% distortion (THD+N) from a 5VDC power supply. 1 2 • • • • • • • • Available in Space-Saving Packages: WSON and VSSOP Ultra Low Current Shutdown Mode BTL Output can Drive Capacitive Loads Improved Pop & Click Circuitry Eliminates Noise During Turn-On and Turn-Off Transitions 2.0 - 5.5V Operation No Output Coupling Capacitors, Snubber Networks or Bootstrap Capacitors Required Unity-Gain Stable External Gain Configuration Capability User Selectable Shutdown High or Low logic Level APPLICATIONS • • • Mobile Phones PDAs Portable Electronic Devices KEY SPECIFICATIONS • • • • • • Improved PSRR at 217Hz & 1KHz 62 dB Power Output at 5.0V, 1% THD, 4Ω 1.6 W (typ) Power Output at 5.0V, 1% THD, 8Ω 1.07 W (typ) Power Output at 3.0V, 1% THD, 4Ω 525 mW (typ) Power Output at 3.0V, 1% THD, 8Ω 390 mW (typ) Shutdown Current 0.1μA (typ) Boomer audio power amplifiers were designed specifically to provide high quality output power with a minimal amount of external components. The LM4901 does not require output coupling capacitors or bootstrap capacitors, and therefore is ideally suited for mobile phone and other low voltage applications where minimal power consumption is a primary requirement. The LM4901 features a low-power consumption shutdown mode. To facilitate this, Shutdown may be enabled by either logic high or low depending on mode selection. Driving the shutdown mode pin either high or low enables the shutdown pin to be driven in a likewise manner to enable shutdown. The LM4901 contains advanced pop and click circuitry which eliminates noise which would otherwise occur during turn-on and turn-off transitions. The LM4901 is unity-gain stable and can be configured by external gain-setting resistors. 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2001, Texas Instruments Incorporated LM4901 SNAS139F – DECEMBER 2001 – REVISED DECEMBER 2001 www.ti.com Typical Application Figure 1. Typical Audio Amplifier Application Circuit Connection Diagrams Top View Top View Figure 2. Mini Small Outline (VSSOP) Package See Package Number DGS0010A Figure 3. WSON Package See Package Number NGZ0010B These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 2 Submit Documentation Feedback Copyright © 2001, Texas Instruments Incorporated Product Folder Links: LM4901 LM4901 www.ti.com SNAS139F – DECEMBER 2001 – REVISED DECEMBER 2001 Absolute Maximum Ratings (1) (2) Supply Voltage (3) 6.0V −65°C to +150°C Storage Temperature −0.3V to VDD +0.3V Input Voltage Power Dissipation (4) (5) ESD Susceptibility Internally Limited (6) 2000V ESD Susceptibility (7) 200V Junction Temperature 150°C Thermal Resistance θJC (VSSOP) 56°C/W θJA (VSSOP) 190°C/W θJA (WSON) 63°C/W 12°C/W (8) θJC (WSON) Soldering Information (1) (2) (3) (4) (5) (6) (7) (8) (8) See AN-1187 "Leadless Leadframe Package (WSON)" (SNOA401) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication of device performance. If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications. If the product is in Shutdown mode and VDD exceeds 6V (to a max of 8V VDD), then most of the excess current will flow through the ESD protection circuits. If the source impedance limits the current to a max of 10mA, then the device will be protected. If the device is enabled when VDD is greater than 5.5V and less than 6.5V, no damage will occur, although operation life will be reduced. Operation above 6.5V with no current limit will result in permanent damage. The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature TA. The maximum allowable power dissipation is PDMAX = (TJMAX–TA)/θJA or the number given in Absolute Maximum Ratings, whichever is lower. For the LM4901, see power derating curves for additional information. Maximum power dissipation in the device (PDMAX) occurs at an output power level significantly below full output power. PDMAX can be calculated using Equation 2 shown in the Application Information section. It may also be obtained from the power dissipation graphs. Human body model, 100 pF discharged through a 1.5 kΩ resistor. Machine Model, 220 pF–240 pF discharged through all pins. The Exposed-DAP of the NGZ0010B package should be electrically connected to GND or an electrically isolated copper area. The LM4901NGZ demo board (views featured in the Application Information section) has the Exposed-DAP connected to GND with a PCB area of 86.7mils x 585mils (2.02mm x 14.86mm) on the copper top layer and 550mils x 710mils (13.97mm x 18.03mm) on the copper bottom layer. Operating Ratings Temperature Range TMIN ≤ TA ≤ TMAX −40°C ≤ TA ≤ 85°C 2.0V ≤ VDD ≤ 5.5V Supply Voltage Electrical Characteristics VDD = 5V (1) (2) The following specifications apply for the circuit shown in Figure 1, unless otherwise specified. Limits apply for TA = 25°C. Parameter Typical (3) Limit (4) (5) Units (Limits) 3 7 mA (max) VIN = 0V, Io = 0A, 8Ω Load 4 10 mA (max) VSD = VSD Mode 0.1 2.0 µA (max) Shutdown Voltage Input High VSD MODE = VDD 1.5 V (min) Shutdown Voltage Input Low VSD MODE = VDD 1.3 V (max) Shutdown Voltage Input High VSD MODE = GND 1.5 V (min) Quiescent Power Supply Current ISD Shutdown Current VSDIH VSDIL VSDIH (3) (4) (5) LM4901 VIN = 0V, Io = 0A, No Load IDD (1) (2) Test Conditions All voltages are measured with respect to the ground pin, unless otherwise specified. Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication of device performance. Typicals are measured at 25°C and represent the parametric norm. Limits are ensured to TI's AOQL (Average Outgoing Quality Level). Datasheet min/max specification limits are ensured by design, test, or statistical analysis. Submit Documentation Feedback Copyright © 2001, Texas Instruments Incorporated Product Folder Links: LM4901 3 LM4901 SNAS139F – DECEMBER 2001 – REVISED DECEMBER 2001 www.ti.com Electrical Characteristics VDD = 5V(1)(2) (continued) The following specifications apply for the circuit shown in Figure 1, unless otherwise specified. Limits apply for TA = 25°C. Parameter VSDIL Shutdown Voltage Input Low VOS Output Offset Voltage ROUT VSD MODE = GND 50 mV (max) 9.7 kΩ (max) 7.0 kΩ (min) 0.9 W (min) 1.3 V (max) 1.07 (4Ω) (7) (8) THD = 1% (max); f = 1 kHz 1.6 W 100 ms (max) 0.2 % Total Harmonic Distortion+Noise Po = 0.5 Wrms; f = 1kHz Power Supply Rejection Ratio Vripple = 200mV sine p-p Input terminated with 10Ω (8) Units (Limits) THD = 1% (max); f = 1 kHz Wake-up time (7) Limit (4) (5) (8Ω) THD+N (6) Typical (3) 8.5 TWU PSRR LM4901 7 Resistor Output to GND (6) Output Power Po Test Conditions 60 (f = 217Hz) 64 (f = 1kHz) 55 dB (min) RROUT is measured from the output pin to ground. This value represents the parallel combination of the 10kΩ output resistors and the two 20kΩ resistors. The Exposed-DAP of the NGZ0010B package should be electrically connected to GND or an electrically isolated copper area. The LM4901NGZ demo board (views featured in the Application Information section) has the Exposed-DAP connected to GND with a PCB area of 86.7mils x 585mils (2.02mm x 14.86mm) on the copper top layer and 550mils x 710mils (13.97mm x 18.03mm) on the copper bottom layer. The thermal performance of the WSON package (LM4901NGZ) when used with the exposed-DAP connected to a thermal plane is sufficient for driving 4Ω loads. The LM4901NGZ demo board (views featured in the Application Information section) can drive 4Ω loads at the maximum power dissipation point (1.267W) without thermal shutdown circuitry being activated. The other available packages do not have the thermal performance necessary for driving 4Ω loads with a 5V supply and are not recommended for this application. Electrical Characteristics VDD = 3V (1) (2) The following specifications apply for the circuit shown in Figure 1, unless otherwise specified. Limits apply for TA = 25°C. Parameter Test Conditions LM4901 Typical (3) Limit (4) (5) Units (Limits) VIN = 0V, Io = 0A, No Load 2 7 mA (max) VIN = 0V, Io = 0A, 8Ω Load 3 9 mA (max) VSD = VSD Mode 0.1 2.0 µA (max) VSD MODE = VDD 1.1 V (min) Shutdown Voltage Input Low VSD MODE = VDD 0.9 V (max) VSDIH Shutdown Voltage Input High VSD MODE = GND 1.3 V (min) VSDIL Shutdown Voltage Input Low VSD MODE = GND 1.0 V (max) VOS Output Offset Voltage IDD Quiescent Power Supply Current ISD Shutdown Current VSDIH Shutdown Voltage Input High VSDIL ROUT Resistor Output to GND (6) Output Power Po 7 8.5 kΩ (min) mW (4Ω) THD = 1% (max); f = 1 kHz 525 mW 75 ms (max) 0.1 % Total Harmonic Distortion + Noise Po = 0.25 Wrms; f = 1kHz Power Supply Rejection Ratio Vripple = 200mV sine p-p Input terminated with 10Ω 4 kΩ (max) 7.0 390 Wake-up time (3) (4) (5) (6) 9.7 THD = 1% (max); f = 1 kHz THD+N (1) (2) mV (max) (8Ω) TWU PSRR 50 62 (f = 217Hz) 68 (f = 1kHz) 55 dB (min) All voltages are measured with respect to the ground pin, unless otherwise specified. Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication of device performance. Typicals are measured at 25°C and represent the parametric norm. Limits are ensured to TI's AOQL (Average Outgoing Quality Level). Datasheet min/max specification limits are ensured by design, test, or statistical analysis. RROUT is measured from the output pin to ground. This value represents the parallel combination of the 10kΩ output resistors and the two 20kΩ resistors. Submit Documentation Feedback Copyright © 2001, Texas Instruments Incorporated Product Folder Links: LM4901 LM4901 www.ti.com SNAS139F – DECEMBER 2001 – REVISED DECEMBER 2001 Electrical Characteristics VDD = 2.6V (1) (2) The following specifications apply for the circuit shown in Figure 1, unless otherwise specified. Limits apply for TA = 25°C. Parameter Test Conditions LM4901 Typical (3) Limit (4) (5) Units (Limits) VIN = 0V, Io = 0A, No Load 2.0 mA (max) VIN = 0V, Io = 0A, 8Ω Load 3.0 mA (max) Shutdown Current VSD = VSD Mode 0.1 µA (max) VSDIH Shutdown Voltage Input High VSD MODE = VDD 1.0 V (min) VSDIL Shutdown Voltage Input Low VSD MODE = VDD 0.9 V (max) VSDIH Shutdown Voltage Input High VSD MODE = GND 1.2 V (min) VSDIL Shutdown Voltage Input Low VSD MODE = GND 1.0 VOS Output Offset Voltage IDD Quiescent Power Supply Current ISD ROUT Po Resistor Output to GND (6) Output Power THD = 1% (max); f = 1 kHz 275 ( 4Ω ) THD = 1% (max); f = 1 kHz 340 Wake-up time THD+N Total Harmonic Distortion + Noise Power Supply Rejection Ratio (1) (2) (3) (4) (5) (6) 8.5 ( 8Ω ) TWU PSRR 5 V (max) 50 mV (max) 9.7 kΩ (max) 7.0 kΩ (min) mW 70 ms (max) Po = 0.15 Wrms; f = 1kHz 0.1 % Vripple = 200mV sine p-p Input terminated with 10Ω 51 (f = 217Hz) 51 (f = 1kHz) dB (min) All voltages are measured with respect to the ground pin, unless otherwise specified. Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication of device performance. Typicals are measured at 25°C and represent the parametric norm. Limits are ensured to TI's AOQL (Average Outgoing Quality Level). Datasheet min/max specification limits are ensured by design, test, or statistical analysis. RROUT is measured from the output pin to ground. This value represents the parallel combination of the 10kΩ output resistors and the two 20kΩ resistors. External Components Description (See Figure 1) Components Functional Description 1. Ri Inverting input resistance which sets the closed-loop gain in conjunction with Rf. This resistor also forms a high pass filter with Ci at fC= 1/(2π RiCi). 2. Ci Input coupling capacitor which blocks the DC voltage at the amplifiers input terminals. Also creates a highpass filter with Ri at fc = 1/(2π RiCi). Refer to the section, Proper Selection of External Components, for an explanation of how to determine the value of Ci. 3. Rf Feedback resistance which sets the closed-loop gain in conjunction with Ri. 4. CS Supply bypass capacitor which provides power supply filtering. Refer to the Power Supply Bypassing section for information concerning proper placement and selection of the supply bypass capacitor. 5. CB Bypass pin capacitor which provides half-supply filtering. Refer to the section, Proper Selection of External Components, for information concerning proper placement and selection of CB. Submit Documentation Feedback Copyright © 2001, Texas Instruments Incorporated Product Folder Links: LM4901 5 LM4901 SNAS139F – DECEMBER 2001 – REVISED DECEMBER 2001 www.ti.com Typical Performance Characteristics 6 THD+N vs Frequency at VDD = 5V, 8Ω RL, and PWR = 500mW THD+N vs Frequency at VDD = 3V, 8Ω RL, and PWR = 250mW Figure 4. Figure 5. THD+N vs Frequency at VDD = 2.6V, 8Ω RL, and PWR = 150mW THD+N vs Frequency at VDD = 2.6V, 4Ω RL, and PWR = 150mW Figure 6. Figure 7. THD+N vs Power Out at VDD = 5V, 8Ω RL, 1kHz THD+N vs Power Out at VDD = 3V, 8Ω RL, 1kHz Figure 8. Figure 9. Submit Documentation Feedback Copyright © 2001, Texas Instruments Incorporated Product Folder Links: LM4901 LM4901 www.ti.com SNAS139F – DECEMBER 2001 – REVISED DECEMBER 2001 Typical Performance Characteristics (continued) THD+N vs Power Out at VDD = 2.6V, 8Ω RL, 1kHz THD+N vs Power Out at VDD = 2.6V, 4Ω RL, 1kHz Figure 10. Figure 11. Power Supply Rejection Ratio (PSRR) vs Frequency at VDD = 5V, 8Ω RL Power Supply Rejection Ratio (PSRR) vs Frequency at VDD = 5V, 8Ω RL Figure 12. Input terminated with 10Ω Figure 13. Input Floating Power Supply Rejection Ratio (PSRR) vs Frequency at VDD = 3V, 8Ω RL Power Supply Rejection Ratio (PSRR) vs Frequency at VDD = 3V, 8Ω RL Figure 14. Input terminated with 10Ω Figure 15. Input Floating Submit Documentation Feedback Copyright © 2001, Texas Instruments Incorporated Product Folder Links: LM4901 7 LM4901 SNAS139F – DECEMBER 2001 – REVISED DECEMBER 2001 www.ti.com Typical Performance Characteristics (continued) 8 Power Supply Rejection Ratio (PSRR) vs Frequency at VDD = 2.6V, 8Ω RL Power Supply Rejection Ratio (PSRR) vs Frequency at VDD = 2.6V, 8Ω RL Figure 16. Input terminated with 10Ω Figure 17. Input Floating Open Loop Frequency Response, 5V Open Loop Frequency Response, 3V Figure 18. Figure 19. Open Loop Frequency Response, 2.6V Noise Floor, 5V, 8Ω 80kHz Bandwidth, Input to GND Figure 20. Figure 21. Submit Documentation Feedback Copyright © 2001, Texas Instruments Incorporated Product Folder Links: LM4901 LM4901 www.ti.com SNAS139F – DECEMBER 2001 – REVISED DECEMBER 2001 Typical Performance Characteristics (continued) Power Derating Curves Power Dissipation vs Output Power, VDD=5V Figure 22. Figure 23. Power Dissipation vs Output Power, VDD=3V Power Dissipation vs Output Power, VDD=2.6V Figure 24. Figure 25. Shutdown Hysteresis Voltage 5V, SD Mode = VDD (High) Shutdown Hysteresis Voltage 5V, SD Mode = GND (Low) Figure 26. Figure 27. Submit Documentation Feedback Copyright © 2001, Texas Instruments Incorporated Product Folder Links: LM4901 9 LM4901 SNAS139F – DECEMBER 2001 – REVISED DECEMBER 2001 www.ti.com Typical Performance Characteristics (continued) 10 Shutdown Hysteresis Voltage 3V, SD Mode = VDD (High) Shutdown Hysteresis Voltage 3V, SD Mode = GND (Low) Figure 28. Figure 29. Shutdown Hysteresis Voltage 2.6V, SD Mode = VDD (High) Shutdown Hysteresis Voltage 2.6V, SD Mode = GND (Low) Figure 30. Figure 31. Output Power vs. Supply Voltage, 4Ω Output Power vs Supply Voltage, 8Ω Figure 32. Figure 33. Submit Documentation Feedback Copyright © 2001, Texas Instruments Incorporated Product Folder Links: LM4901 LM4901 www.ti.com SNAS139F – DECEMBER 2001 – REVISED DECEMBER 2001 Typical Performance Characteristics (continued) Output Power vs Supply Voltage, 16Ω Output Power vs Supply Voltage, 32Ω Figure 34. Figure 35. Frequency Response vs Input Capacitor Size Figure 36. Submit Documentation Feedback Copyright © 2001, Texas Instruments Incorporated Product Folder Links: LM4901 11 LM4901 SNAS139F – DECEMBER 2001 – REVISED DECEMBER 2001 www.ti.com APPLICATION INFORMATION BRIDGE CONFIGURATION EXPLANATION As shown in Figure 1, the LM4901 has two internal operational amplifiers. The first amplifier's gain is externally configurable, while the second amplifier is internally fixed in a unity-gain, inverting configuration. The closed-loop gain of the first amplifier is set by selecting the ratio of Rf to Ri while the second amplifier's gain is fixed by the two internal 20kΩ resistors. Figure 1 shows that the output of amplifier one serves as the input to amplifier two which results in both amplifiers producing signals identical in magnitude, but out of phase by 180°. Consequently, the differential gain for the IC is AVD= 2 *(Rf/Ri) (1) By driving the load differentially through outputs Vo1 and Vo2, an amplifier configuration commonly referred to as “bridged mode” is established. Bridged mode operation is different from the classical single-ended amplifier configuration where one side of the load is connected to ground. A bridge amplifier design has a few distinct advantages over the single-ended configuration, as it provides differential drive to the load, thus doubling output swing for a specified supply voltage. Four times the output power is possible as compared to a single-ended amplifier under the same conditions. This increase in attainable output power assumes that the amplifier is not current limited or clipped. In order to choose an amplifier's closedloop gain without causing excessive clipping, please refer to the Audio Power Amplifier Design section. A bridge configuration, such as the one used in LM4901, also creates a second advantage over single-ended amplifiers. Since the differential outputs, Vo1 and Vo2, are biased at half-supply, no net DC voltage exists across the load. This eliminates the need for an output coupling capacitor which is required in a single supply, singleended amplifier configuration. Without an output coupling capacitor, the half-supply bias across the load would result in both increased internal IC power dissipation and also possible loudspeaker damage. POWER DISSIPATION Power dissipation is a major concern when designing a successful amplifier, whether the amplifier is bridged or single-ended. A direct consequence of the increased power delivered to the load by a bridge amplifier is an increase in internal power dissipation. Since the LM4901 has two operational amplifiers in one package, the maximum internal power dissipation is 4 times that of a single-ended amplifier. The maximum power dissipation for a given application can be derived from the power dissipation graphs or from Equation 2. PDMAX = 4*(VDD)2/(2π2RL) (2) It is critical that the maximum junction temperature TJMAX of 150°C is not exceeded. TJMAX can be determined from the power derating curves by using PDMAX and the PC board foil area. By adding copper foil, the thermal resistance of the application can be reduced from the free air value of θJA, resulting in higher PDMAX values without thermal shutdown protection circuitry being activated. Additional copper foil can be added to any of the leads connected to the LM4901. It is especially effective when connected to VDD, GND, and the output pins. Refer to the application information on the LM4901 reference design board for an example of good heat sinking. If TJMAX still exceeds 150°C, then additional changes must be made. These changes can include reduced supply voltage, higher load impedance, or reduced ambient temperature. Internal power dissipation is a function of output power. Refer to the Typical Performance Characteristics curves for power dissipation information for different output powers and output loading. POWER SUPPLY BYPASSING As with any amplifier, proper supply bypassing is critical for low noise performance and high power supply rejection. The capacitor location on both the bypass and power supply pins should be as close to the device as possible. Typical applications employ a 5V regulator with 10 µF tantalum or electrolytic capacitor and a ceramic bypass capacitor which aid in supply stability. This does not eliminate the need for bypassing the supply nodes of the LM4901. The selection of a bypass capacitor, especially CB, is dependent upon PSRR requirements, click and pop performance (as explained in the section, Proper Selection of External Components), system cost, and size constraints. 12 Submit Documentation Feedback Copyright © 2001, Texas Instruments Incorporated Product Folder Links: LM4901 LM4901 www.ti.com SNAS139F – DECEMBER 2001 – REVISED DECEMBER 2001 SHUTDOWN FUNCTION In order to reduce power consumption while not in use, the LM4901 contains shutdown circuitry that is used to turn off the amplifier's bias circuitry. In addition, the LM4901 contains a Shutdown Mode pin, allowing the designer to designate whether the part will be driven into shutdown with a high level logic signal or a low level logic signal. This allows the designer maximum flexibility in device use, as the Shutdown Mode pin may simply be tied permanently to either VDD or GND to set the LM4901 as either a "shutdown-high" device or a "shutdownlow" device, respectively. The device may then be placed into shutdown mode by toggling the Shutdown pin to the same state as the Shutdown Mode pin. For simplicity's sake, this is called "shutdown same", as the LM4901 enters shutdown mode whenever the two pins are in the same logic state. The trigger point for either shutdown high or shutdown low is shown as a typical value in the Supply Current vs Shutdown Voltage graphs in the Typical Performance Characteristics section. It is best to switch between ground and supply for maximum performance. While the device may be disabled with shutdown voltages in between ground and supply, the idle current may be greater than the typical value of 0.1µA. In either case, the shutdown pin should be tied to a definite voltage to avoid unwanted state changes. In many applications, a microcontroller or microprocessor output is used to control the shutdown circuitry, which provides a quick, smooth transition to shutdown. Another solution is to use a single-throw switch in conjunction with an external pull-up resistor (or pull-down, depending on shutdown high or low application). This scheme ensures that the shutdown pin will not float, thus preventing unwanted state changes. PROPER SELECTION OF EXTERNAL COMPONENTS Proper selection of external components in applications using integrated power amplifiers is critical to optimize device and system performance. While the LM4901 is tolerant of external component combinations, consideration to component values must be used to maximize overall system quality. The LM4901 is unity-gain stable which gives the designer maximum system flexibility. The LM4901 should be used in low gain configurations to minimize THD+N values, and maximize the signal to noise ratio. Low gain configurations require large input signals to obtain a given output power. Input signals equal to or greater than 1 Vrms are available from sources such as audio codecs. Please refer to the section, Audio Power Amplifier Design , for a more complete explanation of proper gain selection. Besides gain, one of the major considerations is the closed-loop bandwidth of the amplifier. To a large extent, the bandwidth is dictated by the choice of external components shown in Figure 1. The input coupling capacitor, Ci, forms a first order high pass filter which limits low frequency response. This value should be chosen based on needed frequency response for a few distinct reasons. Selection Of Input Capacitor Size Large input capacitors are both expensive and space hungry for portable designs. Clearly, a certain sized capacitor is needed to couple in low frequencies without severe attenuation. But in many cases the speakers used in portable systems, whether internal or external, have little ability to reproduce signals below 100 Hz to 150 Hz. Thus, using a large input capacitor may not increase actual system performance. In addition to system cost and size, click and pop performance is effected by the size of the input coupling capacitor, Ci. A larger input coupling capacitor requires more charge to reach its quiescent DC voltage (nominally 1/2 VDD). This charge comes from the output via the feedback and is apt to create pops upon device enable. Thus, by minimizing the capacitor size based on necessary low frequency response, turn-on pops can be minimized. Besides minimizing the input capacitor size, careful consideration should be paid to the bypass capacitor value. Bypass capacitor, CB, is the most critical component to minimize turn-on pops since it determines how fast the LM4901 turns on. The slower the LM4901's outputs ramp to their quiescent DC voltage (nominally 1/2 VDD), the smaller the turn-on pop. Choosing CB equal to 1.0 µF along with a small value of Ci (in the range of 0.1 µF to 0.39 µF), should produce a virtually clickless and popless shutdown function. While the device will function properly, (no oscillations or motorboating), with CB equal to 0.1 µF, the device will be much more susceptible to turn-on clicks and pops. Thus, a value of CB equal to 1.0 µF is recommended in all but the most cost sensitive designs. Submit Documentation Feedback Copyright © 2001, Texas Instruments Incorporated Product Folder Links: LM4901 13 LM4901 SNAS139F – DECEMBER 2001 – REVISED DECEMBER 2001 www.ti.com AUDIO POWER AMPLIFIER DESIGN A 1W/8Ω Audio Amplifier Given: Power Output 1 Wrms Load Impedance 8Ω Input Level 1 Vrms Input Impedance Bandwidth 20 kΩ 100 Hz–20 kHz ± 0.25 dB A designer must first determine the minimum supply rail to obtain the specified output power. By extrapolating from the Output Power vs Supply Voltage graphs in the Typical Performance Characteristics section, the supply rail can be easily found. 5V is a standard voltage in most applications, it is chosen for the supply rail. Extra supply voltage creates headroom that allows the LM4901 to reproduce peaks in excess of 1W without producing audible distortion. At this time, the designer must make sure that the power supply choice along with the output impedance does not violate the conditions explained in the Power Dissipation section. Once the power dissipation equations have been addressed, the required differential gain can be determined from Equation 3. (3) (4) Rf/Ri = AVD/2 From Equation 3, the minimum AVD is 2.83; use AVD = 3. Since the desired input impedance was 20 kΩ, and with a AVD impedance of 2, a ratio of 1.5:1 of Rf to Ri results in an allocation of Ri = 20 kΩ and Rf = 30 kΩ. The final design step is to address the bandwidth requirements which must be stated as a pair of −3 dB frequency points. Five times away from a −3 dB point is 0.17 dB down from passband response which is better than the required ±0.25 dB specified. fL = 100 Hz/5 = 20 Hz fH = 20 kHz * 5 = 100 kHz As stated in the External Components section, Ri in conjunction with Ci create a highpass filter. Ci ≥ 1/(2π*20 kΩ*20 Hz) = 0.397 µF; use 0.39 µF The high frequency pole is determined by the product of the desired frequency pole, fH, and the differential gain, AVD. With a AVD = 3 and fH = 100 kHz, the resulting GBWP = 300kHz which is much smaller than the LM4901 GBWP of 2.5MHz. This figure displays that if a designer has a need to design an amplifier with a higher differential gain, the LM4901 can still be used without running into bandwidth limitations. 14 Submit Documentation Feedback Copyright © 2001, Texas Instruments Incorporated Product Folder Links: LM4901 LM4901 www.ti.com SNAS139F – DECEMBER 2001 – REVISED DECEMBER 2001 Figure 37. Higher Gain Audio Amplifier The LM4901 is unity-gain stable and requires no external components besides gain-setting resistors, an input coupling capacitor, and proper supply bypassing in the typical application. However, if a closed-loop differential gain of greater than 10 is required, a feedback capacitor (C4) may be needed as shown in Figure 37 to bandwidth limit the amplifier. This feedback capacitor creates a low pass filter that eliminates possible high frequency oscillations. Care should be taken when calculating the -3dB frequency in that an incorrect combination of R3 and C4 will cause rolloff before 20kHz. A typical combination of feedback resistor and capacitor that will not produce audio band high frequency rolloff is R3 = 20kΩ and C4 = 25pf. These components result in a -3dB point of approximately 320 kHz. Submit Documentation Feedback Copyright © 2001, Texas Instruments Incorporated Product Folder Links: LM4901 15 LM4901 SNAS139F – DECEMBER 2001 – REVISED DECEMBER 2001 www.ti.com Figure 38. Differential Amplifier Configuration for LM4901 Figure 39. Reference Design Board Schematic 16 Submit Documentation Feedback Copyright © 2001, Texas Instruments Incorporated Product Folder Links: LM4901 LM4901 www.ti.com SNAS139F – DECEMBER 2001 – REVISED DECEMBER 2001 LM4901 VSSOP DEMO BOARD ARTWORK Silk Screen Top Layer Bottom Layer Submit Documentation Feedback Copyright © 2001, Texas Instruments Incorporated Product Folder Links: LM4901 17 LM4901 SNAS139F – DECEMBER 2001 – REVISED DECEMBER 2001 www.ti.com LM4901 WSON DEMO BOARD ARTWORK Composite View Silk Screen Top Layer Bottom Layer Table 1. Mono LM4901 Reference Design Boards Bill of Material Part Description Quantity Reference Designator LM4901 Audio AMP 1 U1 Tantalum Capcitor, 1µF 2 C1, C3 Ceramic Capacitor, 0.39µF 1 C2 Resistor, 20kΩ, 1/10W 2 R2, R3 Resistor, 100kΩ, 1/10W 2 R1, R4 Jumper Header Vertical Mount 2X1 0.100“ spacing 2 J1, J2 PCB LAYOUT GUIDELINES This section provides practical guidelines for mixed signal PCB layout that involves various digital/analog power and ground traces. Designers should note that these are only "rule-of-thumb" recommendations and the actual results will depend heavily on the final layout. GENERAL MIXED SIGNAL LAYOUT RECOMMENDATION Power and Ground Circuits For 2 layer mixed signal design, it is important to isolate the digital power and ground trace paths from the analog power and ground trace paths. Star trace routing techniques (bringing individual traces back to a central point rather than daisy chaining traces together in a serial manner) can have a major impact on low level signal performance. Star trace routing refers to using individual traces to feed power and ground to each circuit or even device. This technique will require a greater amount of design time but will not increase the final price of the board. The only extra parts required will be some jumpers. 18 Submit Documentation Feedback Copyright © 2001, Texas Instruments Incorporated Product Folder Links: LM4901 LM4901 www.ti.com SNAS139F – DECEMBER 2001 – REVISED DECEMBER 2001 Single-Point Power / Ground Connections The analog power traces should be connected to the digital traces through a single point (link). A "Pi-filter" can be helpful in minimizing High Frequency noise coupling between the analog and digital sections. It is further recommended to put digital and analog power traces over the corresponding digital and analog ground traces to minimize noise coupling. Placement of Digital and Analog Components All digital components and high-speed digital signal traces should be located as far away as possible from analog components and circuit traces. Avoiding Typical Design / Layout Problems Avoid ground loops or running digital and analog traces parallel to each other (side-by-side) on the same PCB layer. When traces must cross over each other do it at 90 degrees. Running digital and analog traces at 90 degrees to each other from the top to the bottom side as much as possible will minimize capacitive noise coupling and cross talk. Submit Documentation Feedback Copyright © 2001, Texas Instruments Incorporated Product Folder Links: LM4901 19 LM4901 SNAS139F – DECEMBER 2001 – REVISED DECEMBER 2001 www.ti.com REVISION HISTORY 20 Rev Date Description 1.0 12/10/02 Re-released the D/S to the WEB. Edited WSON Markings (LM4901 to L4901). 1.1 7/25/06 Removed all references to IBL (micro SMD) package per Troy, then re-released the D/S to the WEB. F 05/02/2013 Changed layout of National Data Sheet to TI format. Submit Documentation Feedback Copyright © 2001, Texas Instruments Incorporated Product Folder Links: LM4901 PACKAGE OPTION ADDENDUM www.ti.com 2-May-2013 PACKAGING INFORMATION Orderable Device Status (1) LM4901MMX/NOPB ACTIVE Package Type Package Pins Package Drawing Qty VSSOP DGS 10 3500 Eco Plan Lead/Ball Finish (2) Green (RoHS & no Sb/Br) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) CU SN Level-1-260C-UNLIM (4) -40 to 85 GC1 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. 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Addendum-Page 1 Samples PACKAGE MATERIALS INFORMATION www.ti.com 8-May-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device LM4901MMX/NOPB Package Package Pins Type Drawing VSSOP DGS 10 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 3500 330.0 12.4 Pack Materials-Page 1 5.3 B0 (mm) K0 (mm) P1 (mm) 3.4 1.4 8.0 W Pin1 (mm) Quadrant 12.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 8-May-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM4901MMX/NOPB VSSOP DGS 10 3500 367.0 367.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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