Cypress CY62137V 2-mbit (128k x 16) static ram Datasheet

CY62137V MoBL
2-Mbit (128K x 16) Static RAM
Features
• Temperature Ranges
— Commercial: 0°C to 70°C
— Industrial: –40°C to 85°C
•
•
•
•
•
•
•
•
— Automotive: –40°C to 125°C
High Speed: 55 ns and 70 ns
Wide voltage range: 2.7V–3.6V
Ultra-low active, standby power
Easy memory expansion with CE and OE features
TTL-compatible inputs and outputs
Automatic power-down when deselected
CMOS for optimum speed/power
Package Available in a standard 44-pin TSOP Type II
(forward pinout) package
Functional Description[1]
The CY62137V is a high-performance CMOS static RAM
organized as 128K words by 16 bits. This device features
advanced circuit design to provide ultra-low active current.
This is ideal for providing More Battery Life® (MoBL®) in
portable applications such as cellular telephones. The device
also has an automatic power-down feature that reduces power
consumption by 99% when addresses are not toggling. The
device can also be put into standby mode when deselected
(CE HIGH) or when CE is LOW and both BLE and BHE are
HIGH. The input/output pins (I/O0 through I/O15) are placed in
a high-impedance state when: deselected (CE HIGH), outputs
are disabled (OE HIGH), BHE and BLE are disabled (BHE,
BLE HIGH), or during a write operation (CE LOW, and WE
LOW).
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable
(BLE) is LOW, then data from I/O pins (I/O0 through I/O7), is
written into the location specified on the address pins (A0
through A16). If Byte High Enable (BHE) is LOW, then data
from I/O pins (I/O8 through I/O15) is written into the location
specified on the address pins (A0 through A16).
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing the
Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW,
then data from the memory location specified by the address
pins will appear on I/O0 to I/O7. If Byte High Enable (BHE) is
LOW, then data from memory will appear on I/O8 to I/O15. See
the truth table at the back of this data sheet for a complete
description of read and write modes.
Logic Block Diagram
DATA IN DRIVERS
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
128K x 16
RAM Array
2048 x 1024
SENSE AMPS
ROW DECODER
10
I/O0 – I/O7
I/O8 – I/O15
BHE
WE
CE
OE
BLE
A12
A13
A14
A15
A16
A11
COLUMN DECODER
CE
Power-down
Circuit
BHE
BLE
Note:
1. For best practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.
Cypress Semiconductor Corporation
Document #: 38-05051 Rev. *B
•
3901 North First Street
•
San Jose
•
CA 95134 • 408-943-2600
Revised June 21, 2004
CY62137V MoBL
Product Portfolio
Power Dissipation
VCC Range (V)
Product
CY62137VLL
Industrial
Operating, ICC
(mA)
Standby, ISB2
(µA)
Min.
Typ.[3]
Max.
Speed
(ns)
Typ.[3]
Max.
Typ.[3]
Max.
2.7
3.0
3.6
55
7
20
1
15
CY62137VSL
55
7
20
1
5
CY62137VLL
70
7
15
1
15
CY62137VSL
CY62137VLL
Automotive
70
7
15
1
5
70
7
15
1
20
Pin Configurations
TSOP II (Forward)
A4
Top View
A3
A2
A1
A0
CE
I/O0
I/O1
I/O2
I/O3
VCC
VSS
I/O4
I/O5
I/O6
I/O7
WE
A16
A15
A14
A13
A12
1
44
2
3
43
42
4
41
40
39
38
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
OE
BHE
BLE
I/O15
I/O14
I/O13
I/O12
VSS
VCC
I/O11
I/O10
I/O9
I/O8
NC
A8
A9
A10
A11
NC
Pin Definitions
Pin Number
1-5, 18-22, 24-27, 42-45
Type
Input
Description
A0-A16. Address Inputs
7-10, 13-16, 29-32, 35-38 Input/Output
I/O0-I/O15. Data lines. Used as input or output lines depending on operation
23
No Connect
NC. This pin is not connected to the die
17
Input/Control
WE. When selected LOW, a WRITE is conducted. When selected HIGH, a READ
is conducted
6
Input/Control
CE. When LOW, selects the chip. When HIGH, deselects the chip
39, 40
Input/Control
BHE, BLE. BHE = LOW selects higher order byte WRITEs or READs on the
SRAM.BLE = LOW selects lower order byte WRITEs or READs on the SRAM
41
Input/Control
OE. Output Enable. Controls the direction of the I/O pins. When LOW, the I/O pins
behave as outputs. When deasserted HIGH, I/O pins are three-stated, and act as
input data pins
12, 34
Ground
Vss. Ground for the device
11, 33
Power Supply
Vcc. Power supply for the device
Notes:
2. NC pins are not connected on the die.
3. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(TYP)., TA = 25°C.
Document #: 38-05051 Rev. *B
Page 2 of 11
CY62137V MoBL
Maximum Ratings
Output Current into Outputs (LOW)............................. 20 mA
Static Discharge Voltage.......................................... > 2001V
(per MIL-STD-883, Method 3015)
(Above which the useful life may be impaired. For user guidelines, not tested.)
Latch-up Current.................................................... > 200 mA
Storage Temperature ................................. –65°C to +150°C
Operating Range
Ambient Temperature with
Power Applied............................................. –55°C to +125°C
Supply Voltage to Ground Potential ............... –0.5V to +4.6V
Range
Ambient
Temperature
VCC
DC Voltage Applied to Outputs
in High-Z State[4] ....................................–0.5V to VCC + 0.5V
Industrial
–40°C to +85°C
2.7V to 3.6V
Automotive
–40°C to +125°C
2.7V to 3.6V
DC Input Voltage[4] .................................–0.5V to VCC + 0.5V
Electrical Characteristics Over the Operating Range
CY62137V-55
Parameter
Description
Test Conditions
Min.
Typ.[3]
CY62137V-70
Max. Min. Typ.[3] Max. Unit
VOH
Output HIGH Voltage IOH = –1.0 mA
VCC = 2.7V
VOL
Output LOW Voltage IOL = 2.1 mA
VCC = 2.7V
0.4
V
VIH
Input HIGH Voltage
2.2
VCC +
0.5V
2.2
VCC +
0.5V
V
VIL
Input LOW Voltage
–0.5
0.8
–0.5
0.8
V
2.4
2.4
V
0.4
IIX
Input Load Current
GND < VI < VCC
–1
+1
–1
+1
µA
IOZ
Output Leakage
Current
GND < VO < VCC,
Output Disabled
–1
+1
–1
+1
µA
ICC
VCC Operating Supply IOUT = 0 mA,
Current
f = fMAX = 1/tRC,
CMOS Levels
VCC = 3.6V
IOUT = 0 mA, f = 1
MHz, CMOS Levels
ISB1
Automatic CE
Power-down
Current— CMOS
Inputs
CE > VCC – 0.3V,
VCC = 3.6V
VIN > VCC – 0.3V or
VIN < 0.3V, f = fMAX
ISB2
Automatic CE
Power-down
Current— CMOS
Inputs
CE > VCC – 0.3V
VIN > VCC – 0.3V
or VIN < 0.3V, f = 0
7
20
7
15
mA
1
2
1
2
mA
100
µA
100
VCC = LL
3.6V
Automotive
1
SL
1
15
5
1
15
1
20
1
5
9
Capacitance[5]
Parameter
Description
CIN
Input Capacitance
COUT
Output Capacitance
Test Conditions
TA = 25°C, f = 1 MHz,
VCC = VCC(typ)
Max.
Unit
6
pF
8
pF
Thermal Resistance
Description
Thermal Resistance
(Junction to Ambient)[5]
Test Conditions
Symbol
TSOPII
Unit
Still Air, soldered on a 4.25 x 1.125 inch, 4-layer
printed circuit board
ΘJA
60
°C/W
ΘJC
22
°C/W
Thermal Resistance
(Junction to Case)[5]
Notes:
4. VIL(min.) = –2.0V for pulse durations less than 20 ns.
5. Tested initially and after any design or process changes that may affect these parameters.
Document #: 38-05051 Rev. *B
Page 3 of 11
CY62137V MoBL
AC Test Loads and Waveforms
R1
VCC
R1
VCC
OUTPUT
ALL INPUT PULSES
VCC Typ
OUTPUT
INCLUDING
JIG AND
SCOPE
(a)
R2
5 pF
R2
30 pF
INCLUDING
JIG AND
SCOPE
Equivalent to: (b)
10%
GND
90%
10%
90%
Fall Time:
1 V/ns
Rise Time:
1 V/ns
THÉVENIN EQUIVALENT
(c)
RTH
OUTPUT
V
Parameters
3.0V
Unit
R1
1105
Ohms
R2
1550
Ohms
RTH
645
Ohms
VTH
1.75
Volts
Data Retention Characteristics (Over the Operating Range)
Parameter
Description
VDR
VCC for Data Retention
ICCDR
Data Retention Current
Min. Typ.[3] Max. Unit
Conditions
1.0
VCC = 1.0V, CE > VCC – 0.3V, VIN > VCC – 0.3V LL
or VIN < 0.3V; No input may exceed; VCC+0.3V Automotive
V
0.5
7.5
µA
10
SL
0.5
5
tCDR[5]
Chip Deselect to Data
Retention Time
0
ns
tR
Operation Recovery Time
70
ns
Data Retention Waveform
VCC
VCC(min.)
tCDR
DATA RETENTION MODE
VDR > 1.0 V
VCC(min.)
tR
CE
Document #: 38-05051 Rev. *B
Page 4 of 11
CY62137V MoBL
Switching Characteristics Over the Operating Range
[6]
55 ns
Parameter
Description
Min.
70 ns
Max.
Min.
Max.
Unit
Read Cycle
tRC
Read Cycle Time
tAA
Address to Data Valid
tOHA
Data Hold from Address Change
tACE
CE LOW to Data Valid
55
70
ns
tDOE
OE LOW to Data Valid
25
35
ns
tLZOE
OE LOW to Low-Z[7]
tHZOE
OE HIGH to High-Z[7, 8]
tLZCE
CE LOW to Low-Z[7]
tHZCE
CE HIGH to High-Z[7, 8]
tPU
CE LOW to Power-up
tPD
CE HIGH to Power-down
55
70
ns
tDBE
BHE / BLE LOW to Data Valid
55
70
ns
tLZBE (9)
BHE / BLE LOW to Low-Z
tHZBE
BHE / BLE HIGH to High-Z
55
70
55
10
ns
70
10
5
ns
5
25
10
ns
25
10
25
0
25
ns
ns
5
25
ns
ns
0
5
ns
ns
25
ns
Write Cycle[10, 11]
tWC
Write Cycle Time
55
70
ns
tSCE
CE LOW to Write End
45
60
ns
tAW
Address Set-up to Write End
45
60
ns
tHA
Address Hold from Write End
0
0
ns
tSA
Address Set-up to Write Start
0
0
ns
tPWE
WE Pulse Width
40
50
ns
tSD
Data Set-up to Write End
25
30
ns
tHD
Data Hold from Write End
0
0
ns
tHZWE
WE LOW to High-Z[7, 8]
tLZWE
WE HIGH to Low-Z[7]
5
10
ns
tBW
BHE / BLE LOW to End of Write
50
60
ns
20
25
ns
Notes:
6. Test conditions assume signal transition time of 5 ns or less, timing reference levels of 1.5V, input levels of 0 to VCC typ., and output loading of the specified
IOL/IOH and 30 pF load capacitance.
7. At any given temperature and voltage condition, tHZCE is less than tLZCE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any given device.
8. tHZOE, tHZCE, and tHZWE are specified with CL = 5 pF as in (b) of AC Test Loads. Transition is measured ±500 mV from steady-state voltage.
9. If both byte enables are toggled together this value is 10 ns.
10. The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. Both signals must be LOW to initiate a write and either signal can terminate
a write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write.
11. The minimum write cycle time for write cycle #3 (WE controlled, OE LOW) is the sum of tHZWE and tSD.
Document #: 38-05051 Rev. *B
Page 5 of 11
CY62137V MoBL
Switching Waveforms
Read Cycle No. 1 [12, 13]
tRC
ADDRESS
tOHA
DATA OUT
Read Cycle No. 2
tAA
PREVIOUS DATA VALID
DATA VALID
[13, 14]
tRC
CE
tPD
tHZCE
tACE
OE
tHZOE
tDOE
BHE/BLE
tLZOE
tHZBE
tDBE
tLZBE
DATA OUT
HIGH IMPEDANCE
HIGH
IMPEDANCE
DATA VALID
tLZCE
VCC
SUPPLY
CURRENT
tPU
50%
50%
ICC
ISB
Notes:
12. Device is continuously selected. OE, CE = VIL.
13. WE is HIGH for read cycle.
14. Address valid prior to or coincident with CE transition LOW.
Document #: 38-05051 Rev. *B
Page 6 of 11
CY62137V MoBL
Switching Waveforms (continued)
Write Cycle No. 1 (WE Controlled)
[10, 15, 16]
tWC
ADDRESS
CE
tAW
tHA
tSA
WE
tPWE
tBW
BHE/BLE
OE
tSD
DATA I/O
tHD
DATAIN VALID
NOTE 17
tHZOE
Write Cycle No. 2 (CE Controlled)
[10, 15, 16]
tWC
ADDRESS
tSCE
CE
tSA
tAW
BHE/BLE
WE
tHA
tBW
tPWE
tSD
DATA I/O
tHD
DATAIN VALID
Notes:
15. Data I/O is high-impedance if OE = VIH.
16. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state.
17. During this period, the I/Os are in output state and input signals should not be applied.
Document #: 38-05051 Rev. *B
Page 7 of 11
CY62137V MoBL
Switching Waveforms (continued)
Write Cycle No. 3 (WE Controlled, OE LOW)
[11, 16]
tWC
ADDRESS
CE
tAW
tBW
BHE/BLE
WE
tHA
tSA
tSD
DATA I/O
tHD
DATAIN VALID
NOTE 17
tLZWE
tHZWE
Write Cycle No. 4 (BHE/BLE Controlled, OE LOW)
[17]
tWC
ADDRESS
CE
tAW
tHA
tBW
BHE/BLE
tSA
WE
tSD
DATA I/O
DATAIN VALID
NOTE 17
tHZWE
Document #: 38-05051 Rev. *B
tHD
tLZWE
Page 8 of 11
CY62137V MoBL
Typical DC and AC Characteristics
Normalized Operating Current
vs. Supply Voltage
1.4
1.2
MoBL
25
ISB (µA)
1.0
0.8
ICC
Standby Current vs. Supply Voltage
35
MoBL
30
0.6
20
15
10
0.4
5
0.2
0
0.0
1.7
2.2
2.7
3.2
SUPPLY VOLTAGE (V)
3.7
1.0
2.7 2.8
3.7
1.9
SUPPLY VOLTAGE (V)
Access Time vs. Supply Voltage
80
MoBL
70
60
TAA (ns)
50
40
30
20
10
1.0
3.7
2.7 2.8
1.9
SUPPLY VOLTAGE (V)
Truth Table
CE
WE
OE
BHE
BLE
H
X
X
X
X
High-Z
Deselect/Power-down
Standby (ISB)
L
X
X
H
H
High-Z
Deselect/Power-down
Standby (ISB)
L
H
L
L
L
Data Out (I/OO–I/O15)
Read
Active (ICC)
L
H
L
H
L
Data Out (I/OO–I/O7);
I/O8–I/O15 in High-Z
Read
Active (ICC)
L
H
L
L
H
Data Out (I/O8–I/O15);
I/O0–I/O7 in High-Z
Read
Active (ICC)
L
H
H
L
L
High-Z
Deselect/Output Disabled
Active (ICC)
L
H
H
H
L
High-Z
Deselect/Output Disabled
Active (ICC)
L
H
H
L
H
High-Z
Deselect/Output Disabled
Active (ICC)
L
L
X
L
L
Data In (I/OO–I/O15)
Write
Active (ICC)
L
L
X
H
L
Data In (I/OO–I/O7);
I/O8–I/O15 in High-Z
Write
Active (ICC)
L
L
X
L
H
Data In (I/O8–I/O15);
I/O0 –I/O7 in High-Z
Write
Active (ICC)
Document #: 38-05051 Rev. *B
Inputs/Outputs
Mode
Power
Page 9 of 11
CY62137V MoBL
Ordering Information
Speed
(ns)
Ordering Code
55
Package
Name
CY62137VLL-55ZI
Z44
Operating
Range
Package Type
44-pin TSOP II
Industrial
CY62137VSL-55ZI
70
CY62137VLL-70ZI
CY62137VSL-70ZI
CY62137VLL-70ZE
Automotive
Package Diagrams
44-Pin TSOP II Z44
1
PIN 1 I.D.
23
10.262 (0.404)
10.058 (0.396)
11.938 (0.470)
11.735 (0.462)
22
OR E
K X A
SG
EJECTOR PIN
44
TOP VIEW
0.800 BSC
(0.0315)
DIMENSION IN MM (INCH)
MAX
MIN.
BOTTOM VIEW
0.400(0.016)
0.300 (0.012)
10.262 (0.404)
10.058 (0.396)
BASE PLANE
0.210 (0.0083)
0.120 (0.0047)
0°-5°
0.10 (.004)
0.150 (0.0059)
0.050 (0.0020)
1.194 (0.047)
0.991 (0.039)
18.517 (0.729)
18.313 (0.721)
SEATING
PLANE
0.597 (0.0235)
0.406 (0.0160)
51-85087-*A
MoBL is a registered trademark, and More Battery Life is a trademark, of Cypress Semiconductor. All product and company
names mentioned in this document are the trademarks of their respective holders.
Document #: 38-05051 Rev. *B
Page 10 of 11
© Cypress Semiconductor Corporation, 2004. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be
used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its
products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.
CY62137V MoBL
Document Title: CY62137V MoBL® 2M (128K x 16) Static RAM
Document Number: 38-05051
REV.
ECN NO. Issue Date
Orig. of
Change
Description of Change
**
109960
10/03/01
SZV
Changed from Spec number: 38-00738 to 38-05051
*A
116788
09/04/02
GBI
Added footnote number one.
Added SL power bin.
Deleted fBGA package; replacement fBGA package is available in
CY62137CV30.
*B
237428
See ECN
AJU
Added Automotive product information
Document #: 38-05051 Rev. *B
Page 11 of 11
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